From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eric Anholt Subject: Re: [PATCH] drm/i915: Relinquish any fence when changing cache levels Date: Wed, 13 Apr 2011 09:36:08 -0700 Message-ID: <87bp0ahzwn.fsf@pollan.anholt.net> References: <1302697540-27324-1-git-send-email-chris@chris-wilson.co.uk> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0633869735==" Return-path: In-Reply-To: <1302697540-27324-1-git-send-email-chris@chris-wilson.co.uk> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Chris Wilson , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============0633869735== Content-Type: multipart/signed; boundary="=-=-="; micalg=pgp-sha1; protocol="application/pgp-signature" --=-=-= Content-Transfer-Encoding: quoted-printable On Wed, 13 Apr 2011 13:25:40 +0100, Chris Wilson = wrote: > This is vital to maintain our contract with the hw for not using fences > on snooped memory for older chipsets. It should have no impact > other than clearing the fence register (and updating the fence > bookkeeping) as any future IO access (page faults or pwrite/pread) will > go through the cached CPU domain for older chipsets. On SandyBridge, we > incur an extra get_fence() on the rare path that we need to perform > detiling through a pagefault (i.e. texture transfers). Surely you could just update this to do that for the hardware that requires it. With a comment so someone doesn't delete it later :) > Signed-off-by: Chris Wilson > --- > drivers/gpu/drm/i915/i915_gem.c | 4 ++++ > 1 files changed, 4 insertions(+), 0 deletions(-) >=20 > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_= gem.c > index 6ca026d..2d16a23 100644 > --- a/drivers/gpu/drm/i915/i915_gem.c > +++ b/drivers/gpu/drm/i915/i915_gem.c > @@ -3355,6 +3355,10 @@ int i915_gem_object_set_cache_level(struct drm_i91= 5_gem_object *obj, > if (ret) > return ret; >=20=20 > + ret =3D i915_gem_object_put_fence(obj); > + if (ret) > + return ret; > + > ret =3D i915_gem_gtt_bind_object(obj, cache_level); > if (ret) > return ret; > --=20 > 1.7.4.1 >=20 > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx --=-=-= Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iEYEARECAAYFAk2l0PgACgkQHUdvYGzw6vf9XgCfQDQcOiTOcQqX4qMWiQY38epy TZUAn2iNX6P1A36uRxQR6nrStXUQmrAf =zPR3 -----END PGP SIGNATURE----- --=-=-=-- --===============0633869735== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============0633869735==--