From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eric Anholt Subject: Re: [PATCH 1/2] drm/i915: Allow DRM_ROOT_ONLY|DRM_MASTER to submit privileged batchbuffers Date: Wed, 17 Oct 2012 11:47:10 -0700 Message-ID: <87r4oxc4wh.fsf@eliezer.anholt.net> References: <1350472195-8051-1-git-send-email-chris@chris-wilson.co.uk> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1090184839==" Return-path: In-Reply-To: <1350472195-8051-1-git-send-email-chris@chris-wilson.co.uk> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Chris Wilson , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============1090184839== Content-Type: multipart/signed; boundary="=-=-="; micalg=pgp-sha1; protocol="application/pgp-signature" --=-=-= Chris Wilson writes: > With the introduction of per-process GTT space, the hardware designers > thought it wise to also limit the ability to write to MMIO space to only > a "secure" batch buffer. The ability to rewrite registers is the only > way to program the hardware to perform certain operations like scanline > waits (required for tear-free windowed updates). So we either have a > choice of adding an interface to perform those synchronized updates > inside the kernel, or we permit certain processes the ability to write > to the "safe" registers from within its command stream. This patch > exposes the ability to submit a SECURE batch buffer to > DRM_ROOT_ONLY|DRM_MASTER processes. This seems like a major blow to ever getting non-root X. --=-=-= Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iEYEARECAAYFAlB+/S4ACgkQHUdvYGzw6vfx1wCdH+c5kngyBSl/32Da5eEurEge DiYAnj62fmqHXWH0ijlidsjx7qMv8Bn7 =bH/X -----END PGP SIGNATURE----- --=-=-=-- --===============1090184839== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============1090184839==--