From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7548DC4338F for ; Wed, 18 Aug 2021 11:11:08 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 319EE606A5 for ; Wed, 18 Aug 2021 11:11:08 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 319EE606A5 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7BF736E530; Wed, 18 Aug 2021 11:11:07 +0000 (UTC) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4F2466E530 for ; Wed, 18 Aug 2021 11:11:02 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10079"; a="203499699" X-IronPort-AV: E=Sophos;i="5.84,330,1620716400"; d="scan'208";a="203499699" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Aug 2021 04:11:00 -0700 X-IronPort-AV: E=Sophos;i="5.84,330,1620716400"; d="scan'208";a="521016053" Received: from mdbadill-mobl1.amr.corp.intel.com (HELO localhost) ([10.249.42.92]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Aug 2021 04:10:57 -0700 From: Jani Nikula To: Lee Shawn C , intel-gfx@lists.freedesktop.org Cc: Lee Shawn C , Ville Syrjala , Vandita Kulkarni , Cooper Chiou , William Tseng In-Reply-To: <20210813024649.7197-1-shawn.c.lee@intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <20210812154237.13911-8-shawn.c.lee@intel.com> <20210813024649.7197-1-shawn.c.lee@intel.com> Date: Wed, 18 Aug 2021 14:10:54 +0300 Message-ID: <87zgtfgg8x.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain Subject: Re: [Intel-gfx] [v4] drm/i915/dsi: Send proper brightness value via MIPI DCS command X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Fri, 13 Aug 2021, Lee Shawn C wrote: > Driver has to swap the endian before send brightness level value > to tcon. > > v2: Use __be16 instead of u16 to fix sparse warning. > > Reported-by: kernel test robot > Cc: Ville Syrjala > Cc: Jani Nikula > Cc: Vandita Kulkarni > Cc: Cooper Chiou > Cc: William Tseng > Signed-off-by: Lee Shawn C > --- > drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c b/drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c > index cd85520d36e2..71c2adfa8931 100644 > --- a/drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c > +++ b/drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c > @@ -66,10 +66,9 @@ static void dcs_set_backlight(const struct drm_connector_state *conn_state, u32 > { > struct intel_dsi *intel_dsi = enc_to_intel_dsi(to_intel_encoder(conn_state->best_encoder)); > struct mipi_dsi_device *dsi_device; > - u8 data = level; > + __be16 data = cpu_to_be16(level); Just discussed this with Vandita. Both the set and get brightness need to be adjusted, and the read/write size (one or two bytes) has to depend on the precision. From MIPI DCS spec: Note: It is up to display manufacturer to determine the implementation of this register and background logic. Only one parameter shall be sent for devices that support 8-bit brightness levels. Two parameters shall be sent for devices that support between 9-bit and 16-bit brightness levels. BR, Jani. > enum port port; > > - /* FIXME: Need to take care of 16 bit brightness level */ > for_each_dsi_port(port, intel_dsi->dcs_backlight_ports) { > dsi_device = intel_dsi->dsi_hosts[port]->device; > mipi_dsi_dcs_write(dsi_device, MIPI_DCS_SET_DISPLAY_BRIGHTNESS, -- Jani Nikula, Intel Open Source Graphics Center