messages from 2020-05-05 07:27:18 to 2020-05-06 22:55:47 UTC [more...]
[Intel-gfx] [PATCH v2 00/22] Introduce Rocket Lake
2020-05-06 22:55 UTC (21+ messages)
` [Intel-gfx] [PATCH v2 02/22] x86/gpu: add RKL stolen memory support
` [Intel-gfx] [PATCH v2 08/22] drm/i915/rkl: Add power well support
` [Intel-gfx] [PATCH v2 10/22] drm/i915/rkl: RKL only uses PHY_MISC for PHY's A and B
` [Intel-gfx] [PATCH v2 15/22] drm/i915/rkl: Add DDC pin mapping
` [Intel-gfx] [PATCH v2 16/22] drm/i915/rkl: Don't try to access transcoder D
` [Intel-gfx] [PATCH v3 "
` [Intel-gfx] [PATCH v2 18/22] drm/i915/rkl: Handle comp master/slave relationships for PHYs
` [Intel-gfx] ✗ Fi.CI.IGT: failure for Introduce Rocket Lake (rev4)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce Rocket Lake (rev5)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [CI 1/6] drm/i915/gt: Always enable busy-stats for execlists
2020-05-06 22:40 UTC (6+ messages)
` [Intel-gfx] [CI 4/6] drm/i915/gt: Switch to manual evaluation of RPS
[Intel-gfx] [PATCH 01/15] drm/i915: Mark concurrent submissions with a weak-dependency
2020-05-06 22:27 UTC (17+ messages)
` [Intel-gfx] [PATCH 02/15] drm/i915/gt: Suppress internal I915_PRIORITY_WAIT for timeslicing
` [Intel-gfx] [PATCH 03/15] drm/i915: Ignore submit-fences on the same timeline
` [Intel-gfx] [PATCH 04/15] drm/i915: Pull waiting on an external dma-fence into its routine
` [Intel-gfx] [PATCH 05/15] drm/i915: Prevent using semaphores to chain up to external fences
` [Intel-gfx] [PATCH 06/15] drm/i915: Tidy awaiting on dma-fences
` [Intel-gfx] [PATCH 07/15] dma-buf: Proxy fence, an unsignaled fence placeholder
` [Intel-gfx] [PATCH 08/15] drm/syncobj: Allow use of dma-fence-proxy
` [Intel-gfx] [PATCH 09/15] drm/i915/gem: Teach execbuf how to wait on future syncobj
` [Intel-gfx] [PATCH 10/15] drm/i915/gem: Allow combining submit-fences with syncobj
` [Intel-gfx] [PATCH 11/15] drm/i915/gt: Declare when we enabled timeslicing
` [Intel-gfx] [PATCH 12/15] drm/i915: Replace the hardcoded I915_FENCE_TIMEOUT
` [Intel-gfx] [PATCH 13/15] drm/i915: Drop I915_RESET_TIMEOUT and friends
` [Intel-gfx] [PATCH 14/15] drm/i915: Drop I915_IDLE_ENGINES_TIMEOUT
` [Intel-gfx] [PATCH 15/15] drm/i915/selftests: Always call the provided engine->emit_init_breadcrumb
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/15] drm/i915: Mark concurrent submissions with a weak-dependency
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [PATCH 1/3] drm/i915: Mark concurrent submissions with a weak-dependency
2020-05-06 22:01 UTC (4+ messages)
` [Intel-gfx] [PATCH 2/3] drm/i915/gt: Suppress internal I915_PRIORITY_WAIT for timeslicing
` [Intel-gfx] [PATCH 3/3] drm/i915: Ignore submit-fences on the same timeline
` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/3] drm/i915: Mark concurrent submissions with a weak-dependency
[Intel-gfx] [PATCH] drm/i915/dgfx: avoid opregion calls and messages
2020-05-06 21:27 UTC (2+ messages)
[Intel-gfx] [PATCH v3 16/22] drm/i915/rkl: Don't try to access transcoder D
2020-05-06 21:14 UTC
[Intel-gfx] [CI] drm/i915: Propagate error from completed fences
2020-05-06 19:43 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 1/4] Revert "drm/i915/tgl: Include ro parts of l3 to invalidate"
2020-05-06 19:25 UTC (12+ messages)
` [Intel-gfx] [PATCH 2/4] drm/i915/gen12: Fix HDC pipeline flush
` [Intel-gfx] [PATCH 3/4] drm/i915/gen12: Flush L3
` [Intel-gfx] [PATCH 4/4] drm/i915/gen12: Invalidate aux table entries forcibly
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] Revert "drm/i915/tgl: Include ro parts of l3 to invalidate" (rev3)
[Intel-gfx] [PATCH 1/2] drm/i915: Mark concurrent submissions with a weak-dependency
2020-05-06 17:09 UTC (4+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Suppress internal I915_PRIORITY_WAIT for timeslicing
` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Mark concurrent submissions with a weak-dependency
[Intel-gfx] [PATCH v3 1/3] drm/i915: Turn intel_digital_port_connected() in a vfunc
2020-05-06 16:32 UTC (3+ messages)
` [Intel-gfx] [PATCH v3 2/3] drm/i915: Stash hpd status bits under dev_priv
` [Intel-gfx] [PATCH v3 3/3] drm/i915: Use stashed away hpd isr bits in intel_digital_port_connected()
[Intel-gfx] [PATCH 01/14] drm/i915: Mark concurrent submissions with a weak-dependency
2020-05-06 15:36 UTC (19+ messages)
` [Intel-gfx] [PATCH 02/14] drm/i915: Propagate error from completed fences
` [Intel-gfx] [PATCH 03/14] drm/i915: Ignore submit-fences on the same timeline
` [Intel-gfx] [PATCH 04/14] drm/i915: Pull waiting on an external dma-fence into its routine
` [Intel-gfx] [PATCH 05/14] drm/i915: Prevent using semaphores to chain up to external fences
` [Intel-gfx] [PATCH 06/14] drm/i915: Tidy awaiting on dma-fences
` [Intel-gfx] [PATCH 07/14] dma-buf: Proxy fence, an unsignaled fence placeholder
` [Intel-gfx] [PATCH 08/14] drm/syncobj: Allow use of dma-fence-proxy
` [Intel-gfx] [PATCH 09/14] drm/i915/gem: Teach execbuf how to wait on future syncobj
` [Intel-gfx] [PATCH 10/14] drm/i915/gem: Allow combining submit-fences with syncobj
` [Intel-gfx] [PATCH 11/14] drm/i915/gt: Declare when we enabled timeslicing
` [Intel-gfx] [PATCH 12/14] drm/i915: Replace the hardcoded I915_FENCE_TIMEOUT
` [Intel-gfx] [PATCH 13/14] drm/i915: Drop I915_RESET_TIMEOUT and friends
` [Intel-gfx] [PATCH 14/14] drm/i915: Drop I915_IDLE_ENGINES_TIMEOUT
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/14] drm/i915: Mark concurrent submissions with a weak-dependency
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH v5] drm/i915/dsb: Pre allocate and late cleanup of cmd buffer
2020-05-06 15:13 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dsb: Pre allocate and late cleanup of cmd buffer (rev4)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH v4 00/11] Rebased Big Joiner patch series for 8K 2p1p
2020-05-06 14:45 UTC (4+ messages)
` [Intel-gfx] [PATCH v4 04/11] drm/i915/dp: Allow big joiner modes in intel_dp_mode_valid(), v3
[Intel-gfx] [PATCH i-g-t 1/2] i915/gem_exec_schedule: Exercise timeslicing along an engine
2020-05-06 14:22 UTC (2+ messages)
` [Intel-gfx] [PATCH i-g-t 2/2] i915/gem_exec_fence: Exercise timeslicing on submit-fence
[Intel-gfx] [PATCH v6 00/16] drm/i915: Add support for HDCP 1.4 over MST connectors
2020-05-06 14:18 UTC (9+ messages)
` [Intel-gfx] [PATCH v6 01/16] drm/i915: Fix sha_text population code
` [Intel-gfx] [PATCH v6 02/16] drm/i915: Clear the repeater bit on HDCP disable
` [Intel-gfx] [PATCH v6 03/16] drm/i915: WARN if HDCP signalling is enabled upon disable
` [Intel-gfx] [PATCH v6 04/16] drm/i915: Intercept Aksv writes in the aux hooks
[Intel-gfx] [PATCH 0/9] drm/i915: Plumb crtc state to link training code
2020-05-06 13:48 UTC (14+ messages)
` [Intel-gfx] [PATCH 1/9] drm/i915: Fix cpt/ppt max pre-emphasis
` [Intel-gfx] [PATCH 2/9] drm/i915: Fix ibx max vswing/preemph
` [Intel-gfx] [PATCH 3/9] drm/i915: Fix ivb cpu edp vswing
` [Intel-gfx] [PATCH 4/9] drm/i915: Add {preemph, voltage}_max() vfuncs
` [Intel-gfx] [PATCH 5/9] drm/i915: Reverse preemph vs. voltage swing preference
` [Intel-gfx] [PATCH 6/9] drm/i915: Fix DP_TRAIN_MAX_{PRE_EMPHASIS, SWING}_REACHED handling
` [Intel-gfx] [PATCH 7/9] drm/i915: Replace some hand rolled max()s
` [Intel-gfx] [PATCH 8/9] drm/i915: Plumb crtc_state to link training
` [Intel-gfx] [PATCH v2 "
` [Intel-gfx] [PATCH 9/9] drm/i915: Eliminate intel_dp.regs.dp_tp_{ctl, status}
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Plumb crtc state to link training code
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Plumb crtc state to link training code (rev2)
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v27 0/6] SAGV support for Gen12+
2020-05-06 13:42 UTC (24+ messages)
` [Intel-gfx] [PATCH v27 1/6] drm/i915: Introduce skl_plane_wm_level accessor
` [Intel-gfx] [PATCH v27 2/6] drm/i915: Separate icl and skl SAGV checking
` [Intel-gfx] [PATCH v27 3/6] drm/i915: Add TGL+ SAGV support
` [Intel-gfx] [PATCH v27 4/6] drm/i915: Added required new PCode commands
` [Intel-gfx] [PATCH v27 5/6] drm/i915: Restrict qgv points which don't have enough bandwidth
` [Intel-gfx] [PATCH v27 6/6] drm/i915: Enable SAGV support for Gen12
` [Intel-gfx] ✓ Fi.CI.BAT: success for SAGV support for Gen12+ (rev35)
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 1/2] drm/i915: Fix glk watermark calculations
2020-05-06 13:28 UTC (3+ messages)
[Intel-gfx] [PATCH v12 0/4] drm/i915/perf: Add support for multi context perf queries
2020-05-06 12:14 UTC (6+ messages)
` [Intel-gfx] [PATCH v12 4/4] drm/i915/perf: enable filtering on multiple contexts
[Intel-gfx] [PATCH] drm/i915: Propagate fence->error across semaphores
2020-05-06 5:30 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] Wait-for-submit on future syncobj
2020-05-06 4:44 UTC (4+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/6] drm/i915: Mark concurrent submissions with a weak-dependency (rev3)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v6 0/5] Consider DBuf bandwidth when calculating CDCLK
2020-05-06 4:01 UTC (9+ messages)
` [Intel-gfx] [PATCH v6 1/5] drm/i915: Decouple cdclk calculation from modeset checks
` [Intel-gfx] [PATCH v6 2/5] drm/i915: Force recalculate min_cdclk if planes config changed
` [Intel-gfx] [PATCH v6 3/5] drm/i915: Introduce for_each_dbuf_slice_in_mask macro
` [Intel-gfx] [PATCH v6 4/5] drm/i915: Adjust CDCLK accordingly to our DBuf bw needs
` [Intel-gfx] [PATCH v6 5/5] drm/i915: Remove unneeded hack now for CDCLK
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Consider DBuf bandwidth when calculating CDCLK (rev9)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 1/2] drm/i915: Mark concurrent submissions with a weak-dependency
2020-05-06 3:16 UTC (4+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i915: Ignore submit-fences on the same timeline
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Mark concurrent submissions with a weak-dependency
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH i-g-t 1/2] lib/i915: Report scheduler caps for timeslicing
2020-05-05 22:09 UTC (2+ messages)
` [Intel-gfx] [PATCH i-g-t 2/2] i915/gem_exec_fence: Teach invalid-wait about invalid future fences
[Intel-gfx] [PATCH] drm/i915/icp: Add Wa_14010685332
2020-05-05 21:30 UTC (3+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for "
[Intel-gfx] [PATCH 1/9] Revert "drm/i915/tgl: Include ro parts of l3 to invalidate"
2020-05-05 21:02 UTC (8+ messages)
` [Intel-gfx] [PATCH 2/9] drm/i915/gen12: Fix HDC pipeline flush
` [Intel-gfx] [PATCH 4/9] drm/i915/gen12: Flush L3
` [Intel-gfx] [PATCH 6/9] drm/i915/gen12: Invalidate indirect state pointers
[Intel-gfx] [PATCH 01/22] drm/i915: Allow some leniency in PCU reads
2020-05-05 20:13 UTC (4+ messages)
` [Intel-gfx] [PATCH 07/22] drm/i915/gt: Stop holding onto the pinned_default_state
[Intel-gfx] [CI] drm/i915/execlists: Record the active CCID from before reset
2020-05-05 20:09 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH] drm: Fix HDCP failures when SRM fw is missing
2020-05-05 18:02 UTC (8+ messages)
` [Intel-gfx] [PATCH v2] "
[Intel-gfx] [PATCH] drm/i915/tgl: Put HDC flush pipe_control bit in the right dword
2020-05-05 16:32 UTC (5+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for "
[Intel-gfx] [PATCH] drm/i915: HDCP: retry link integrity check on failure
2020-05-05 16:22 UTC (7+ messages)
[Intel-gfx] [PATCH hmm v2 4/5] mm/hmm: remove HMM_PFN_SPECIAL
2020-05-05 0:23 UTC
[Intel-gfx] [PATCH hmm v2 5/5] mm/hmm: remove the customizable pfn format from hmm_range_fault
2020-05-05 1:30 UTC
[Intel-gfx] [PATCH hmm v2 2/5] mm/hmm: make hmm_range_fault return 0 or -1
2020-05-05 0:20 UTC
[Intel-gfx] [PATCH 4/6] drm/i915/gem: Teach execbuf how to wait on future syncobj
2020-05-05 15:02 UTC (4+ messages)
` [Intel-gfx] [PATCH] "
[Intel-gfx] [PATCH i-g-t 1/2] lib/i915: Report scheduler caps for timeslicing
2020-05-05 13:38 UTC (2+ messages)
` [Intel-gfx] [PATCH i-g-t 2/2] i915/gem_exec_fence: Teach invalid-wait about invalid future fences
[Intel-gfx] [PATCH i-g-t] lib/i915: Reset all engine properties to defaults prior to the start of a test
2020-05-05 12:13 UTC
[Intel-gfx] [PATCH v2 0/9] Prefer drm_WARN* over WARN*
2020-05-05 11:57 UTC (2+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for Prefer drm_WARN* over WARN* (rev3)
[Intel-gfx] [PATCH i-g-t] lib/i915: Split igt_require_gem() into i915/
2020-05-05 11:38 UTC
[Intel-gfx] [PATCH i-g-t] i915/gem_ctx_exec: Exploit resource contention to verify execbuf independence
2020-05-05 10:27 UTC
[Intel-gfx] [CI] drm/i915/gt: Stop holding onto the pinned_default_state
2020-05-05 9:25 UTC (5+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gt: Stop holding onto the pinned_default_state (rev2)
[Intel-gfx] [PATCH] drm/i915/tgl+: Fix interrupt handling for DP AUX transactions
2020-05-05 9:15 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for "
[Intel-gfx] [PATCH] drm: Replace drm_modeset_lock/unlock_all with DRM_MODESET_LOCK_ALL_* helpers
2020-05-05 8:51 UTC (8+ messages)
[Intel-gfx] [PATCH v26 0/9] SAGV support for Gen12+
2020-05-05 8:51 UTC (3+ messages)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for SAGV support for Gen12+ (rev34)
[Intel-gfx] [PATCH v3 07/25] drm: i915: fix common struct sg_table related issues
2020-05-05 8:45 UTC
[Intel-gfx] [PATCH v2 0/3] Steer multicast register workaround verification
2020-05-05 8:14 UTC (5+ messages)
` [Intel-gfx] [PATCH v2 2/3] drm/i915: Setup MCR steering for RCS engine workarounds
[Intel-gfx] [CI] drm/i915/gt: Small tidy of gen8+ breadcrumb emission
2020-05-05 7:59 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for "
[Intel-gfx] [PATCH v26 8/9] drm/i915: Restrict qgv points which don't have enough bandwidth
2020-05-05 7:23 UTC (2+ messages)
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