messages from 2020-07-01 03:40:33 to 2020-07-02 11:06:59 UTC [more...]
[Intel-gfx] [CI 1/2] drm/i915/gt: Harden the heartbeat against a stuck driver
2020-07-02 11:06 UTC (4+ messages)
` [Intel-gfx] [CI 2/2] drm/i915/gt: Move the heartbeat into the high priority system wq
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] drm/i915/gt: Harden the heartbeat against a stuck driver
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
[Intel-gfx] [PATCH v3 00/28] Introduce DG1
2020-07-02 11:03 UTC (38+ messages)
` [Intel-gfx] [PATCH v3 01/28] drm/i915: Add has_master_unit_irq flag
` [Intel-gfx] [PATCH v3 02/28] drm/i915/dg1: add initial DG-1 definitions
` [Intel-gfx] [PATCH v3 03/28] drm/i915/dg1: Add DG1 PCI IDs
` [Intel-gfx] [PATCH v3 04/28] drm/i915/dg1: add support for the master unit interrupt
` [Intel-gfx] [PATCH v3 05/28] drm/i915/dg1: Remove SHPD_FILTER_CNT register programming
` [Intel-gfx] [PATCH v3 06/28] drm/i915/dg1: Add fake PCH
` [Intel-gfx] [PATCH v3 07/28] drm/i915/dg1: Initialize RAWCLK properly
` [Intel-gfx] [PATCH v3 08/28] drm/i915/dg1: Define MOCS table for DG1
` [Intel-gfx] [PATCH v3 09/28] drm/i915/dg1: Add DG1 power wells
` [Intel-gfx] [PATCH v3 10/28] drm/i915/dg1: Increase mmio size to 4MB
` [Intel-gfx] [PATCH v3 11/28] drm/i915/dg1: Wait for pcode/uncore handshake at startup
` [Intel-gfx] [PATCH v3 12/28] drm/i915/dg1: Add DPLL macros for DG1
` [Intel-gfx] [PATCH v3 13/28] drm/i915/dg1: Add and setup DPLLs "
` [Intel-gfx] [PATCH v3 14/28] drm/i915/dg1: Enable DPLL "
` [Intel-gfx] [PATCH v3 15/28] drm/i915/dg1: add hpd interrupt handling
` [Intel-gfx] [PATCH v3 16/28] drm/i915/dg1: invert HPD pins
` [Intel-gfx] [PATCH v3 17/28] drm/i915/dg1: gmbus pin mapping
` [Intel-gfx] [PATCH v3 18/28] drm/i915/dg1: Enable first 2 ports for DG1
` [Intel-gfx] [PATCH v3 19/28] drm/i915/dg1: Don't program PHY_MISC for PHY-C and PHY-D
` [Intel-gfx] [PATCH v3 20/28] drm/i915/dg1: Update comp master/slave relationships for PHYs
` [Intel-gfx] [PATCH v3 21/28] drm/i915/dg1: Update voltage swing tables for DP
` [Intel-gfx] [PATCH v3 22/28] drm/i915/dg1: provide port/phy mapping for vbt
` [Intel-gfx] [PATCH v3 23/28] drm/i915/dg1: map/unmap pll clocks
` [Intel-gfx] [PATCH v3 24/28] drm/i915/dg1: enable PORT C/D aka D/E
` [Intel-gfx] [PATCH v3 25/28] drm/i915/dg1: Load DMC
` [Intel-gfx] [PATCH v3 26/28] drm/i915/rkl: Add initial workarounds
` [Intel-gfx] [PATCH v3 27/28] drm/i915/dg1: Add initial DG1 workarounds
` [Intel-gfx] [PATCH v3 28/28] drm/i915/dg1: DG1 does not support DC6
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce DG1 (rev3)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce DG1 (rev4)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH v2] drm/i915: Clamp min_cdclk to max_cdclk_freq to unblock 8K
2020-07-02 11:01 UTC (2+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Clamp min_cdclk to max_cdclk_freq to unblock 8K (rev2)
[Intel-gfx] [PATCH 00/59] Add support for Keem Bay DRM driver
2020-07-02 10:19 UTC (5+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for "
[Intel-gfx] [PATCH 1/8] drm/atomic-helper: reset vblank on crtc reset
2020-07-02 10:12 UTC (5+ messages)
` [Intel-gfx] [PATCH 3/8] drm/imx: Use __drm_atomic_helper_crtc_reset
[Intel-gfx] [PATCH 01/23] drm/i915: Drop vm.ref for duplicate vma on construction
2020-07-02 9:40 UTC (26+ messages)
` [Intel-gfx] [PATCH 02/23] drm/i915/gem: Split the context's obj:vma lut into its own mutex
` [Intel-gfx] [PATCH 03/23] drm/i915/gem: Drop forced struct_mutex from shrinker_taints_mutex
` [Intel-gfx] [PATCH 04/23] drm/i915/gem: Only revoke mmap handlers if active
` [Intel-gfx] [PATCH 05/23] drm/i915: Export ppgtt_bind_vma
` [Intel-gfx] [PATCH 06/23] drm/i915: Preallocate stashes for vma page-directories
` [Intel-gfx] [PATCH 07/23] drm/i915: Switch to object allocations for page directories
` [Intel-gfx] [PATCH 08/23] drm/i915/gem: Don't drop the timeline lock during execbuf
` [Intel-gfx] [PATCH 09/23] drm/i915/gem: Rename execbuf.bind_link to unbound_link
` [Intel-gfx] [PATCH 10/23] drm/i915/gem: Break apart the early i915_vma_pin from execbuf object lookup
` [Intel-gfx] [PATCH 11/23] drm/i915/gem: Remove the call for no-evict i915_vma_pin
` [Intel-gfx] [PATCH 12/23] drm/i915: Add list_for_each_entry_safe_continue_reverse
` [Intel-gfx] [PATCH 13/23] drm/i915: Always defer fenced work to the worker
` [Intel-gfx] [PATCH 14/23] drm/i915/gem: Assign context id for async work
` [Intel-gfx] [PATCH 15/23] drm/i915: Export a preallocate variant of i915_active_acquire()
` [Intel-gfx] [PATCH 16/23] drm/i915/gem: Separate the ww_mutex walker into its own list
` [Intel-gfx] [PATCH 17/23] drm/i915/gem: Asynchronous GTT unbinding
` [Intel-gfx] [PATCH 18/23] drm/i915/gem: Bind the fence async for execbuf
` [Intel-gfx] [PATCH 19/23] drm/i915/gem: Include cmdparser in common execbuf pinning
` [Intel-gfx] [PATCH 20/23] drm/i915/gem: Include secure batch "
` [Intel-gfx] [PATCH 21/23] drm/i915/gem: Reintroduce multiple passes for reloc processing
` [Intel-gfx] [PATCH 22/23] drm/i915: Add an implementation for i915_gem_ww_ctx locking, v2
` [Intel-gfx] [PATCH 23/23] drm/i915/gem: Pull execbuf dma resv under a single critical section
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/23] drm/i915: Drop vm.ref for duplicate vma on construction
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [PATCH 01/33] drm/i915/gt: Harden the heartbeat against a stuck driver
2020-07-02 9:39 UTC (40+ messages)
` [Intel-gfx] [PATCH 02/33] drm/i915/gt: Move the heartbeat into the highprio system wq
` [Intel-gfx] [PATCH 03/33] drm/i915/gt: Decouple completed requests on unwind
` [Intel-gfx] [PATCH 04/33] drm/i915/gt: Check for a completed last request once
` [Intel-gfx] [PATCH 05/33] drm/i915/gt: Replace direct submit with direct call to tasklet
` [Intel-gfx] [PATCH 06/33] drm/i915/gt: Use virtual_engine during execlists_dequeue
` [Intel-gfx] [PATCH 07/33] drm/i915/gt: Decouple inflight virtual engines
` [Intel-gfx] [PATCH 08/33] drm/i915/gt: Defer schedule_out until after the next dequeue
` [Intel-gfx] [PATCH 09/33] drm/i915/gt: Resubmit the virtual engine on schedule-out
` [Intel-gfx] [PATCH 10/33] drm/i915/gt: Simplify virtual engine handling for execlists_hold()
` [Intel-gfx] [PATCH 11/33] drm/i915/gt: ce->inflight updates are now serialised
` [Intel-gfx] [PATCH 12/33] drm/i915/gt: Drop atomic for engine->fw_active tracking
` [Intel-gfx] [PATCH 13/33] drm/i915/gt: Extract busy-stats for ring-scheduler
` [Intel-gfx] [PATCH 14/33] drm/i915/gt: Convert stats.active to plain unsigned int
` [Intel-gfx] [PATCH 15/33] drm/i915: Lift waiter/signaler iterators
` [Intel-gfx] [PATCH 16/33] drm/i915: Strip out internal priorities
` [Intel-gfx] [PATCH 17/33] drm/i915: Remove I915_USER_PRIORITY_SHIFT
` [Intel-gfx] [PATCH 18/33] drm/i915: Replace engine->schedule() with a known request operation
` [Intel-gfx] [PATCH 19/33] drm/i915/gt: Do not suspend bonded requests if one hangs
` [Intel-gfx] [PATCH 20/33] drm/i915: Teach the i915_dependency to use a double-lock
` [Intel-gfx] [PATCH 21/33] drm/i915: Restructure priority inheritance
` [Intel-gfx] [PATCH 22/33] drm/i915/gt: Remove timeslice suppression
` [Intel-gfx] [PATCH 23/33] drm/i915: Fair low-latency scheduling
` [Intel-gfx] [PATCH 24/33] drm/i915/gt: Specify a deadline for the heartbeat
` [Intel-gfx] [PATCH 25/33] drm/i915: Replace the priority boosting for the display with a deadline
` [Intel-gfx] [PATCH 26/33] drm/i915: Move saturated workload detection to the GT
` [Intel-gfx] [PATCH 27/33] Restore "drm/i915: drop engine_pin/unpin_breadcrumbs_irq"
` [Intel-gfx] [PATCH 28/33] drm/i915/gt: Couple tasklet scheduling for all CS interrupts
` [Intel-gfx] [PATCH 29/33] drm/i915/gt: Support creation of 'internal' rings
` [Intel-gfx] [PATCH 30/33] drm/i915/gt: Use client timeline address for seqno writes
` [Intel-gfx] [PATCH 31/33] drm/i915/gt: Infrastructure for ring scheduling
` [Intel-gfx] [PATCH 32/33] drm/i915/gt: Implement ring scheduler for gen6/7
` [Intel-gfx] [PATCH 33/33] drm/i915/gt: Enable ring scheduling "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/33] drm/i915/gt: Harden the heartbeat against a stuck driver
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH 1/3] drm/i915: Try to use fast+narrow link on eDP again and fall back to the old max strategy on failure
2020-07-02 9:21 UTC (2+ messages)
[Intel-gfx] [PATCH v2] drm/i915/dp: Correctly advertise HBR3 for GEN11+
2020-07-02 9:06 UTC (6+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/dp: Correctly advertise HBR3 for GEN11+ (rev2)
` [Intel-gfx] ✓ Fi.CI.IGT: success "
[Intel-gfx] [PATCH] drm/i915: Fix the old vs. new epoch counter check during hotplug detect
2020-07-02 8:37 UTC (8+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
` [Intel-gfx] ✓ Fi.CI.IGT: success "
[Intel-gfx] [PATCH 1/2] Revert "dma-buf: Report signaled links inside dma-fence-chain"
2020-07-02 8:28 UTC (4+ messages)
[Intel-gfx] [PULL] drm-misc-fixes
2020-07-02 7:51 UTC
[Intel-gfx] [PATCH v5 1/2] drm/i915/dp: Helper for checking DDI_BUF_CTL Idle status
2020-07-02 2:29 UTC (5+ messages)
` [Intel-gfx] [PATCH v5 2/2] drm/i915/dp: Helper to check for DDI BUF status to get active
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v5,1/2] drm/i915/dp: Helper for checking DDI_BUF_CTL Idle status
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915: do not read swizzle info if unavailable
2020-07-02 1:08 UTC (5+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915/guc: Expand guc_info debugfs with more information
2020-07-01 22:06 UTC (5+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v1] drm/i915: Clamp min_cdclk to max_cdclk_freq to unblock 8K
2020-07-01 19:13 UTC (6+ messages)
[Intel-gfx] [PATCH] drm/i915/dmc: Use firmware v2.02 for RKL
2020-07-01 18:17 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH v2 0/6] display/ddi: keep register indexes in a table
2020-07-01 17:24 UTC (20+ messages)
` [Intel-gfx] [PATCH v2 2/6] drm/i915/display: fix comment on skl straps
` [Intel-gfx] [PATCH v2 3/6] drm/i915/display: start description-based ddi initialization
` [Intel-gfx] [PATCH v2 4/6] drm/i915/display: add phy, vbt and ddi indexes
` [Intel-gfx] [PATCH v2 5/6] drm/i915/display: use port_info in intel_ddi_init
` [Intel-gfx] [PATCH v2 6/6] drm/i915/display: replace port to phy conversions in intel_ddi.c
[Intel-gfx] [PATCH] drm/i915: Reboot CI if we get wedged during driver init
2020-07-01 17:03 UTC (4+ messages)
[Intel-gfx] [PATCH 1/2] drm/i915/gt: Harden the heartbeat against a stuck driver
2020-07-01 16:46 UTC (10+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Move the heartbeat into the highprio system wq
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/gt: Harden the heartbeat against a stuck driver
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] [PATCH] "
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with drm/i915/gt: Harden the heartbeat against a stuck driver (rev2)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [CI] drm/i915/gem: Move obj->lut_list under its own lock
2020-07-01 16:01 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PULL] drm-intel-fixes
2020-07-01 13:19 UTC
[Intel-gfx] [PATCH 01/26] Revert "drm/i915/gem: Async GPU relocations only"
2020-07-01 13:10 UTC (2+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [01/26] Revert "drm/i915/gem: Async GPU relocations only" (rev2)
[Intel-gfx] [PATCH i-g-t] i915/gem_close_race: Mix in a contexts and a small delay to closure
2020-07-01 13:09 UTC (3+ messages)
` [Intel-gfx] [igt-dev] "
[Intel-gfx] [PATCH 1/2] drm/i915/tgl+: Fix TBT DPLL fractional divider for 38.4MHz ref clock
2020-07-01 12:45 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] "
[Intel-gfx] [PATCH v2 1/2] drm/i915/tgl: Implement WA 18011464164
2020-07-01 11:59 UTC (5+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [CI] drm/i915/display: prefer dig_port to reference intel_digital_port
2020-07-01 11:07 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v3] drm/i915/hdcp: Update CP as per the kernel internal state
2020-07-01 8:01 UTC (4+ messages)
[Intel-gfx] [PATCH 00/12] drm/i915: Futher hotplug cleanups
2020-07-01 6:53 UTC (2+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for "
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