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 messages from 2020-07-24 11:54:10 to 2020-07-28 19:36:41 UTC [more...]

[Intel-gfx] [PATCH v5 00/16] acpi/pwm/i915: Convert pwm-crc and i915 driver's PWM code to use the atomic PWM API
 2020-07-28 19:36 UTC  (8+ messages)
` [Intel-gfx] [PATCH v5 05/16] pwm: lpss: Add pwm_lpss_prepare_enable() helper
` [Intel-gfx] [PATCH v5 06/16] pwm: lpss: Use pwm_lpss_apply() when restoring state on resume
` [Intel-gfx] [PATCH v5 07/16] pwm: crc: Fix period / duty_cycle times being off by a factor of 256

[Intel-gfx] [PATCH] drm/i915/gt: Delay taking the spinlock for grabbing from the buffer pool
 2020-07-28 19:36 UTC  (4+ messages)

[Intel-gfx] [PATCH 1/2] drm/i915/gem: Serialise debugfs i915_gem_objects with ctx->mutex
 2020-07-28 19:22 UTC  (3+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i915/gem: Reduce ctx->engine_mutex for reading the clone source
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/gem: Serialise debugfs i915_gem_objects with ctx->mutex

[Intel-gfx] [PATCH 01/12] drm/i915: Remove gen check before calling intel_rps_boost
 2020-07-28 19:19 UTC  (15+ messages)
` [Intel-gfx] [PATCH 02/12] drm/i915: Remove requirement for holding i915_request.lock for breadcrumbs
` [Intel-gfx] [PATCH 03/12] drm/i915/gt: Replace intel_engine_transfer_stale_breadcrumbs
` [Intel-gfx] [PATCH 04/12] drm/i915/gt: Only transfer the virtual context to the new engine if active
` [Intel-gfx] [PATCH 05/12] drm/i915/gt: Distinguish the virtual breadcrumbs from the irq breadcrumbs
` [Intel-gfx] [PATCH 06/12] drm/i915/gt: Move intel_breadcrumbs_arm_irq earlier
` [Intel-gfx] [PATCH 07/12] drm/i915/gt: Hold context/request reference while breadcrumbs are active
` [Intel-gfx] [PATCH 08/12] drm/i915/gt: Track signaled breadcrumbs outside of the breadcrumb spinlock
` [Intel-gfx] [PATCH 09/12] drm/i915/gt: Protect context lifetime with RCU
` [Intel-gfx] [PATCH 10/12] drm/i915/gt: Split the breadcrumb spinlock between global and contexts
` [Intel-gfx] [PATCH 11/12] drm/i915: Drop i915_request.lock serialisation around await_start
` [Intel-gfx] [PATCH 12/12] drm/i915: Drop i915_request.lock requirement for intel_rps_boost()
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/12] drm/i915: Remove gen check before calling intel_rps_boost
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "

[Intel-gfx] [CI] drm/i915: Remove gen check before calling intel_rps_boost
 2020-07-28 18:53 UTC  (3+ messages)
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Remove gen check before calling intel_rps_boost (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "

[Intel-gfx] [CI] drm/i915: Filter wake_flags passed to default_wake_function
 2020-07-28 18:26 UTC  (2+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Filter wake_flags passed to default_wake_function (rev2)

[Intel-gfx] [CI 1/2] drm/i915/gt: Disable preparser around xcs invalidations on tgl
 2020-07-28 17:36 UTC  (5+ messages)
` [Intel-gfx] [CI 2/2] drm/i915/selftests: Add compiler paranoia for checking HWSP values
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] drm/i915/gt: Disable preparser around xcs invalidations on tgl
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "

[Intel-gfx] [CI] drm/i915/gem: Remove disordered per-file request list for throttling
 2020-07-28 17:10 UTC  (3+ messages)
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gem: Remove disordered per-file request list for throttling (rev5)
` [Intel-gfx] ✓ Fi.CI.BAT: success "

[Intel-gfx] [PATCH v5 00/22] Introduce DG1
 2020-07-28 16:35 UTC  (27+ messages)
` [Intel-gfx] [PATCH v5 01/22] drm/i915/dg1: Initialize RAWCLK properly
` [Intel-gfx] [PATCH v5 02/22] drm/i915/dg1: Define MOCS table for DG1
` [Intel-gfx] [PATCH v5 03/22] drm/i915/dg1: Add DG1 power wells
` [Intel-gfx] [PATCH v5 04/22] drm/i915/dg1: Increase mmio size to 4MB
` [Intel-gfx] [PATCH v5 05/22] drm/i915/dg1: Wait for pcode/uncore handshake at startup
` [Intel-gfx] [PATCH v5 06/22] drm/i915/dg1: Add DPLL macros for DG1
` [Intel-gfx] [PATCH v5 07/22] drm/i915/dg1: Add and setup DPLLs "
` [Intel-gfx] [PATCH v5 08/22] drm/i915/dg1: Enable DPLL "
` [Intel-gfx] [PATCH v5 09/22] drm/i915/dg1: add hpd interrupt handling
` [Intel-gfx] [PATCH v5 10/22] drm/i915/dg1: invert HPD pins
` [Intel-gfx] [PATCH v5 11/22] drm/i915/dg1: gmbus pin mapping
` [Intel-gfx] [PATCH v5 12/22] drm/i915/dg1: Enable first 2 ports for DG1
` [Intel-gfx] [PATCH v5 13/22] drm/i915/dg1: Don't program PHY_MISC for PHY-C and PHY-D
` [Intel-gfx] [PATCH v5 14/22] drm/i915/dg1: Update comp master/slave relationships for PHYs
` [Intel-gfx] [PATCH v5 15/22] drm/i915/dg1: Update voltage swing tables for DP
` [Intel-gfx] [PATCH v5 16/22] drm/i915/dg1: provide port/phy mapping for vbt
` [Intel-gfx] [PATCH v5 17/22] drm/i915/dg1: map/unmap pll clocks
` [Intel-gfx] [PATCH v5 18/22] drm/i915/dg1: enable PORT C/D aka D/E
` [Intel-gfx] [PATCH v5 19/22] drm/i915/dg1: Load DMC
` [Intel-gfx] [PATCH v5 20/22] drm/i915/dg1: Add initial DG1 workarounds
` [Intel-gfx] [PATCH v5 21/22] drm/i915/dg1: DG1 does not support DC6
` [Intel-gfx] [PATCH v5 22/22] drm/i915/dg1: Change DMC_DEBUG{1, 2} registers
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce DG1
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "

[Intel-gfx] [PATCH 1/3] drm: Restore driver.preclose() for all to use
 2020-07-28 16:27 UTC  (5+ messages)

[Intel-gfx] [PATCH 1/3] drm/i915: Preallocate stashes for vma page-directories
 2020-07-28 15:41 UTC  (4+ messages)
` [Intel-gfx] [PATCH 2/3] drm/i915/gt: Switch to object allocations for page directories
` [Intel-gfx] [PATCH 3/3] drm/i915/gt: Shrink i915_page_directory's slab bucket

[Intel-gfx] [CI] drm/i915: Copy default modparams to mock i915_device
 2020-07-28 15:34 UTC  (3+ messages)
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Copy default modparams to mock i915_device (rev4)
` [Intel-gfx] ✓ Fi.CI.BAT: success "

[Intel-gfx] [PATCH] drm/i915/selftests: Flush the active barriers before asserting
 2020-07-28 15:33 UTC 

[Intel-gfx] [PATCH 1/7] drm/i915: Add a couple of missing i915_active_fini()
 2020-07-28 15:30 UTC  (7+ messages)
` [Intel-gfx] [PATCH 2/7] drm/i915: Skip taking acquire mutex for no ref->active callback
` [Intel-gfx] [PATCH 3/7] drm/i915: Export a preallocate variant of i915_active_acquire()
` [Intel-gfx] [PATCH 4/7] drm/i915: Keep the most recently used active-fence upon discard
` [Intel-gfx] [PATCH 5/7] drm/i915: Make the stale cached active node available for any timeline
` [Intel-gfx] [PATCH 6/7] drm/i915: Reduce locking around i915_active_acquire_preallocate_barrier()
` [Intel-gfx] [PATCH 7/7] drm/i915: Provide a fastpath for waiting on vma bindings

[Intel-gfx] [PATCH 1/2] drm/i915/gem: Reduce ctx->engine_mutex for reading the clone source
 2020-07-28 15:28 UTC  (2+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i915/gem: Reduce ctx->engines_mutex for get_engines()

[Intel-gfx] [PATCH 01/66] drm/i915: Reduce i915_request.lock contention for i915_request_wait
 2020-07-28 15:16 UTC  (38+ messages)
` [Intel-gfx] [PATCH 07/66] drm/i915: Keep the most recently used active-fence upon discard
` [Intel-gfx] [PATCH 08/66] drm/i915: Make the stale cached active node available for any timeline
` [Intel-gfx] [PATCH 09/66] drm/i915: Provide a fastpath for waiting on vma bindings
` [Intel-gfx] [PATCH 11/66] drm/i915: Preallocate stashes for vma page-directories
` [Intel-gfx] [PATCH 13/66] drm/i915/gem: Don't drop the timeline lock during execbuf
` [Intel-gfx] [PATCH 16/66] drm/i915/gem: Remove the call for no-evict i915_vma_pin
` [Intel-gfx] [PATCH 22/66] drm/i915/gem: Bind the fence async for execbuf
` [Intel-gfx] [PATCH 27/66] drm/i915/gem: Pull execbuf dma resv under a single critical section
` [Intel-gfx] [PATCH 28/66] drm/i915/gem: Replace i915_gem_object.mm.mutex with reservation_ww_class

[Intel-gfx] [PATCH] dma-resv: lockdep-prime address_space->i_mmap_rwsem for dma-resv
 2020-07-28 14:30 UTC  (3+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "

[Intel-gfx] Flashing display after link training failure (Bug 1378)
 2020-07-28 13:01 UTC 

[Intel-gfx] [PULL] drm-misc-fixes
 2020-07-28 11:04 UTC 

[Intel-gfx] [PATCH 0/6] vga-switcheroo: initial dynamic mux switch support
 2020-07-28  9:32 UTC  (12+ messages)
  ` [Intel-gfx] [PATCH 1/6] vga-switcheroo: add new "immediate" switch event type
  ` [Intel-gfx] [PATCH 2/6] vga-switcheroo: Add a way to test for the active client
  ` [Intel-gfx] [PATCH 3/6] vga-switcheroo: notify clients of pending/completed switch events
  ` [Intel-gfx] [PATCH 4/6] i915: implement vga-switcheroo reprobe() callback
  ` [Intel-gfx] [PATCH 5/6] i915: fail atomic commit when muxed away
  ` [Intel-gfx] [PATCH 6/6] i915: bail out of eDP link training while mux-switched away
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/6] vga-switcheroo: add new "immediate" switch event type
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH 1/3] drm/i915/gt: Disable preparser around xcs invalidations on tgl
 2020-07-28  8:40 UTC  (9+ messages)
` [Intel-gfx] [PATCH 2/3] drm/i915/gt: Stall "
` [Intel-gfx] [PATCH 3/3] drm/i915/selftests: Add compiler paranoia for checking HWSP values
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915/gt: Disable preparser around xcs invalidations on tgl
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "

[Intel-gfx] [v2] drm/i915/display/fbc: Disable fbc by default on TGL
 2020-07-28  8:21 UTC  (3+ messages)

[Intel-gfx] [PATCH v5 0/5] Asynchronous flip implementation for i915
 2020-07-28  7:37 UTC  (9+ messages)
` [Intel-gfx] [PATCH v5 1/5] drm/i915: Add enable/disable flip done and flip done handler
` [Intel-gfx] [PATCH v5 2/5] drm/i915: Add support for async flips in I915

[Intel-gfx] [PATCH] drm/amdgpu/dc: Stop dma_resv_lock inversion in commit_tail
 2020-07-28  6:56 UTC  (6+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH] drm/i915/display: Ensure that ret is always initialized in icl_combo_phy_verify_state
 2020-07-28  4:08 UTC  (4+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for "

[Intel-gfx] linux-next: manual merge of the drm tree with the drm-misc-fixes tree
 2020-07-28  3:41 UTC 

[Intel-gfx] [PULL] gvt-next
 2020-07-28  3:18 UTC  (5+ messages)

[Intel-gfx] [PATCH CI] drm/i915: Implement WA 14011294188
 2020-07-28  1:45 UTC  (5+ messages)
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Implement WA 14011294188 (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH 3/3] drm/i915/gem: Serialise debugfs i915_gem_objects with ctx->mutex
 2020-07-27 21:24 UTC  (2+ messages)

[Intel-gfx] [PATCH 0/4] Allow privileged user to map the OA buffer
 2020-07-27 19:34 UTC  (13+ messages)
` [Intel-gfx] [PATCH 3/4] drm/i915/perf: Whitelist OA counter and buffer registers
` [Intel-gfx] [PATCH 4/4] drm/i915/perf: Map OA buffer to user space for gen12 performance query

[Intel-gfx] s/obj->mm.lock//
 2020-07-27 18:53 UTC  (2+ messages)

[Intel-gfx] [PATCH v8 00/12] Introduce CAP_PERFMON to secure system performance monitoring and observability
 2020-07-22 11:30 UTC  (10+ messages)

[Intel-gfx] [PATCH] drm/i915: Don't force IOSF_MBI
 2020-07-20  9:29 UTC  (3+ messages)

[Intel-gfx] [Mesa-dev] [XDC 2020] Virtual conference + Call for Proposals extended 2 weeks more
 2020-07-20  7:41 UTC 

[Intel-gfx] [PATCH 03/25] dma-buf.rst: Document why idenfinite fences are a bad idea
 2020-07-22 14:23 UTC  (18+ messages)
` [Intel-gfx] [PATCH 1/2] dma-buf.rst: Document why indefinite "
  ` [Intel-gfx] [Linaro-mm-sig] "

[Intel-gfx] [PATCH] drm/i915: Reduce register reads around GT interrupts
 2020-07-27 10:45 UTC  (5+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH 0/2] Expose crtc dither state and connector max bpc via debugfs
 2020-07-26 13:04 UTC  (7+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Expose crtc dither state and connector max bpc via debugfs (rev3)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
` [Intel-gfx] [PATCH 1/2] i915/debug: Expose crtc dither state via debugfs
` [Intel-gfx] [PATCH 2/2] i915/debug: Expose Max BPC info "

[Intel-gfx] [PATCH i-g-t] drm_import_export: Check for working and known GPU
 2020-07-25  8:54 UTC 

[Intel-gfx] [PATCH] drm/i915: Implement WA 14011294188
 2020-07-25  3:08 UTC  (2+ messages)

[Intel-gfx] [PATCH] drm/i915: Apply Wa_14011264657:gen11+
 2020-07-24 22:08 UTC  (3+ messages)

[Intel-gfx] [PATCH] drm/i915: Correct location of Wa_1408615072
 2020-07-24 21:21 UTC  (2+ messages)

[Intel-gfx] [PATCH] drm/i915/gt: Delay taking the spinlock for grabbing from the buffer pool
 2020-07-24 18:31 UTC  (6+ messages)
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gt: Delay taking the spinlock for grabbing from the buffer pool (rev2)
` [Intel-gfx] ✗ Fi.CI.BAT: failure "

[Intel-gfx] [PATCH i-g-t 1/4] lib/i915: Identify Rocketlake
 2020-07-24 17:06 UTC  (4+ messages)
` [Intel-gfx] [PATCH i-g-t 2/4] lib/i915: Report unknown device as the future
` [Intel-gfx] [PATCH i-g-t 3/4] tools: Use the gt number stored in the device info
` [Intel-gfx] [PATCH i-g-t 4/4] lib/i915: Pick a subtest conformant name for an unknown engine

[Intel-gfx] [PATCH] drm/i915/gem: Delay tracking the GEM context until it is registered
 2020-07-24 12:56 UTC  (9+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gem: Delay tracking the GEM context until it is registered (rev2)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "


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