messages from 2020-08-09 06:17:57 to 2020-08-12 13:24:44 UTC [more...]
[Intel-gfx] [PULL] drm-misc-fixes
2020-08-12 13:24 UTC
[Intel-gfx] [PULL] drm-intel-next-fixes
2020-08-12 12:49 UTC (3+ messages)
[Intel-gfx] [PATCH v7 00/17] drm/i915: Add support for HDCP 1.4 over MST
2020-08-12 8:18 UTC (14+ messages)
` [Intel-gfx] [PATCH v7 15/17] drm/mst: Add support for QUERY_STREAM_ENCRYPTION_STATUS MST sideband message
` [Intel-gfx] [PATCH v7 17/17] drm/i915: Add HDCP 1.4 support for MST connectors
[Intel-gfx] [PATCH 00/24] drm/i915: Correct the locking hierarchy in gem
2020-08-12 7:56 UTC (45+ messages)
` [Intel-gfx] [PATCH 01/24] Revert "drm/i915/gem: Async GPU relocations only"
` [Intel-gfx] [PATCH 02/24] drm/i915: Revert relocation chaining commits
` [Intel-gfx] [PATCH 03/24] Revert "drm/i915/gem: Drop relocation slowpath"
` [Intel-gfx] [PATCH 04/24] Revert "drm/i915/gem: Split eb_vma into its own allocation"
` [Intel-gfx] [PATCH 05/24] drm/i915: Add an implementation for i915_gem_ww_ctx locking, v2
` [Intel-gfx] [PATCH 06/24] drm/i915: Remove locking from i915_gem_object_prepare_read/write
` [Intel-gfx] [PATCH 07/24] drm/i915: Parse command buffer earlier in eb_relocate(slow)
` [Intel-gfx] [PATCH 08/24] drm/i915: Use per object locking in execbuf, v12
` [Intel-gfx] [PATCH 09/24] drm/i915: make lockdep slightly happier about execbuf
` [Intel-gfx] [PATCH 1/1] dummy empty commit
` [Intel-gfx] [PATCH 10/24] drm/i915: Use ww locking in intel_renderstate
` [Intel-gfx] [PATCH 11/24] drm/i915: Add ww context handling to context_barrier_task
` [Intel-gfx] [PATCH 12/24] drm/i915: Nuke arguments to eb_pin_engine
` [Intel-gfx] [PATCH 13/24] drm/i915: Pin engine before pinning all objects, v5
` [Intel-gfx] [PATCH 14/24] drm/i915: Rework intel_context pinning to do everything outside of pin_mutex
` [Intel-gfx] [PATCH 15/24] drm/i915: Make sure execbuffer always passes ww state to i915_vma_pin
` [Intel-gfx] [PATCH 16/24] drm/i915: Convert i915_gem_object/client_blt.c to use ww locking as well, v2
` [Intel-gfx] [PATCH 17/24] drm/i915: Kill last user of intel_context_create_request outside of selftests
` [Intel-gfx] [PATCH 18/24] drm/i915: Convert i915_perf to ww locking as well
` [Intel-gfx] [PATCH 19/24] drm/i915: Dirty hack to fix selftests locking inversion
` [Intel-gfx] [PATCH 20/24] drm/i915/selftests: Fix locking inversion in lrc selftest
` [Intel-gfx] [PATCH 21/24] drm/i915: Use ww pinning for intel_context_create_request()
` [Intel-gfx] [PATCH 22/24] drm/i915: Move i915_vma_lock in the selftests to avoid lock inversion, v3
` [Intel-gfx] [PATCH 23/24] drm/i915: Add ww locking to vm_fault_gtt
` [Intel-gfx] [PATCH 24/24] drm/i915: Add ww locking to pin_to_display_plane
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Correct the locking hierarchy in gem
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [PATCH] drm/i915/gt:fix raw-wakeref not held calltrace in vGPU
2020-08-12 2:06 UTC (12+ messages)
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
` [Intel-gfx] [PATCH] drm/i915: Drop runtime-pm assert from vgpu io accessors
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gt:fix raw-wakeref not held calltrace in vGPU (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [RFC 00/20] drm/dp, i915, nouveau: Cleanup nouveau HPD and add DP features from i915
2020-08-12 0:14 UTC (36+ messages)
` [Intel-gfx] [RFC 01/20] drm/nouveau/kms: Fix some indenting in nouveau_dp_detect()
` [Intel-gfx] [RFC 02/20] drm/nouveau/kms/nv50-: Remove open-coded drm_dp_read_desc()
` [Intel-gfx] [RFC 03/20] drm/nouveau/kms/nv50-: Just use drm_dp_dpcd_read() in nouveau_dp.c
` [Intel-gfx] [RFC 04/20] drm/nouveau/kms/nv50-: Use macros for DP registers "
` [Intel-gfx] [RFC 05/20] drm/nouveau/kms: Don't clear DP_MST_CTRL DPCD in nv50_mstm_new()
` [Intel-gfx] [RFC 06/20] drm/nouveau/kms: Search for encoders' connectors properly
` [Intel-gfx] [RFC 07/20] drm/nouveau/kms/nv50-: Use drm_dp_dpcd_(readb|writeb)() in nv50_sor_disable()
` [Intel-gfx] [RFC 08/20] drm/nouveau/kms/nv50-: Refactor and cleanup DP HPD handling
` [Intel-gfx] [RFC 09/20] drm/i915/dp: Extract drm_dp_has_mst()
` [Intel-gfx] [RFC 10/20] drm/nouveau/kms: Use new drm_dp_has_mst() helper for checking MST caps
` [Intel-gfx] [RFC 11/20] drm/nouveau/kms: Move drm_dp_cec_unset_edid() into nouveau_connector_detect()
` [Intel-gfx] [RFC 12/20] drm/nouveau/kms: Only use hpd_work for reprobing in HPD paths
` [Intel-gfx] [RFC 13/20] drm/i915/dp: Extract drm_dp_downstream_read_info()
` [Intel-gfx] [RFC 14/20] drm/nouveau/kms/nv50-: Use downstream DP clock limits for mode validation
` [Intel-gfx] [RFC 15/20] drm/i915/dp: Extract drm_dp_has_sink_count()
` [Intel-gfx] [RFC 16/20] drm/i915/dp: Extract drm_dp_get_sink_count()
` [Intel-gfx] [RFC 17/20] drm/nouveau/kms/nv50-: Add support for DP_SINK_COUNT
` [Intel-gfx] [RFC 18/20] drm/nouveau/kms: Don't change EDID when it hasn't actually changed
` [Intel-gfx] [RFC 19/20] drm/i915/dp: Extract drm_dp_read_dpcd_caps()
` [Intel-gfx] [RFC 20/20] drm/nouveau/kms: Start using drm_dp_read_dpcd_caps()
` [Intel-gfx] [Nouveau] "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/dp, i915, nouveau: Cleanup nouveau HPD and add DP features from i915
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/dp, i915, nouveau: Cleanup nouveau HPD and add DP features from i915 (rev2)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/dp, i915, nouveau: Cleanup nouveau HPD and add DP features from i915 (rev3)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [PATCH v6 01/11] HAX to make DSC work on the icelake test system
2020-08-11 20:15 UTC (18+ messages)
` [Intel-gfx] [PATCH v6 03/11] drm/i915: Add hw.pipe_mode to allow bigjoiner pipe/transcoder split
` [Intel-gfx] [PATCH v6 04/11] drm/i915/dp: Allow big joiner modes in intel_dp_mode_valid(), v3
` [Intel-gfx] [PATCH v6 06/11] drm/i915: Enable big joiner support in enable and disable sequences
` [Intel-gfx] [PATCH v6 11/11] drm/i915: Add debugfs dumping for bigjoiner, v3
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v6,01/11] HAX to make DSC work on the icelake test system (rev3)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v6,01/11] HAX to make DSC work on the icelake test system (rev4)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [drm-intel:drm-intel-next-queued 27/28] drivers/gpu/drm/i915/gt/gen6_ppgtt.c:263:6-8: ERROR: iterator variable bound on line 262 cannot be NULL
2020-08-11 19:41 UTC (2+ messages)
` [Intel-gfx] [PATCH] drm/i915/gt: fix itnull.cocci warnings
[Intel-gfx] [PATCH CI 1/2] drm/i915: Initial implementation of PSR2 selective fetch
2020-08-11 16:20 UTC (11+ messages)
` [Intel-gfx] [PATCH CI 2/2] drm/i915/display: Implement WA 1408330847
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] drm/i915: Initial implementation of PSR2 selective fetch
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] drm/i915: Initial implementation of PSR2 selective fetch (rev2)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH] drm/i915/kbl: Fix revision ID checks
2020-08-11 16:18 UTC (9+ messages)
` [Intel-gfx] [PATCH v2] "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/kbl: Fix revision ID checks (rev2)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/kbl: Fix revision ID checks (rev3)
[Intel-gfx] [PATCH] drm/i915/selftests: Confirm RING_TIMESTAMP / CTX_TIMESTAMP share a clock
2020-08-11 15:47 UTC (6+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Confirm RING_TIMESTAMP / CTX_TIMESTAMP share a clock (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] i915/gem: Force HW tracking to exit PSR
2020-08-11 11:27 UTC (8+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915/gem: Force HW tracking to exit PSR (rev2)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [RFC 00/60] DG1 LMEM enabling
2020-08-11 10:48 UTC (7+ messages)
` [Intel-gfx] [RFC 33/60] drm/i915/lmem: support pwrite
[Intel-gfx] [PATCH] drm/i915: Don't try to check max stride for disabled/non-existent display
2020-08-11 3:44 UTC (6+ messages)
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 0/2] drm/i915/guc: Update to GuC v45
2020-08-11 1:04 UTC (3+ messages)
` [Intel-gfx] [PATCH 1/2] drm/i915/guc: Update to GuC v45.0.0
[Intel-gfx] [PATCH v6] Add support for KeemBay DRM driver
2020-08-11 1:04 UTC (5+ messages)
` [Intel-gfx] [PATCH v6] drm/kmb: Add support for KeemBay Display
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/kmb: Add support for KeemBay Display (rev4)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH v7 06/11] drm/i915: Enable big joiner support in enable and disable sequences
2020-08-10 23:28 UTC (2+ messages)
` [Intel-gfx] [PATCH v8 "
[Intel-gfx] [PATCH] drm/i915/display: Fix NV12 sub plane atomic state
2020-08-10 18:13 UTC (7+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH CI 1/2] drm/i915/tgl: Set subplatforms
2020-08-10 17:33 UTC (3+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [CI,1/2] "
[Intel-gfx] [PATCH] drm/i915/selftests: Confirm RING_TIMESTAMP / CTX_TIMESTAMP share a clock
2020-08-10 16:17 UTC (4+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [PATCH v3 1/2] drm/i915: Initial implementation of PSR2 selective fetch
2020-08-10 14:53 UTC (4+ messages)
` [Intel-gfx] [PATCH v3 2/2] drm/i915/display: Implement WA 1408330847
[Intel-gfx] [PATCH] dma-buf.rst: repair length of title underline
2020-08-10 13:06 UTC (5+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915/vlv_dsi_pll: fix spelling mistake "Cant" -> "Can't"
2020-08-10 13:22 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH i-g-t] i915/perf_pmu: Emit a semaphore to measure
2020-08-10 12:44 UTC
[Intel-gfx] [PATCH 1/3] drm/i915/gt: Signal cancelled requests
2020-08-10 12:06 UTC (6+ messages)
` [Intel-gfx] [PATCH 2/3] drm/i915/selftests: Finish pending mock requests on cancellation
` [Intel-gfx] [PATCH 3/3] drm/i915/gt: Retire cancelled requests on unload
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/3] drm/i915/gt: Signal cancelled requests
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH 00/37] Replace obj->mm.lock with reservation_ww_class
2020-08-10 9:51 UTC (4+ messages)
[Intel-gfx] [PATCH i-g-t v2 00/16] tests/core_hotunplug: Fixes and enhancements
2020-08-10 9:33 UTC (2+ messages)
[Intel-gfx] [PATCH i-g-t] lib: Use unsigned gen for forward compatible tests
2020-08-10 8:56 UTC (4+ messages)
` [Intel-gfx] [igt-dev] "
[Intel-gfx] [PATCH v5 00/22] Introduce DG1
2020-08-10 5:48 UTC (6+ messages)
` [Intel-gfx] [PATCH v5 22/22] drm/i915/dg1: Change DMC_DEBUG{1, 2} registers
[Intel-gfx] [drm-tip:drm-tip 2191/2285] include/drm/ttm/ttm_bo_driver.h:644 ttm_bo_reserve() warn: inconsistent returns
2020-08-10 5:33 UTC
[Intel-gfx] [drm-tip:drm-tip 2214/2285] drivers/gpu/drm/vmwgfx/vmwgfx_drv.c:646:2: error: implicit declaration of function 'ttm_bo_man_fini'
2020-08-10 5:15 UTC
[Intel-gfx] Time, where did it go?
2020-08-09 20:01 UTC (6+ messages)
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