messages from 2021-01-28 08:05:09 to 2021-01-29 17:09:55 UTC [more...]
[Intel-gfx] [PATCH 01/41] drm/i915/selftests: Check for engine-reset errors in the middle of workarounds
2021-01-29 17:01 UTC (22+ messages)
` [Intel-gfx] [PATCH 20/41] drm/i915: Replace priolist rbtree with a skiplist
` [Intel-gfx] [PATCH 22/41] drm/i915: Fair low-latency scheduling
[Intel-gfx] [PATCH 1/5] drm/i915: Skip vswing programming for TBT
2021-01-29 17:06 UTC (11+ messages)
` [Intel-gfx] [PATCH 2/5] drm/i915: Extract intel_ddi_power_up_lanes()
` [Intel-gfx] [PATCH 3/5] drm/i915: Power up combo PHY lanes for for HDMI as well
` [Intel-gfx] [PATCH 4/5] drm/i915: Move HDMI vswing programming to the right place
` [Intel-gfx] [PATCH 5/5] drm/i915: Don't check tc_mode unless dealing with a TC PHY
` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/5] drm/i915: Skip vswing programming for TBT
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915: Skip vswing programming for TBT (rev2)
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v14 1/2] drm/i915/display: Support PSR Multiple Instances
2021-01-29 16:58 UTC (6+ messages)
` [Intel-gfx] [PATCH v14 2/2] drm/i915/display: Support Multiple Transcoders' PSR status on debugfs
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v14,1/2] drm/i915/display: Support PSR Multiple Instances
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 1/2] drm/i915/display: Add a intel_pipe_is_enabled() helper
2021-01-29 16:38 UTC (3+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i915/display: Make vlv_find_free_pps() skip pipes which are in use for non DP purposes
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [1/2] drm/i915/display: Add a intel_pipe_is_enabled() helper
[Intel-gfx] [PATCH] drm/i915: Add missing -EDEADLK path in execbuffer ggtt pinning
2021-01-29 16:09 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
[Intel-gfx] [PATCH] drm/i915/debugfs: HDCP capability enc NULL check
2021-01-29 15:43 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v14 1/2] drm/i915/display: Support PSR Multiple Instances
2021-01-29 15:35 UTC (6+ messages)
` [Intel-gfx] [PATCH v14 2/2] drm/i915/display: Support Multiple Transcoders' PSR status on debugfs
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v14,1/2] drm/i915/display: Support PSR Multiple Instances
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v7 00/63] drm/i915: Remove obj->mm.lock!
2021-01-29 15:28 UTC (74+ messages)
` [Intel-gfx] [PATCH v7 01/63] drm/i915: Do not share hwsp across contexts any more, v7
` [Intel-gfx] [PATCH v7 02/63] drm/i915: Pin timeline map after first timeline pin, v3
` [Intel-gfx] [PATCH v7 03/63] drm/i915: Move cmd parser pinning to execbuffer
` [Intel-gfx] [PATCH v7 04/63] drm/i915: Add missing -EDEADLK handling to execbuf pinning, v2
` [Intel-gfx] [PATCH v7 05/63] drm/i915: Ensure we hold the object mutex in pin correctly
` [Intel-gfx] [PATCH v7 06/63] drm/i915: Add gem object locking to madvise
` [Intel-gfx] [PATCH v7 07/63] drm/i915: Move HAS_STRUCT_PAGE to obj->flags
` [Intel-gfx] [PATCH v7 08/63] drm/i915: Rework struct phys attachment handling
` [Intel-gfx] [PATCH v7 09/63] drm/i915: Convert i915_gem_object_attach_phys() to ww locking, v2
` [Intel-gfx] [PATCH v7 10/63] drm/i915: make lockdep slightly happier about execbuf
` [Intel-gfx] [PATCH v7 11/63] drm/i915: Disable userptr pread/pwrite support
` [Intel-gfx] [PATCH v7 12/63] drm/i915: No longer allow exporting userptr through dma-buf
` [Intel-gfx] [PATCH v7 13/63] drm/i915: Reject more ioctls for userptr
` [Intel-gfx] [PATCH v7 14/63] drm/i915: Reject UNSYNCHRONIZED for userptr, v2
` [Intel-gfx] [PATCH v7 15/63] drm/i915: Make compilation of userptr code depend on MMU_NOTIFIER
` [Intel-gfx] [PATCH v7 16/63] drm/i915: Fix userptr so we do not have to worry about obj->mm.lock, v6
` [Intel-gfx] [PATCH v7 17/63] drm/i915: Flatten obj->mm.lock
` [Intel-gfx] [PATCH v7 18/63] drm/i915: Populate logical context during first pin
` [Intel-gfx] [PATCH v7 19/63] drm/i915: Make ring submission compatible with obj->mm.lock removal, v2
` [Intel-gfx] [PATCH v7 20/63] drm/i915: Handle ww locking in init_status_page
` [Intel-gfx] [PATCH v7 21/63] drm/i915: Rework clflush to work correctly without obj->mm.lock
` [Intel-gfx] [PATCH v7 22/63] drm/i915: Pass ww ctx to intel_pin_to_display_plane
` [Intel-gfx] [PATCH v7 23/63] drm/i915: Add object locking to vm_fault_cpu
` [Intel-gfx] [PATCH v7 24/63] drm/i915: Move pinning to inside engine_wa_list_verify()
` [Intel-gfx] [PATCH v7 25/63] drm/i915: Take reservation lock around i915_vma_pin
` [Intel-gfx] [PATCH v7 26/63] drm/i915: Make lrc_init_wa_ctx compatible with ww locking, v2
` [Intel-gfx] [PATCH v7 27/63] drm/i915: Make __engine_unpark() compatible with ww locking
` [Intel-gfx] [PATCH v7 28/63] drm/i915: Take obj lock around set_domain ioctl
` [Intel-gfx] [PATCH v7 29/63] drm/i915: Defer pin calls in buffer pool until first use by caller
` [Intel-gfx] [PATCH v7 30/63] drm/i915: Fix pread/pwrite to work with new locking rules
` [Intel-gfx] [PATCH v7 31/63] drm/i915: Fix workarounds selftest, part 1
` [Intel-gfx] [PATCH v7 32/63] drm/i915: Prepare for obj->mm.lock removal, v2
` [Intel-gfx] [PATCH v7 33/63] drm/i915: Add igt_spinner_pin() to allow for ww locking around spinner
` [Intel-gfx] [PATCH v7 34/63] drm/i915: Add ww locking around vm_access()
` [Intel-gfx] [PATCH v7 35/63] drm/i915: Increase ww locking for perf
` [Intel-gfx] [PATCH v7 36/63] drm/i915: Lock ww in ucode objects correctly
` [Intel-gfx] [PATCH v7 37/63] drm/i915: Add ww locking to dma-buf ops
` [Intel-gfx] [PATCH v7 38/63] drm/i915: Add missing ww lock in intel_dsb_prepare
` [Intel-gfx] [PATCH v7 39/63] drm/i915: Fix ww locking in shmem_create_from_object
` [Intel-gfx] [PATCH v7 40/63] drm/i915: Use a single page table lock for each gtt
` [Intel-gfx] [PATCH v7 41/63] drm/i915/selftests: Prepare huge_pages testcases for obj->mm.lock removal
` [Intel-gfx] [PATCH v7 42/63] drm/i915/selftests: Prepare client blit "
` [Intel-gfx] [PATCH v7 43/63] drm/i915/selftests: Prepare coherency tests "
` [Intel-gfx] [PATCH v7 44/63] drm/i915/selftests: Prepare context "
` [Intel-gfx] [PATCH v7 45/63] drm/i915/selftests: Prepare dma-buf "
` [Intel-gfx] [PATCH v7 46/63] drm/i915/selftests: Prepare execbuf "
` [Intel-gfx] [PATCH v7 47/63] drm/i915/selftests: Prepare mman testcases "
` [Intel-gfx] [PATCH v7 48/63] drm/i915/selftests: Prepare object tests "
` [Intel-gfx] [PATCH v7 49/63] drm/i915/selftests: Prepare object blit "
` [Intel-gfx] [PATCH v7 50/63] drm/i915/selftests: Prepare igt_gem_utils "
` [Intel-gfx] [PATCH v7 51/63] drm/i915/selftests: Prepare context selftest "
` [Intel-gfx] [PATCH v7 52/63] drm/i915/selftests: Prepare hangcheck "
` [Intel-gfx] [PATCH v7 53/63] drm/i915/selftests: Prepare execlists and lrc selftests "
` [Intel-gfx] [PATCH v7 54/63] drm/i915/selftests: Prepare mocs tests "
` [Intel-gfx] [PATCH v7 55/63] drm/i915/selftests: Prepare ring submission "
` [Intel-gfx] [PATCH v7 56/63] drm/i915/selftests: Prepare timeline tests "
` [Intel-gfx] [PATCH v7 57/63] drm/i915/selftests: Prepare i915_request "
` [Intel-gfx] [PATCH v7 58/63] drm/i915/selftests: Prepare memory region "
` [Intel-gfx] [PATCH v7 59/63] drm/i915/selftests: Prepare cs engine "
` [Intel-gfx] [PATCH v7 60/63] drm/i915/selftests: Prepare gtt "
` [Intel-gfx] [PATCH v7 61/63] drm/i915: Finally remove obj->mm.lock
` [Intel-gfx] [PATCH v7 62/63] drm/i915: Keep userpointer bindings if seqcount is unchanged, v2
` [Intel-gfx] [PATCH v7 63/63] drm/i915: Move gt_revoke() slightly
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Remove obj->mm.lock! (rev14)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
` [Intel-gfx] ✗ Fi.CI.IGT: "
[Intel-gfx] [PATCH] drm/i915/bios: tidy up child device debug logging
2021-01-29 15:23 UTC (2+ messages)
[Intel-gfx] [PATCH] drm/i915/gt: Ignore error capturing a closed context
2021-01-29 15:01 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
[Intel-gfx] [PATCH 0/1] disable the QSES check for HDCP2.2 over MST
2021-01-29 14:38 UTC (4+ messages)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for "
` [Intel-gfx] ✓ Fi.CI.BAT: success for disable the QSES check for HDCP2.2 over MST (rev2)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915/gt: Only trust sseu subslice fuse if it is set
2021-01-29 13:59 UTC (2+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for "
[Intel-gfx] [PATCH CI 1/3] drm/i915: Nuke not needed members of dram_info
2021-01-29 13:56 UTC (6+ messages)
` [Intel-gfx] [PATCH CI 2/3] drm/i915/gen11+: Only load DRAM information from pcode
` [Intel-gfx] [PATCH CI 3/3] drm/i915: Rename is_16gb_dimm to wm_lv_0_adjust_needed
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/3] drm/i915: Nuke not needed members of dram_info
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 1/2] drm/i915/gvt: Parse default state to update reg whitelist
2021-01-29 13:47 UTC (6+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i915/gvt: Purge dev_priv->gt
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/gvt: Parse default state to update reg whitelist
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v3 1/2] drm/i915/hdcp: update cp_irq_count_cached in intel_dp_hdcp2_read_msg()
2021-01-29 13:06 UTC (4+ messages)
` [Intel-gfx] [PATCH v3 2/2] drm/i915/hdcp: read RxInfo once when reading Send_Pairing_Info
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/2] drm/i915/hdcp: update cp_irq_count_cached in intel_dp_hdcp2_read_msg()
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915/gt: Restrict the GT clock override to just Icelake
2021-01-29 12:49 UTC (2+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
[Intel-gfx] [PATCH 00/18] Preliminary Display13 support
2021-01-29 12:01 UTC (23+ messages)
` [Intel-gfx] [PATCH 01/18] drm/i915/display13: add Display13 characteristics
` [Intel-gfx] [PATCH 02/18] drm/i915/display13: Handle proper AUX interrupt bits
` [Intel-gfx] [PATCH 03/18] drm/i915/display13: Enhanced pipe underrun reporting
` [Intel-gfx] [PATCH 04/18] drm/i915/display13: Define plane capabilities
` [Intel-gfx] [PATCH 05/18] drm/i915/display13: Support 128k plane stride
` [Intel-gfx] [PATCH 06/18] drm/i915/display13: Only enable legacy gamma for now
` [Intel-gfx] [PATCH 07/18] drm/i915/display13: Add Display13 power wells
` [Intel-gfx] [PATCH 08/18] drm/i915/display13: Handle LPSP for Display 13
` [Intel-gfx] [PATCH 09/18] drm/i915/display13: Handle new location of outputs D and E
` [Intel-gfx] [PATCH 10/18] drm/i915/display13: Increase maximum watermark lines to 255
` [Intel-gfx] [PATCH 11/18] drm/i915/display13: Required bandwidth increases when VT-d is active
` [Intel-gfx] [PATCH 12/18] drm/i915/display13: Add Wa_14011503030:d13
` [Intel-gfx] [PATCH 13/18] drm/i915/display/dsc: Refactor intel_dp_dsc_compute_bpp
` [Intel-gfx] [PATCH 14/18] drm/i915/display13: Support DP1.4 compression BPPs
` [Intel-gfx] [PATCH 15/18] drm/i915/display13: Get slice height before computing rc params
` [Intel-gfx] [PATCH 16/18] drm/i915/display13: Calculate VDSC RC parameters
` [Intel-gfx] [PATCH 17/18] drm/i915/display13: Add rc_qp_table for rcparams calculation
` [Intel-gfx] [PATCH 18/18] drm/i915/display13: Enabling dithering after the CC1 pipe
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Preliminary Display13 support
[Intel-gfx] [PATCH i-g-t 1/2] i915/sysfs_client: Ignore clients being closed as we read their sysfs
2021-01-29 9:52 UTC (4+ messages)
` [Intel-gfx] [PATCH i-g-t 2/2] i915/sysfs_clients: Check that client ids are cyclic
[Intel-gfx] [PATCH v13 1/2] drm/i915/display: Support PSR Multiple Instances
2021-01-29 7:44 UTC (3+ messages)
[Intel-gfx] [PATCH v6 0/5] drm: Move struct drm_device.pdev to legacy
2021-01-29 3:51 UTC (8+ messages)
` [Intel-gfx] [PATCH v6 1/5] drm/i915: Remove references to struct drm_device.pdev
` [Intel-gfx] [PATCH v6 2/5] drm/i915/gt: "
` [Intel-gfx] [PATCH v6 3/5] drm/i915/gvt: "
` [Intel-gfx] [PATCH v6 4/5] drm/i915: Don't assign "
` [Intel-gfx] [PATCH v6 5/5] drm: Move struct drm_device.pdev to legacy section
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm: Move struct drm_device.pdev to legacy (rev6)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH v5 1/8] drm/i915: make local-memory probing a GT operation
2021-01-29 3:42 UTC (5+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v5,1/8] drm/i915: make local-memory probing a GT operation (rev2)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [RFC PATCH 0/9] cgroup support for GPU devices
2021-01-29 3:00 UTC (3+ messages)
[Intel-gfx] [PATCH] drm/i915/dp: Prevent setting the LTTPR LT mode if no LTTPRs are detected
2021-01-28 20:22 UTC (4+ messages)
[Intel-gfx] [PATCH 1/2] drm/dp/mst: Export drm_dp_get_vc_payload_bw()
2021-01-28 19:38 UTC (5+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i915: Fix the MST PBN divider calculation
` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/dp/mst: Export drm_dp_get_vc_payload_bw()
[Intel-gfx] [PATCH] drm/i915: Disable runtime power management during shutdown
2021-01-28 19:13 UTC (2+ messages)
[Intel-gfx] [PATCH v2 1/4] drm/i915: Nuke not needed members of dram_info
2021-01-28 16:43 UTC (4+ messages)
` [Intel-gfx] [PATCH v2 3/4] drm/i915: Fail driver probe when unable to load DRAM information
[Intel-gfx] [PULL] drm-intel-fixes
2021-01-28 13:37 UTC
[Intel-gfx] v5.11-rc5 BUG kmalloc-1k (Not tainted): Redzone overwritten
2021-01-28 13:23 UTC
[Intel-gfx] [PATCH v2 00/11] drm/i915: Async flips for all ilk+ platforms
2021-01-28 9:41 UTC (3+ messages)
` [Intel-gfx] [PATCH v2 02/11] drm/i915: Limit plane stride to below TILEOFF.x limit
[Intel-gfx] [PATCH] drm/i915/gt: Prefer local execution_mask for determing viable engines
2021-01-28 9:00 UTC (2+ messages)
[Intel-gfx] [PATCH 0/9] Final set of patches for ADLS enabling
2021-01-28 8:05 UTC (2+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for Final set of patches for ADLS enabling (rev2)
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