messages from 2021-01-30 00:16:33 to 2021-02-02 09:55:10 UTC [more...]
[Intel-gfx] [PATCH 01/57] drm/i915/gt: Restrict the GT clock override to just Icelake
2021-02-02 9:55 UTC (65+ messages)
` [Intel-gfx] [PATCH 02/57] drm/i915/selftests: Exercise relative mmio paths to non-privileged registers
` [Intel-gfx] [PATCH 03/57] drm/i915/selftests: Exercise cross-process context isolation
` [Intel-gfx] [PATCH 04/57] drm/i915: Protect against request freeing during cancellation on wedging
` [Intel-gfx] [PATCH 05/57] drm/i915: Take rcu_read_lock for querying fence's driver/timeline names
` [Intel-gfx] [PATCH 06/57] drm/i915/gt: Always flush the submission queue on checking for idle
` [Intel-gfx] [PATCH 07/57] drm/i915/gt: Move engine setup out of set_default_submission
` [Intel-gfx] [PATCH 08/57] drm/i915/gt: Move submission_method into intel_gt
` [Intel-gfx] [PATCH 09/57] drm/i915: Replace engine->schedule() with a known request operation
` [Intel-gfx] [PATCH 10/57] drm/i915: Restructure priority inheritance
` [Intel-gfx] [PATCH 11/57] drm/i915/selftests: Measure set-priority duration
` [Intel-gfx] [PATCH 12/57] drm/i915/selftests: Exercise priority inheritance around an engine loop
` [Intel-gfx] [PATCH 13/57] drm/i915/selftests: Force a rewind if at first we don't succeed
` [Intel-gfx] [PATCH 14/57] drm/i915: Improve DFS for priority inheritance
` [Intel-gfx] [PATCH 15/57] drm/i915: Extract request submission from execlists
` [Intel-gfx] [PATCH 16/57] drm/i915: Extract request rewinding "
` [Intel-gfx] [PATCH 17/57] drm/i915: Extract request suspension from the execlists
` [Intel-gfx] [PATCH 18/57] drm/i915: Extract the ability to defer and rerun a request later
` [Intel-gfx] [PATCH 19/57] drm/i915: Fix the iterative dfs for defering requests
` [Intel-gfx] [PATCH 20/57] drm/i915: Wrap access to intel_engine.active
` [Intel-gfx] [PATCH 21/57] drm/i915: Move common active lists from engine to i915_scheduler
` [Intel-gfx] [PATCH 22/57] drm/i915: Move scheduler queue
` [Intel-gfx] [PATCH 23/57] drm/i915: Move tasklet from execlists to sched
` [Intel-gfx] [PATCH 24/57] drm/i915/gt: Only kick the scheduler on timeslice/preemption change
` [Intel-gfx] [PATCH 25/57] drm/i915: Move submit_request to i915_sched_engine
` [Intel-gfx] [PATCH 26/57] drm/i915: Move finding the current active request to the scheduler
` [Intel-gfx] [PATCH 27/57] drm/i915: Show execlists queues when dumping state
` [Intel-gfx] [PATCH 28/57] drm/i915: Wrap i915_request_use_semaphores()
` [Intel-gfx] [PATCH 29/57] drm/i915: Move scheduler flags
` [Intel-gfx] [PATCH 30/57] drm/i915: Move timeslicing flag to scheduler
` [Intel-gfx] [PATCH 31/57] drm/i915/gt: Declare when we enabled timeslicing
` [Intel-gfx] [PATCH 32/57] drm/i915: Move needs-breadcrumb flags to scheduler
` [Intel-gfx] [PATCH 33/57] drm/i915: Move busywaiting control to the scheduler
` [Intel-gfx] [PATCH 34/57] drm/i915: Move preempt-reset flag "
` [Intel-gfx] [PATCH 35/57] drm/i915: Replace priolist rbtree with a skiplist
` [Intel-gfx] [PATCH 36/57] drm/i915: Wrap cmpxchg64 with try_cmpxchg64() helper
` [Intel-gfx] [PATCH 37/57] drm/i915: Fair low-latency scheduling
` [Intel-gfx] [PATCH 38/57] drm/i915/gt: Specify a deadline for the heartbeat
` [Intel-gfx] [PATCH 39/57] drm/i915: Extend the priority boosting for the display with a deadline
` [Intel-gfx] [PATCH 40/57] drm/i915/gt: Support virtual engine queues
` [Intel-gfx] [PATCH 41/57] drm/i915: Move saturated workload detection back to the context
` [Intel-gfx] [PATCH 42/57] drm/i915: Bump default timeslicing quantum to 5ms
` [Intel-gfx] [PATCH 43/57] drm/i915/gt: Delay taking irqoff for execlists submission
` [Intel-gfx] [PATCH 44/57] drm/i915/gt: Wrap intel_timeline.has_initial_breadcrumb
` [Intel-gfx] [PATCH 45/57] drm/i915/gt: Track timeline GGTT offset separately from subpage offset
` [Intel-gfx] [PATCH 46/57] drm/i915/gt: Add timeline "mode"
` [Intel-gfx] [PATCH 47/57] drm/i915/gt: Use indices for writing into relative timelines
` [Intel-gfx] [PATCH 48/57] drm/i915/selftests: Exercise relative timeline modes
` [Intel-gfx] [PATCH 49/57] drm/i915/gt: Use ppHWSP for unshared non-semaphore related timelines
` [Intel-gfx] [PATCH 50/57] Restore "drm/i915: drop engine_pin/unpin_breadcrumbs_irq"
` [Intel-gfx] [PATCH 51/57] drm/i915/gt: Couple tasklet scheduling for all CS interrupts
` [Intel-gfx] [PATCH 52/57] drm/i915/gt: Support creation of 'internal' rings
` [Intel-gfx] [PATCH 53/57] drm/i915/gt: Use client timeline address for seqno writes
` [Intel-gfx] [PATCH 54/57] drm/i915/gt: Infrastructure for ring scheduling
` [Intel-gfx] [PATCH 55/57] drm/i915/gt: Implement ring scheduler for gen4-7
` [Intel-gfx] [PATCH 56/57] drm/i915/gt: Enable ring scheduling for gen5-7
` [Intel-gfx] [PATCH 57/57] drm/i915: Support secure dispatch on gen6/gen7
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/57] drm/i915/gt: Restrict the GT clock override to just Icelake
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915/gen9bc: Handle TGP PCH during suspend/resume
2021-02-02 8:59 UTC (6+ messages)
[Intel-gfx] [PATCH 1/3] i915/perf: Store a mask of valid OA formats for a platform
2021-02-02 8:52 UTC (6+ messages)
` [Intel-gfx] [PATCH 2/3] i915/perf: Move OA formats to single array
` [Intel-gfx] [PATCH 3/3] i915/perf: Add additional OA formats for gen12
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/3] i915/perf: Store a mask of valid OA formats for a platform
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] Fixes that failed to apply to v5.11-rc4
2021-02-02 8:50 UTC (5+ messages)
` [Intel-gfx] [PATCH -fixes] drm/i915/display: Prevent double YUV range correction on HDR planes
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/display: Prevent double YUV range correction on HDR planes (rev3)
[Intel-gfx] [PATCH v7 00/15] Add support for DP-HDMI2.1 PCON
2021-02-02 8:11 UTC (6+ messages)
` [Intel-gfx] [PATCH v7 09/15] drm/i915: Add support for starting FRL training for HDMI2.1 via PCON
[Intel-gfx] [PATCH 00/15] drm/i915: Clean up the DDI clock routing mess
2021-02-02 6:05 UTC (37+ messages)
` [Intel-gfx] [PATCH 01/15] drm/i915: Extract icl_dpclka_cfgcr0_reg()
` [Intel-gfx] [PATCH 02/15] drm/i915: Extract icl_dpclka_cfgcr0_clk_sel*()
` [Intel-gfx] [PATCH 03/15] drm/i915: Introduce .{enable, disable}_clock() encoder vfuncs
` [Intel-gfx] [PATCH 04/15] drm/i915: Extract hsw_ddi_{enable, disable}_clock()
` [Intel-gfx] [PATCH 05/15] drm/i915: Extract skl_ddi_{enable, disable}_clock()
` [Intel-gfx] [PATCH 06/15] drm/i195: Extract cnl_ddi_{enable, disable}_clock()
` [Intel-gfx] [PATCH 07/15] drm/i915: Convert DG1 over to .{enable, disable}_clock()
` [Intel-gfx] [PATCH 08/15] drm/i915: Extract icl+ .{enable, disable}_clock() vfuncs
` [Intel-gfx] [PATCH 09/15] drm/i915: Use intel_de_rmw() for DDI clock routing
` [Intel-gfx] [PATCH 10/15] drm/i915: Sprinkle a few missing locks around shared DDI clock registers
` [Intel-gfx] [PATCH 11/15] drm/i915: Sprinkle WARN(!pll) into icl/dg1 .clock_enable()
` [Intel-gfx] [PATCH 12/15] drm/i915: Extract _cnl_ddi_{enable, disable}_clock()
` [Intel-gfx] [PATCH 13/15] drm/i915: Split alds/rkl from icl_ddi_combo_{enable, disable}_clock()
` [Intel-gfx] [PATCH 14/15] drm/i915: Use .disable_clock() for pll sanitation
` [Intel-gfx] [PATCH 15/15] drm/i915: Relocate icl_sanitize_encoder_pll_mapping()
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Clean up the DDI clock routing mess
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH v1] vfio/pci: Add support for opregion v2.0+
2021-02-02 5:09 UTC (4+ messages)
` [Intel-gfx] [PATCH v2] "
[Intel-gfx] [PULL] topic/adl-s-enabling into drm-intel-gt-next
2021-02-02 3:00 UTC
[Intel-gfx] [PULL] topic/adl-s-enabling into drm-intel-next
2021-02-02 2:56 UTC
[Intel-gfx] [PATCH] drm/i915/dg1: Add GuC and HuC support
2021-02-02 0:46 UTC (6+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/dg1: Add GuC and HuC support (rev2)
[Intel-gfx] [PATCH] drm/i915/gt: Retire unexpected starting state error dumping
2021-02-02 0:40 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH] drm/i915/vbt: update DP max link rate table
2021-02-01 23:51 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [RFC PATCH 0/9] cgroup support for GPU devices
2021-02-01 23:21 UTC (3+ messages)
[Intel-gfx] [PATCH 1/4] drm/dp_mst: Don't report ports connected if nothing is attached to them
2021-02-01 22:04 UTC (2+ messages)
[Intel-gfx] [PATCH v7 00/63] drm/i915: Remove obj->mm.lock!
2021-02-01 19:11 UTC (9+ messages)
` [Intel-gfx] [PATCH v7 13/63] drm/i915: Reject more ioctls for userptr
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Remove obj->mm.lock! (rev15)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] linux-next: Tree for Feb 1 (drivers/gpu/drm/i915/i915_gem.c)
2021-02-01 17:06 UTC
[Intel-gfx] [PATCH 0/9] Final set of patches for ADLS enabling
2021-02-01 16:31 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for Final set of patches for ADLS enabling (rev2)
[Intel-gfx] [PATCH] drm/i915/selftests: Use a single copy of the mocs table
2021-02-01 15:46 UTC (2+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for "
[Intel-gfx] [PATCH v7 26/63] drm/i915: Make lrc_init_wa_ctx compatible with ww locking, v2
2021-02-01 13:08 UTC (4+ messages)
` [Intel-gfx] [PATCH] drm/i915: Make lrc_init_wa_ctx compatible with ww locking, v3
[Intel-gfx] [PATCH] drm/i915: Add missing -EDEADLK path in execbuffer ggtt pinning
2021-02-01 12:58 UTC (2+ messages)
[Intel-gfx] [PATCH] drm/i915: Remove unreachable code
2021-02-01 0:23 UTC (6+ messages)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for "
[Intel-gfx] [PATCH i-g-t] intel_gpu_top: Wrap interactive header
2021-02-01 12:07 UTC (2+ messages)
[Intel-gfx] [PATCH] drm/i915/debugfs: HDCP capability enc NULL check
2021-02-01 10:57 UTC (3+ messages)
[Intel-gfx] [PATCH i-g-t 1/3] intel_gpu_top: Update manual page for recent additions
2021-02-01 10:56 UTC (6+ messages)
` [Intel-gfx] [PATCH i-g-t 2/3] intel_gpu_top: Add option to hide inactive clients
` [Intel-gfx] [PATCH i-g-t 3/3] intel_gpu_top: Fix interactive header
` [Intel-gfx] [igt-dev] "
[Intel-gfx] [PATCH] drm/i915/bios: tidy up child device debug logging
2021-02-01 10:33 UTC (3+ messages)
[Intel-gfx] [PATCH i-g-t] intel_gpu_top: Hide unused clients
2021-02-01 10:05 UTC (11+ messages)
` [Intel-gfx] [PATCH i-g-t v2] "
` [Intel-gfx] [igt-dev] "
[Intel-gfx] [PATCH 00/29] treewide: Convert comma separated statements
2021-02-01 8:41 UTC (4+ messages)
` [Intel-gfx] [PATCH 10/29] drm/i915: Avoid "
[Intel-gfx] v5.11-rc5 BUG kmalloc-1k (Not tainted): Redzone overwritten
2021-02-01 8:36 UTC (2+ messages)
[Intel-gfx] [PATCH 0/1] disable the QSES check for HDCP2.2 over MST
2021-02-01 6:57 UTC (3+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for disable the QSES check for HDCP2.2 over MST (rev2)
[Intel-gfx] linux-next: build failure after merge of the drm-misc tree
2021-02-01 2:10 UTC
[Intel-gfx] [PATCH] drm/i915/dg1: Add GuC and HuC support
2021-01-30 20:20 UTC (2+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for "
[Intel-gfx] DG1 Guc HuC and ADL-S DMC
2021-01-30 18:58 UTC
[Intel-gfx] [CI 1/2] drm/i915/gt: Reduce GT runtime stats from seqlock to a latch
2021-01-30 18:21 UTC (5+ messages)
` [Intel-gfx] [CI 2/2] drm/i915/gt: Reduce engine "
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [CI,1/2] drm/i915/gt: Reduce GT "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 0/8] Final set of patches for ADLS enabling
2021-01-30 17:40 UTC (5+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for Final set of patches for ADLS enabling (rev3)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Final set of patches for ADLS enabling (rev4)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [PATCH] drm/i915/gt: Only trust sseu subslice fuse if it is set
2021-01-30 12:42 UTC (2+ messages)
[Intel-gfx] [PATCH] drm/i915: Don't access non-existent PGTBL_ER register
2021-01-30 7:38 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
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