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 messages from 2021-02-05 21:46:53 to 2021-02-08 15:23:27 UTC [more...]

[Intel-gfx] [PATCH 01/31] drm/i915/gt: Ratelimit heartbeat completion probing
 2021-02-08 15:23 UTC  (39+ messages)
` [Intel-gfx] [PATCH 02/31] drm/i915: Move context revocation to scheduler
` [Intel-gfx] [PATCH 03/31] drm/i915: Introduce the scheduling mode
` [Intel-gfx] [PATCH 04/31] drm/i915: Move timeslicing flag to scheduler
` [Intel-gfx] [PATCH 05/31] drm/i915/gt: Declare when we enabled timeslicing
` [Intel-gfx] [PATCH 06/31] drm/i915: Move busywaiting control to the scheduler
` [Intel-gfx] [PATCH 07/31] drm/i915: Move preempt-reset flag "
` [Intel-gfx] [PATCH 08/31] drm/i915: Fix the iterative dfs for defering requests
` [Intel-gfx] [PATCH 09/31] drm/i915: Replace priolist rbtree with a skiplist
` [Intel-gfx] [PATCH 10/31] drm/i915: Fair low-latency scheduling
` [Intel-gfx] [PATCH 11/31] drm/i915/gt: Specify a deadline for the heartbeat
` [Intel-gfx] [PATCH 12/31] drm/i915: Extend the priority boosting for the display with a deadline
` [Intel-gfx] [PATCH 13/31] drm/i915/gt: Support virtual engine queues
` [Intel-gfx] [PATCH 14/31] drm/i915: Move saturated workload detection back to the context
` [Intel-gfx] [PATCH 15/31] drm/i915: Bump default timeslicing quantum to 5ms
` [Intel-gfx] [PATCH 16/31] drm/i915/gt: Delay taking irqoff for execlists submission
` [Intel-gfx] [PATCH 17/31] drm/i915/gt: Convert the legacy ring submission to use the scheduling interface
` [Intel-gfx] [PATCH 18/31] drm/i915/gt: Wrap intel_timeline.has_initial_breadcrumb
` [Intel-gfx] [PATCH 19/31] drm/i915/gt: Track timeline GGTT offset separately from subpage offset
` [Intel-gfx] [PATCH 20/31] drm/i915/gt: Add timeline "mode"
` [Intel-gfx] [PATCH 21/31] drm/i915/gt: Use indices for writing into relative timelines
` [Intel-gfx] [PATCH 22/31] drm/i915/selftests: Exercise relative timeline modes
` [Intel-gfx] [PATCH 23/31] drm/i915/gt: Use ppHWSP for unshared non-semaphore related timelines
` [Intel-gfx] [PATCH 24/31] Restore "drm/i915: drop engine_pin/unpin_breadcrumbs_irq"
` [Intel-gfx] [PATCH 25/31] drm/i915/gt: Support creation of 'internal' rings
` [Intel-gfx] [PATCH 26/31] drm/i915/gt: Use client timeline address for seqno writes
` [Intel-gfx] [PATCH 27/31] drm/i915/gt: Infrastructure for ring scheduling
` [Intel-gfx] [PATCH 28/31] drm/i915/gt: Implement ring scheduler for gen4-7
` [Intel-gfx] [PATCH 29/31] drm/i915/gt: Enable ring scheduling for gen5-7
` [Intel-gfx] [PATCH 30/31] drm/i915: Support secure dispatch on gen6/gen7
` [Intel-gfx] [PATCH 31/31] drm/i915/gt: Limit C-states while waiting for requests

[Intel-gfx] [PATCH] kernel: Expose SYS_kcmp by default
 2021-02-08 13:49 UTC  (17+ messages)
` [Intel-gfx] [PATCH v2] "
` [Intel-gfx] [PATCH v3] kcmp: Support selection of SYS_kcmp without CHECKPOINT_RESTORE
` [Intel-gfx] ✓ Fi.CI.BAT: success for kernel: Expose SYS_kcmp by default (rev3)
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH] drm/i915/vbt: update DP max link rate table
 2021-02-08 13:31 UTC  (3+ messages)

[Intel-gfx] [RFC 00/14] Introduce Intel PXP
 2021-02-08 13:14 UTC  (31+ messages)
` [Intel-gfx] [RFC 01/14] drm/i915/pxp: Define PXP component interface
` [Intel-gfx] [RFC 02/14] mei: pxp: export pavp client to me client bus
` [Intel-gfx] [RFC 03/14] drm/i915/pxp: define PXP device flag and kconfig
` [Intel-gfx] [RFC 04/14] drm/i915/pxp: allocate a vcs context for pxp usage
` [Intel-gfx] [RFC 05/14] drm/i915/pxp: set KCR reg init during the boot time
` [Intel-gfx] [RFC 06/14] drm/i915/pxp: Implement funcs to create the TEE channel
` [Intel-gfx] [RFC 07/14] drm/i915/pxp: Create the arbitrary session after boot
` [Intel-gfx] [RFC 08/14] drm/i915/pxp: Implement arb session teardown
` [Intel-gfx] [RFC 09/14] drm/i915/pxp: Implement PXP irq handler
` [Intel-gfx] [RFC 10/14] drm/i915/pxp: Enable PXP power management
` [Intel-gfx] [RFC 11/14] drm/i915/uapi: introduce drm_i915_gem_create_ext
` [Intel-gfx] [RFC 12/14] drm/i915/pxp: User interface for Protected buffer
` [Intel-gfx] [RFC 13/14] drm/i915/pxp: Add plane decryption support
` [Intel-gfx] [RFC 14/14] drm/i915/pxp: enable PXP for integrated Gen12
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce Intel PXP
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] linux-next: build warning after merge of the drm-misc tree
 2021-02-08 12:39 UTC 

[Intel-gfx] [PATCH] drm/i915/selftests: Allow the module to load even if live selftests fail
 2021-02-08 12:15 UTC 

[Intel-gfx] [PATCH 0/3] HDMI2.1 PCON Misc Fixes
 2021-02-08 11:44 UTC  (4+ messages)
` [Intel-gfx] [PATCH 1/3] i915/display/intel_dp: Read PCON DSC ENC caps only for DPCD rev >= 1.4

[Intel-gfx] [PATCH v2] drm/i915: Fix HAS_LSPCON macro for platforms between GEN9 and GEN10
 2021-02-08 11:34 UTC  (4+ messages)

[Intel-gfx] [FYI PATCH] i915: kvmgt: the KVM mmu_lock is now an rwlock
 2021-02-08 11:34 UTC 

[Intel-gfx] [RFC v3 00/10] drm: Extract DPCD backlight helpers from i915, add support in nouveau
 2021-02-08 11:14 UTC  (19+ messages)
` [Intel-gfx] [RFC v3 01/10] drm/nouveau/kms/nv40-/backlight: Assign prop type once
` [Intel-gfx] [RFC v3 02/10] drm/nouveau/kms: Don't probe eDP connectors more then once
` [Intel-gfx] [RFC v3 03/10] drm/i915/dpcd_bl: Remove redundant AUX backlight frequency calculations
` [Intel-gfx] [RFC v3 04/10] drm/i915/dpcd_bl: Handle drm_dpcd_read/write() return values correctly
` [Intel-gfx] [RFC v3 05/10] drm/i915/dpcd_bl: Cleanup intel_dp_aux_vesa_enable_backlight() a bit
  ` [Intel-gfx] [Nouveau] "
` [Intel-gfx] [RFC v3 06/10] drm/i915/dpcd_bl: Cache some backlight capabilities in intel_panel.backlight
` [Intel-gfx] [RFC v3 07/10] drm/i915/dpcd_bl: Move VESA backlight enabling code closer together
` [Intel-gfx] [RFC v3 08/10] drm/i915/dpcd_bl: Return early in vesa_calc_max_backlight if we can't read PWMGEN_BIT_COUNT
` [Intel-gfx] [RFC v3 09/10] drm/i915/dpcd_bl: Print return codes for VESA backlight failures
` [Intel-gfx] [RFC v3 10/10] drm/dp: Extract i915's eDP backlight code into DRM helpers
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm: Extract DPCD backlight helpers from i915, add support in nouveau (rev5)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH] i915: Fix HAS_LSPCON macro for platforms between GEN9 and GEN10
 2021-02-08 11:11 UTC  (5+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH] drm/i915/gvt/kvmgt: Fix the build failure in kvmgt
 2021-02-08 18:52 UTC 

[Intel-gfx] [PATCH v12 0/8] drm/i915: refactor intel_display.c + a bit more
 2021-02-08 10:18 UTC  (6+ messages)
` [Intel-gfx] [PATCH v12 8/8] drm/i915: move ddi pll state get to dpll mgr
` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: refactor intel_display.c + a bit more (rev2)

[Intel-gfx] [PATCH] drm/vblank: Avoid storing a timestamp for the same frame twice
 2021-02-08  9:56 UTC  (7+ messages)

[Intel-gfx] [PATCH v1] vfio/pci: Add support for opregion v2.0+
 2021-02-08  9:52 UTC  (3+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for vfio/pci: Add support for opregion v2.0+ (rev3)
` [Intel-gfx] ✓ Fi.CI.BAT: success "

[Intel-gfx] [PATCH v2] vfio/pci: Add support for opregion v2.0+
 2021-02-08 17:02 UTC  (2+ messages)
` [Intel-gfx] [PATCH v3] vfio/pci: Add support for opregion v2.1+

[Intel-gfx] [PATCH] drm/i915: Enable WaProgramMgsrForCorrectSliceSpecificMmioReads for Gen9
 2021-02-08  0:45 UTC  (4+ messages)
` [Intel-gfx] [drm/i915] 04ff178484: phoronix-test-suite.supertuxkart.1024x768.Fullscreen.Ultimate.1.GranParadisoIsland.frames_per_second -30.4% regression

[Intel-gfx] [CI 1/4] drm/i915: Move submit_request to i915_sched_engine
 2021-02-07 17:11 UTC  (7+ messages)
` [Intel-gfx] [CI 2/4] drm/i915: Move finding the current active request to the scheduler
` [Intel-gfx] [CI 3/4] drm/i915: Show execlists queues when dumping state
` [Intel-gfx] [CI 4/4] drm/i915: Wrap i915_request_use_semaphores()
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/4] drm/i915: Move submit_request to i915_sched_engine
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH RFC v1 0/6] swiotlb: 64-bit DMA buffer
 2021-02-07 15:56 UTC  (4+ messages)
` [Intel-gfx] [PATCH RFC v1 5/6] xen-swiotlb: convert variables to arrays

[Intel-gfx] [CI 1/4] drm/i915: Move submit_request to i915_sched_engine
 2021-02-07 14:15 UTC  (7+ messages)
` [Intel-gfx] [CI 2/4] drm/i915: Move finding the current active request to the scheduler
` [Intel-gfx] [CI 3/4] drm/i915: Show execlists queues when dumping state
` [Intel-gfx] [CI 4/4] drm/i915: Wrap i915_request_use_semaphores()
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/4] drm/i915: Move submit_request to i915_sched_engine
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [CI 1/4] drm/i915: Move submit_request to i915_sched_engine
 2021-02-07  4:39 UTC  (7+ messages)
` [Intel-gfx] [CI 2/4] drm/i915: Move finding the current active request to the scheduler
` [Intel-gfx] [CI 3/4] drm/i915: Show execlists queues when dumping state
` [Intel-gfx] [CI 4/4] drm/i915: Wrap i915_request_use_semaphores()
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/4] drm/i915: Move submit_request to i915_sched_engine
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [CI 1/4] drm/i915: Move submit_request to i915_sched_engine
 2021-02-07  0:40 UTC  (7+ messages)
` [Intel-gfx] [CI 2/4] drm/i915: Move finding the current active request to the scheduler
` [Intel-gfx] [CI 3/4] drm/i915: Show execlists queues when dumping state
` [Intel-gfx] [CI 4/4] drm/i915: Wrap i915_request_use_semaphores()
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/4] drm/i915: Move submit_request to i915_sched_engine
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [CI 1/4] drm/i915: Move submit_request to i915_sched_engine
 2021-02-06 21:57 UTC  (7+ messages)
` [Intel-gfx] [CI 2/4] drm/i915: Move finding the current active request to the scheduler
` [Intel-gfx] [CI 3/4] drm/i915: Show execlists queues when dumping state
` [Intel-gfx] [CI 4/4] drm/i915: Wrap i915_request_use_semaphores()
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/4] drm/i915: Move submit_request to i915_sched_engine
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [CI 1/5] drm/i915: Wrap access to intel_engine.active
 2021-02-06 15:59 UTC  (9+ messages)
` [Intel-gfx] [CI 2/5] drm/i915: Move common active lists from engine to i915_scheduler
` [Intel-gfx] [CI 3/5] drm/i915: Move scheduler queue
` [Intel-gfx] [CI 4/5] drm/i915: Move tasklet from execlists to sched
` [Intel-gfx] [CI 5/5] drm/i915/gt: Only kick the scheduler on timeslice/preemption change
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/5] drm/i915: Wrap access to intel_engine.active
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [CI 1/4] drm/i915: Move submit_request to i915_sched_engine
 2021-02-06 15:36 UTC  (6+ messages)
` [Intel-gfx] [CI 2/4] drm/i915: Move finding the current active request to the scheduler
` [Intel-gfx] [CI 3/4] drm/i915: Show execlists queues when dumping state
` [Intel-gfx] [CI 4/4] drm/i915: Wrap i915_request_use_semaphores()
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/4] drm/i915: Move submit_request to i915_sched_engine
` [Intel-gfx] ✗ Fi.CI.BAT: failure "

[Intel-gfx] [PATCH] RFC: dma-buf: Require VM_SPECIAL vma for mmap
 2021-02-06 14:22 UTC  (2+ messages)
` [Intel-gfx] [RFC] b922393a2c: WARNING:at_drivers/dma-buf/dma-buf.c:#dma_buf_mmap_internal

[Intel-gfx] [PATCH v3 00/15] drm/i915: Clean up the DDI clock routing mess
 2021-02-06 11:51 UTC  (17+ messages)
` [Intel-gfx] [PATCH v3 04/15] drm/i915: Extract skl_ddi_{enable, disable}_clock()
` [Intel-gfx] [PATCH v3 05/15] drm/i195: Extract cnl_ddi_{enable, disable}_clock()
` [Intel-gfx] [PATCH v3 06/15] drm/i915: Convert DG1 over to .{enable, disable}_clock()
` [Intel-gfx] [PATCH v3 07/15] drm/i915: Extract icl+ .{enable, disable}_clock() vfuncs
` [Intel-gfx] [PATCH v3 08/15] drm/i915: Use intel_de_rmw() for DDI clock routing
` [Intel-gfx] [PATCH v3 09/15] drm/i915: Sprinkle a few missing locks around shared DDI clock registers
` [Intel-gfx] [PATCH v3 10/15] drm/i915: Sprinkle WARN(!pll) into icl/dg1 .clock_enable()
` [Intel-gfx] [PATCH v3 11/15] drm/i915: Extract _cnl_ddi_{enable, disable}_clock()
` [Intel-gfx] [PATCH v3 12/15] drm/i915: Split adl-s/rkl from icl_ddi_combo_{enable, disable}_clock()
` [Intel-gfx] [PATCH v3 13/15] drm/i915: Use .disable_clock() for pll sanitation
` [Intel-gfx] [PATCH v3 14/15] drm/i915: Relocate icl_sanitize_encoder_pll_mapping()
` [Intel-gfx] [PATCH v3 15/15] drm/i915: s/dev_priv/i915/ for the remainder of DDI clock routing
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Clean up the DDI clock routing mess (rev3)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH] drm/i915: Nuke INTEL_OUTPUT_FORMAT_INVALID
 2021-02-06 10:58 UTC  (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH] drm/i915: Add link rate and lane count to i915_display_info
 2021-02-06 10:13 UTC  (4+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add link rate and lane count to i915_display_info (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH] drm/i915/display: Allow PSR2 selective fetch to be enabled at run-time
 2021-02-06  8:28 UTC  (2+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for "

[Intel-gfx] [PATCH] drm/i915/gt: Ratelimit heartbeat completion probing
 2021-02-06  6:45 UTC  (2+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gt: Ratelimit heartbeat completion probing (rev7)

[Intel-gfx] [PATCH] drm/i915: Autoselect CONFIG_CHECKPOINT_RESTORE for SYS_kcmp
 2021-02-06  4:21 UTC  (2+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for "

[Intel-gfx] [CI] drm/i915/selftest: Synchronise with the GPU timestamp
 2021-02-06  3:25 UTC  (2+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftest: Synchronise with the GPU timestamp (rev2)

[Intel-gfx] [CI 1/2] drm/i915/gt: Always flush the submission queue on checking for idle
 2021-02-05 22:07 UTC  (2+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/2] "


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