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 messages from 2021-02-21 07:11:03 to 2021-03-01 05:43:46 UTC [more...]

[Intel-gfx] -stable regression in Intel graphics, introduced in Linux 5.10.9
 2021-02-28 16:57 UTC  (4+ messages)

[Intel-gfx] [PATCH 00/18] Preliminary Display13 support
 2021-03-01  5:43 UTC  (7+ messages)
` [Intel-gfx] [PATCH 18/18] drm/i915/display13: Enabling dithering after the CC1 pipe

[Intel-gfx] [RFC PATCH 0/9] drm/i915/spi: discrete graphics internal spi
 2021-02-28  6:52 UTC  (12+ messages)
` [Intel-gfx] [RFC PATCH 2/9] drm/i915/spi: intel_spi_region map

[Intel-gfx] [PATCH 1/2] dma-buf: Require VM_PFNMAP vma for mmap
 2021-02-27  8:06 UTC  (29+ messages)
` [Intel-gfx] [PATCH 2/2] drm/vgem: use shmem helpers
  ` [Intel-gfx] [PATCH] "
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [1/2] dma-buf: Require VM_PFNMAP vma for mmap
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [1/2] dma-buf: Require VM_PFNMAP vma for mmap (rev2)
` [Intel-gfx] [Linaro-mm-sig] [PATCH 1/2] dma-buf: Require VM_PFNMAP vma for mmap
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] dma-buf: Require VM_PFNMAP vma for mmap (rev3)
` [Intel-gfx] ✗ Fi.CI.BAT: failure "

[Intel-gfx] [PATCH 1/8] drm/i915/gt: Lock intel_engine_apply_whitelist with uncore->lock
 2021-02-27  6:58 UTC  (4+ messages)
` [Intel-gfx] [PATCH 2/8] drm/i915/gt: Refactor _wa_add to reuse wa_index and wa_list_grow

[Intel-gfx] [PATCH 0/7] drm/i915: Fix up TGL+ SAGV watermarks
 2021-02-26 16:14 UTC  (10+ messages)
` [Intel-gfx] [PATCH 1/7] drm/i915: Fix TGL+ plane SAGV watermark programming
` [Intel-gfx] [PATCH 2/7] drm/i915: Zero out SAGV wm when we don't have enough DDB for it
` [Intel-gfx] [PATCH 3/7] drm/i915: Print wm changes if sagv_wm0 changes
` [Intel-gfx] [PATCH 4/7] drm/i915: Stuff SAGV watermark into a sub-structure
` [Intel-gfx] [PATCH 5/7] drm/i915: Introduce SAGV transtion watermark
` [Intel-gfx] [PATCH 6/7] drm/i915: Check tgl+ SAGV watermarks properly
` [Intel-gfx] [PATCH 7/7] drm/i915: Clean up verify_wm_state()
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Fix up TGL+ SAGV watermarks
` [Intel-gfx] ✓ Fi.CI.BAT: success "

[Intel-gfx] [PATCH] drm/compat: Clear bounce structures
 2021-02-26 13:45 UTC  (6+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH] drm/i915: Wedge the GPU if command parser setup fails
 2021-02-26 12:25 UTC  (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH] drm/i915/dp: DPTX writes Swing/Pre-emphs(DPCD 0x103-0x106) requested during PHY Layer testing
 2021-02-26 11:24 UTC  (5+ messages)
` [Intel-gfx] [PATCH v2] "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dp: DPTX writes Swing/Pre-emphs(DPCD 0x103-0x106) requested during PHY Layer testing. (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] udldrmfb: causes WARN in i915 on X60 (x86-32)
 2021-02-26  8:48 UTC  (7+ messages)
  ` [Intel-gfx] udldrm does not recover from powersave? "

[Intel-gfx] [PATCH][next] drm/i915/hdcp: Fix null pointer dereference of connector->encoder
 2021-02-26  5:01 UTC  (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH] drm/i915/uc: Use platform specific defaults for GuC/HuC enabling
 2021-02-26  2:17 UTC  (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/uc: Use platform specific defaults for GuC/HuC enabling (rev3)
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH 0/6] drm/i915: Move DDI clock readout to encoder->get_config()
 2021-02-25 18:24 UTC  (13+ messages)
` [Intel-gfx] [PATCH 1/6] drm/i915: Call primary encoder's .get_config() from MST .get_config()
` [Intel-gfx] [PATCH 2/6] drm/i915: Do intel_dpll_readout_hw_state() after encoder readout
  ` [Intel-gfx] [PATCH v2 "
` [Intel-gfx] [PATCH 3/6] drm/i915: Use pipes instead crtc indices in PLL state tracking
` [Intel-gfx] [PATCH 4/6] drm/i915: Move DDI clock readout to encoder->get_config()
` [Intel-gfx] [PATCH 5/6] drm/i915: Add encoder->is_clock_enabled()
` [Intel-gfx] [PATCH 6/6] drm/i915: Extend icl_sanitize_encoder_pll_mapping() to all DDI platforms
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Move DDI clock readout to encoder->get_config()
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Move DDI clock readout to encoder->get_config() (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH] drm/compat: more dummy implementations
 2021-02-25 16:48 UTC  (5+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PULL] drm-intel-next-fixes
 2021-02-25 14:43 UTC 

[Intel-gfx] [5.10.y regression] i915 clear-residuals mitigation is causing gfx issues
 2021-02-25 11:52 UTC  (9+ messages)

[Intel-gfx] [PULL] drm-misc-next-fixes
 2021-02-25  9:25 UTC 

[Intel-gfx] [PULL] drm-misc-fixes
 2021-02-25  8:54 UTC  (5+ messages)

[Intel-gfx] [PATCH] drm/i915: Verify dma_addr in gen8_ggtt_pte_encode
 2021-02-24 21:31 UTC  (4+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH 00/30] drm: Use new DRM printk funcs (like drm_dbg_*()) in DP helpers
 2021-02-24 20:40 UTC  (14+ messages)
` [Intel-gfx] [PATCH 01/30] drm/dp: Rewrap kdocs for struct drm_dp_aux
` [Intel-gfx] [PATCH 06/30] drm/bridge/ti-sn65dsi86: (Un)register aux device on bridge attach/detach
` [Intel-gfx] [PATCH 15/30] drm/dp: Add backpointer to drm_device in drm_dp_aux
` [Intel-gfx] [PATCH 19/30] drm/dp: Pass drm_dp_aux to drm_dp_link_train_clock_recovery_delay()
` [Intel-gfx] [PATCH 20/30] drm/dp: Pass drm_dp_aux to drm_dp*_link_train_channel_eq_delay()

[Intel-gfx] [PATCH] drm/i915: Promote ptrdiff() to i915_utils.h
 2021-02-24 20:36 UTC  (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH] drm/i915/guc: Keep strict GuC ABI definitions separate
 2021-02-24 19:52 UTC  (2+ messages)

[Intel-gfx] [PATCH] drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain names
 2021-02-24 17:13 UTC  (8+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
` [Intel-gfx] ✓ Fi.CI.IGT: success "

[Intel-gfx] [PATCH v2 0/7] drm/i915: refactor KBL/TGL/ADLS stepping scheme
 2021-02-24 11:58 UTC  (14+ messages)
` [Intel-gfx] [PATCH v2 1/7] drm/i915: remove unused ADLS_REVID_* macros
` [Intel-gfx] [PATCH v2 2/7] drm/i915: split out stepping info to a new file
` [Intel-gfx] [PATCH v2 3/7] drm/i915: add new helpers for accessing stepping info
` [Intel-gfx] [PATCH v2 4/7] drm/i915: switch KBL to the new stepping scheme
` [Intel-gfx] [PATCH v2 5/7] drm/i915: switch TGL and ADL "
` [Intel-gfx] [PATCH v2 6/7] drm/i915: rename DISP_STEPPING->DISPLAY_STEP and GT_STEPPING->GT_STEP
` [Intel-gfx] [PATCH v2 7/7] drm/i915: rename disp_stepping->display_step and gt_stepping->gt_step
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: refactor KBL/TGL/ADLS stepping scheme
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH 00/12] drm/i915/bios: vbt child device rework
 2021-02-24  0:37 UTC  (19+ messages)
` [Intel-gfx] [PATCH 01/12] drm/i915/bios: mass convert dev_priv to i915
` [Intel-gfx] [PATCH 02/12] drm/i915/bios: store bdb version in i915
` [Intel-gfx] [PATCH 03/12] drm/i915/bios: limit default outputs by platform on missing VBT
` [Intel-gfx] [PATCH 04/12] drm/i915/bios: limit default outputs to ports A through F
` [Intel-gfx] [PATCH 06/12] drm/i915/bios: rename display_device_data to intel_bios_encoder_data

[Intel-gfx] [PATCH v3] drm/i915/display: Do not allow DC3CO if PSR SF is enabled
 2021-02-23 16:23 UTC  (9+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Do not allow DC3CO if PSR SF is enabled (rev3)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Do not allow DC3CO if PSR SF is enabled (rev4)
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH RFC v1 0/6] swiotlb: 64-bit DMA buffer
 2021-02-23  1:22 UTC  (7+ messages)
` [Intel-gfx] [PATCH RFC v1 5/6] xen-swiotlb: convert variables to arrays

[Intel-gfx] [PULL] gvt-next-fixes
 2021-02-23 14:42 UTC  (2+ messages)

[Intel-gfx] [PATCH 0/1] DG2 audio support
 2021-02-23 13:11 UTC  (4+ messages)
` [Intel-gfx] [PATCH 1/1] ALSA: hda: Add Intel DG2 PCI ID and HDMI codec vid
` [Intel-gfx] [REVIEW] Full tree diff against internal/internal
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for DG2 audio support

[Intel-gfx] [PATCH v2] drm/i915/display: Do not allow DC3CO if PSR SF is enabled
 2021-02-22 21:56 UTC  (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Do not allow DC3CO if PSR SF is enabled (rev2)
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] 2021 X.Org Board of Directors Elections Nomination period is NOW
 2021-02-22 21:18 UTC 

[Intel-gfx] [PATCH v3 0/9] drm/i915/edp: enable eDP Multi-SST Operation (MSO)
 2021-02-22 18:11 UTC  (22+ messages)
` [Intel-gfx] [PATCH v3 1/9] drm/dp: add MSO related DPCD registers
` [Intel-gfx] [PATCH v3 2/9] drm/i915/edp: reject modes with dimensions other than fixed mode
` [Intel-gfx] [PATCH v3 3/9] drm/i915/edp: always add fixed mode to probed modes in ->get_modes()
` [Intel-gfx] [PATCH v3 4/9] drm/i915/edp: read sink MSO configuration for eDP 1.4+
` [Intel-gfx] [PATCH v3 5/9] drm/i915/reg: add stream splitter configuration definitions
` [Intel-gfx] [PATCH v3 6/9] drm/i915/mso: add splitter state readout for platforms that support it
` [Intel-gfx] [PATCH v3 7/9] drm/i915/mso: add splitter state check
` [Intel-gfx] [PATCH v3 8/9] drm/i915/edp: modify fixed and downclock modes for MSO
` [Intel-gfx] [PATCH v3 9/9] drm/i915/edp: enable eDP MSO during link training

[Intel-gfx] [PATCH] drivers: gnu: drm: i915: gvt: Fixed couple of spellings in the file gtt.c
 2021-02-22 16:05 UTC  (5+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH] drm/i915/display: Do not allow DC3CO if PSR SF is enabled
 2021-02-22 15:16 UTC  (5+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH v2] drm/i915/display: Allow PSR2 selective fetch to be enabled at run-time
 2021-02-22 14:21 UTC  (4+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display: Allow PSR2 selective fetch to be enabled at run-time (rev2)

[Intel-gfx] i915 dma faults on Xen
 2021-02-22 12:49 UTC  (12+ messages)

[Intel-gfx] [PATCH 1/4] drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr
 2021-02-22  9:57 UTC  (5+ messages)
` [Intel-gfx] [PATCH 3/4] drm/i915/display: Remove some redundancy around CAN_PSR()
` [Intel-gfx] [PATCH 4/4] drm/i915/display: Set source_support even if panel do not support PSR

[Intel-gfx] linux-next: build warning after merge of the pm tree
 2021-02-22  8:34 UTC  (2+ messages)


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