messages from 2021-07-12 22:55:35 to 2021-07-14 07:55:48 UTC [more...]
[Intel-gfx] [PATCH] drm/i915: Tweaked Wa_14010685332 for all PCHs
2021-07-14 7:55 UTC (5+ messages)
` [Intel-gfx] [REBASED v2] "
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Tweaked Wa_14010685332 for all PCHs (rev4)
[Intel-gfx] [PATCH v2 00/50] Begin enabling Xe_HP SDV and DG2 platforms
2021-07-14 4:51 UTC (54+ messages)
` [Intel-gfx] [PATCH v2 01/50] drm/i915: Add XE_HP initial definitions
` [Intel-gfx] [PATCH v2 02/50] drm/i915: Fork DG1 interrupt handler
` [Intel-gfx] [PATCH v2 03/50] drm/i915/xehp: VDBOX/VEBOX fusing registers are enable-based
` [Intel-gfx] [PATCH v2 04/50] drm/i915/gen12: Use fuse info to enable SFC
` [Intel-gfx] [PATCH v2 05/50] drm/i915/selftests: Allow for larger engine counts
` [Intel-gfx] [PATCH v2 06/50] drm/i915/xehp: Extra media engines - Part 1 (engine definitions)
` [Intel-gfx] [PATCH v2 07/50] drm/i915/xehp: Extra media engines - Part 2 (interrupts)
` [Intel-gfx] [PATCH v2 08/50] drm/i915/xehp: Extra media engines - Part 3 (reset)
` [Intel-gfx] [PATCH v2 09/50] drm/i915/xehp: Xe_HP forcewake support
` [Intel-gfx] [PATCH v2 10/50] drm/i915/xehp: Define multicast register ranges
` [Intel-gfx] [PATCH v2 11/50] drm/i915/xehp: Handle new device context ID format
` [Intel-gfx] [PATCH v2 12/50] drm/i915/xehp: New engine context offsets
` [Intel-gfx] [PATCH v2 13/50] drm/i915/xehp: handle new steering options
` [Intel-gfx] [PATCH v2 14/50] drm/i915/xehp: Loop over all gslices for INSTDONE processing
` [Intel-gfx] [PATCH v2 15/50] drm/i915/xehpsdv: add initial XeHP SDV definitions
` [Intel-gfx] [PATCH v2 16/50] drm/i915/xehp: Changes to ss/eu definitions
` [Intel-gfx] [PATCH v2 17/50] drm/i915/xehpsdv: Add maximum sseu limits
` [Intel-gfx] [PATCH v2 18/50] drm/i915/xehpsdv: Add compute DSS type
` [Intel-gfx] [PATCH v2 19/50] drm/i915/xehpsdv: Define steering tables
` [Intel-gfx] [PATCH v2 20/50] drm/i915/xehpsdv: Define MOCS table for XeHP SDV
` [Intel-gfx] [PATCH v2 21/50] drm/i915/xehpsdv: factor out function to read RP_STATE_CAP
` [Intel-gfx] [PATCH v2 22/50] drm/i915/xehpsdv: Read correct RP_STATE_CAP register
` [Intel-gfx] [PATCH v2 23/50] drm/i915/dg2: add DG2 platform info
` [Intel-gfx] [PATCH v2 24/50] drm/i915/dg2: DG2 uses the same sseu limits as XeHP SDV
` [Intel-gfx] [PATCH v2 25/50] drm/i915/dg2: Add forcewake table
` [Intel-gfx] [PATCH v2 26/50] drm/i915/dg2: Update LNCF steering ranges
` [Intel-gfx] [PATCH v2 27/50] drm/i915/dg2: Add SQIDI steering
` [Intel-gfx] [PATCH v2 28/50] drm/i915/dg2: Add new LRI reg offsets
` [Intel-gfx] [PATCH v2 29/50] drm/i915/dg2: Maintain backward-compatible nested batch behavior
` [Intel-gfx] [PATCH v2 30/50] drm/i915/dg2: Report INSTDONE_GEOM values in error state
` [Intel-gfx] [PATCH v2 31/50] drm/i915/dg2: Define MOCS table for DG2
` [Intel-gfx] [PATCH v2 32/50] drm/i915/dg2: Add fake PCH
` [Intel-gfx] [PATCH v2 33/50] drm/i915/dg2: Add cdclk table and reference clock
` [Intel-gfx] [PATCH v2 34/50] drm/i915/dg2: Skip shared DPLL handling
` [Intel-gfx] [PATCH v2 35/50] drm/i915/dg2: Don't wait for AUX power well enable ACKs
` [Intel-gfx] [PATCH v2 36/50] drm/i915/dg2: Setup display outputs
` [Intel-gfx] [PATCH v2 37/50] drm/i915/dg2: Add dbuf programming
` [Intel-gfx] [PATCH v2 38/50] drm/i915/dg2: Don't program BW_BUDDY registers
` [Intel-gfx] [PATCH v2 39/50] drm/i915/dg2: Don't read DRAM info
` [Intel-gfx] [PATCH v2 40/50] drm/i915/dg2: DG2 has fixed memory bandwidth
` [Intel-gfx] [PATCH v2 41/50] drm/i915/dg2: Add MPLLB programming for SNPS PHY
` [Intel-gfx] [PATCH v2 42/50] drm/i915/dg2: Add MPLLB programming for HDMI
` [Intel-gfx] [PATCH v2 43/50] drm/i915/dg2: Add vswing programming for SNPS phys
` [Intel-gfx] [PATCH v2 44/50] drm/i915/dg2: Update modeset sequences
` [Intel-gfx] [PATCH v2 45/50] drm/i915/dg2: Classify DG2 PHY types
` [Intel-gfx] [PATCH v2 46/50] drm/i915/dg2: Wait for SNPS PHY calibration during display init
` [Intel-gfx] [PATCH v2 47/50] drm/i915/dg2: Update lane disable power state during PSR
` [Intel-gfx] [PATCH v2 48/50] drm/i915/dg2: Add DG2 to the PSR2 defeature list
` [Intel-gfx] [PATCH v2 49/50] drm/i915/dg2: Update to bigjoiner path
` [Intel-gfx] [PATCH v2 50/50] drm/i915/dg2: Configure PCON in DP pre-enable path
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Begin enabling Xe_HP SDV and DG2 platforms (rev5)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [PATCH] drm/i915: Fix wm params for ccs
2021-07-14 4:38 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH 00/16] Enable GuC based power management features
2021-07-14 1:40 UTC (13+ messages)
` [Intel-gfx] [PATCH 02/16] drm/i915/guc/slpc: Initial definitions for slpc
` [Intel-gfx] [PATCH 04/16] drm/i915/guc/slpc: Lay out slpc init/enable/disable/fini
` [Intel-gfx] [PATCH 05/16] drm/i915/guc/slpc: Adding slpc communication interfaces
` [Intel-gfx] [PATCH 06/16] drm/i915/guc/slpc: Allocate, initialize and release slpc
[Intel-gfx] [PATCH 0/4] iommu/vt-d: Disable igfx iommu superpage on bxt/skl/glk
2021-07-14 1:31 UTC (8+ messages)
` [Intel-gfx] [PATCH 1/4] iommu/vt-d: Disable superpage for Geminilake igfx
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for iommu/vt-d: Disable igfx iommu superpage on bxt/skl/glk (rev2)
[Intel-gfx] [PATCH v4 0/4] shmem helpers for vgem
2021-07-14 0:11 UTC (7+ messages)
` [Intel-gfx] [PATCH v4 1/4] dma-buf: Require VM_PFNMAP vma for mmap
` [Intel-gfx] [PATCH v4 2/4] drm/shmem-helper: Switch to vmf_insert_pfn
` [Intel-gfx] [PATCH v4 3/4] drm/shmem-helpers: Allocate wc pages on x86
` [Intel-gfx] [PATCH v4 4/4] drm/vgem: use shmem helpers
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for shmem helpers for vgem (rev6)
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [PATCH] drm/fb-helper: Try to protect cleanup against delayed setup
2021-07-13 23:25 UTC (5+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915/ehl: Resolve insufficient header credits in MIPI DSI
2021-07-13 23:06 UTC (3+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [CI v4 00/12] Minor revid/stepping and workaround cleanup
2021-07-13 22:31 UTC (16+ messages)
` [Intel-gfx] [CI v4 01/12] drm/i915/step: s/<platform>_revid_tbl/<platform>_revids
` [Intel-gfx] [CI v4 02/12] drm/i915: Make pre-production detection use direct revid comparison
` [Intel-gfx] [CI v4 03/12] drm/i915/skl: Use revid->stepping tables
` [Intel-gfx] [CI v4 04/12] drm/i915/kbl: Drop pre-production revision from stepping table
` [Intel-gfx] [CI v4 05/12] drm/i915/bxt: Use revid->stepping tables
` [Intel-gfx] [CI v4 06/12] drm/i915/glk: "
` [Intel-gfx] [CI v4 07/12] drm/i915/icl: "
` [Intel-gfx] [CI v4 08/12] drm/i915/jsl_ehl: "
` [Intel-gfx] [CI v4 09/12] drm/i915/rkl: "
` [Intel-gfx] [CI v4 10/12] drm/i915/dg1: "
` [Intel-gfx] [CI v4 11/12] drm/i915/cnl: Drop all workarounds
` [Intel-gfx] [CI v4 12/12] drm/i915/icl: Drop workarounds that only apply to pre-production steppings
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Minor revid/stepping and workaround cleanup (rev5)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [PATCH] drm/i915/gt: Fix -EDEADLK handling regression
2021-07-13 20:22 UTC (6+ messages)
[Intel-gfx] [PATCH v2 00/12] Minor revid/stepping and workaround cleanup
2021-07-13 20:02 UTC (29+ messages)
` [Intel-gfx] [PATCH v2 02/12] drm/i915: Make pre-production detection use direct revid comparison
` [Intel-gfx] [PATCH v2 03/12] drm/i915/skl: Use revid->stepping tables
` [Intel-gfx] [PATCH v2 04/12] drm/i915/kbl: Drop pre-production revision from stepping table
` [Intel-gfx] [PATCH v2 05/12] drm/i915/bxt: Use revid->stepping tables
` [Intel-gfx] [PATCH v2 07/12] drm/i915/icl: "
` [Intel-gfx] [PATCH v2 09/12] drm/i915/rkl: "
` [Intel-gfx] [PATCH v2 10/12] drm/i915/dg1: "
` [Intel-gfx] [PATCH v3 "
` [Intel-gfx] [PATCH v2 11/12] drm/i915/cnl: Drop all workarounds
` [Intel-gfx] [PATCH v2 12/12] drm/i915/icl: Drop workarounds that only apply to pre-production steppings
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Minor revid/stepping and workaround cleanup (rev4)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [PATCH v2 0/9] drm: Add privacy-screen class and connector properties
2021-07-13 19:25 UTC (3+ messages)
[Intel-gfx] [PATCH 1/5] drm/i915: document caching related bits
2021-07-13 18:46 UTC (15+ messages)
` [Intel-gfx] [PATCH 2/5] drm/i915/uapi: convert drm_i915_gem_madvise to kernel-doc
` [Intel-gfx] [PATCH 3/5] drm/i915: convert drm_i915_gem_object "
` [Intel-gfx] [PATCH 4/5] drm/i915: pull in some more kernel-doc
` [Intel-gfx] [PATCH 5/5] drm/i915/ehl: unconditionally flush the pages on acquire
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm/i915: document caching related bits
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 00/47] GuC submission support
2021-07-13 18:36 UTC (17+ messages)
` [Intel-gfx] [PATCH 21/47] drm/i915/guc: Ensure G2H response has space in buffer
` [Intel-gfx] [PATCH 23/47] drm/i915/guc: Update GuC debugfs to support new GuC
` [Intel-gfx] [PATCH 24/47] drm/i915/guc: Add several request trace points
` [Intel-gfx] [PATCH 34/47] drm/i915/guc: Suspend/resume implementation for new interface
` [Intel-gfx] [PATCH 35/47] drm/i915/guc: Handle context reset notification
` [Intel-gfx] [PATCH 36/47] drm/i915/guc: Handle engine reset failure notification
` [Intel-gfx] [PATCH 37/47] drm/i915/guc: Enable the timer expired interrupt for GuC
` [Intel-gfx] [PATCH 41/47] drm/i915/guc: Capture error state on context reset
[Intel-gfx] [PATCH v3 1/5] drm/i915: use consistent CPU mappings for pin_map users
2021-07-13 18:03 UTC (3+ messages)
` [Intel-gfx] [PATCH v3 3/5] drm/i915/uapi: reject caching ioctls for discrete
[Intel-gfx] [PATCH v4 00/18] drm/sched dependency tracking and dma-resv fixes
2021-07-13 17:46 UTC (18+ messages)
` [Intel-gfx] [PATCH v4 01/18] drm/sched: Split drm_sched_job_init
` [Intel-gfx] [PATCH v4 02/18] drm/sched: Barriers are needed for entity->last_scheduled
` [Intel-gfx] [PATCH v4 14/18] drm/msm: Don't break exclusive fence ordering
` [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/sched dependency tracking and dma-resv fixes (rev3)
[Intel-gfx] [PATCH] drm/i915/gtt: drop the page table optimisation
2021-07-13 17:29 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH i-g-t] [RFC] tests/kms_prime: Aligned pitch to 64 byte for Intel platforms
2021-07-13 17:14 UTC (5+ messages)
` [Intel-gfx] [igt-dev] "
[Intel-gfx] [PATCH CI 1/6] drm/i915/display: Settle on "adl-x" in WA comments
2021-07-13 17:04 UTC (10+ messages)
` [Intel-gfx] [PATCH CI 2/6] drm/i915: "
` [Intel-gfx] [PATCH CI 3/6] drm/i915: Implement Wa_1508744258
` [Intel-gfx] [PATCH CI 4/6] drm/i915/adl_s: Extend Wa_1406941453
` [Intel-gfx] [PATCH CI 5/6] drm/i915: Limit Wa_22010178259 to affected platforms
` [Intel-gfx] [PATCH CI 6/6] drm/i915/display/xelpd: Extend Wa_14011508470
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [CI,1/6] drm/i915/display: Settle on "adl-x" in WA comments
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v2 08/12] drm/i915/jsl_ehl: Use revid->stepping tables
2021-07-13 16:56 UTC (3+ messages)
` [Intel-gfx] [PATCH v3 "
[Intel-gfx] [PATCH 1/2] drm/i915/gem: Correct the locking and pin pattern for dma-buf (v5)
2021-07-13 15:23 UTC (9+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i915/gem: Migrate to system at dma-buf attach time (v5)
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/gem: Correct the locking and pin pattern for dma-buf (v5)
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PULL] drm-misc-fixes
2021-07-13 13:44 UTC (2+ messages)
[Intel-gfx] [PATCH v3 2/4] drm/shmem-helper: Switch to vmf_insert_pfn
2021-07-13 13:44 UTC (3+ messages)
` [Intel-gfx] [PATCH] "
[Intel-gfx] [PATCH] drm/i915/debugfs: xelpd lpsp capability
2021-07-13 11:08 UTC (4+ messages)
` [Intel-gfx] [PATCH] drm/i915/debugfs: DISPLAY_VER 13 "
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/debugfs: xelpd lpsp capability (rev2)
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH] Revert "drm/vgem: Implement mmap as GEM object function"
2021-07-13 9:49 UTC (3+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [PATCH v3] drm/i915: Be more gentle with exiting non-persistent context
2021-07-13 9:16 UTC (3+ messages)
` [Intel-gfx] [PATCH v5] "
[Intel-gfx] [PATCH 0/8] Per client engine busyness
2021-07-13 8:50 UTC (6+ messages)
` [Intel-gfx] [PATCH 1/8] drm/i915: Explicitly track DRM clients
[Intel-gfx] [PATCH v2 1/3] drm/i915: use consistent CPU mappings for pin_map users
2021-07-13 2:20 UTC (4+ messages)
` [Intel-gfx] [PATCH v2 3/3] drm/i915/uapi: reject set_domain for discrete
[Intel-gfx] [RFC PATCH v2 0/4] Allow using dyndbg to replace drm_debug_enabled
2021-07-13 1:38 UTC (4+ messages)
` [Intel-gfx] [RFC PATCH v2 1/4] drm_print.h: rewrap __DRM_DEFINE_DBG_RATELIMITED macro
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