intel-gfx.lists.freedesktop.org archive mirror

 messages from 2021-07-16 19:38:15 to 2021-07-19 18:31:13 UTC [more...]

[Intel-gfx] [PATCH 0/6] Fix the debugfs splat from mock selftests
 2021-07-19 18:30 UTC  (6+ messages)
` [Intel-gfx] [PATCH 1/6] drm/i915: Call i915_globals_exit() after i915_pmu_exit()
` [Intel-gfx] [PATCH 2/6] drm/i915: Call i915_globals_exit() if pci_register_device() fails
` [Intel-gfx] [PATCH 3/6] drm/i915: Always call i915_globals_exit() from i915_exit()
` [Intel-gfx] [PATCH 4/6] drm/ttm: Force re-init if ttm_global_init() fails
` [Intel-gfx] [PATCH 6/6] drm/i915: Make the kmem slab for i915_buddy_block a global

[Intel-gfx] [PATCH 00/51] GuC submission support
 2021-07-19 18:25 UTC  (61+ messages)
` [Intel-gfx] [PATCH 01/51] drm/i915/guc: Add new GuC interface defines and structures
` [Intel-gfx] [PATCH 02/51] drm/i915/guc: Remove GuC stage descriptor, add LRC descriptor
` [Intel-gfx] [PATCH 03/51] drm/i915/guc: Add LRC descriptor context lookup array
` [Intel-gfx] [PATCH 04/51] drm/i915/guc: Implement GuC submission tasklet
` [Intel-gfx] [PATCH 05/51] drm/i915/guc: Add bypass tasklet submission path to GuC
` [Intel-gfx] [PATCH 06/51] drm/i915/guc: Implement GuC context operations for new inteface
` [Intel-gfx] [PATCH 07/51] drm/i915/guc: Insert fence on context when deregistering
` [Intel-gfx] [PATCH 08/51] drm/i915/guc: Defer context unpin until scheduling is disabled
` [Intel-gfx] [PATCH 09/51] drm/i915/guc: Disable engine barriers with GuC during unpin
` [Intel-gfx] [PATCH 10/51] drm/i915/guc: Extend deregistration fence to schedule disable
` [Intel-gfx] [PATCH 11/51] drm/i915: Disable preempt busywait when using GuC scheduling
` [Intel-gfx] [PATCH 12/51] drm/i915/guc: Ensure request ordering via completion fences
` [Intel-gfx] [PATCH 13/51] drm/i915/guc: Disable semaphores when using GuC scheduling
` [Intel-gfx] [PATCH 14/51] drm/i915/guc: Ensure G2H response has space in buffer
` [Intel-gfx] [PATCH 15/51] drm/i915/guc: Update intel_gt_wait_for_idle to work with GuC
` [Intel-gfx] [PATCH 16/51] drm/i915/guc: Update GuC debugfs to support new GuC
` [Intel-gfx] [PATCH 17/51] drm/i915/guc: Add several request trace points
` [Intel-gfx] [PATCH 18/51] drm/i915: Add intel_context tracing
` [Intel-gfx] [PATCH 19/51] drm/i915/guc: GuC virtual engines
` [Intel-gfx] [PATCH 20/51] drm/i915: Track 'serial' counts for "
` [Intel-gfx] [PATCH 21/51] drm/i915: Hold reference to intel_context over life of i915_request
` [Intel-gfx] [PATCH 22/51] drm/i915/guc: Disable bonding extension with GuC submission
` [Intel-gfx] [PATCH 23/51] drm/i915/guc: Direct all breadcrumbs for a class to single breadcrumbs
` [Intel-gfx] [PATCH 24/51] drm/i915: Add i915_sched_engine destroy vfunc
` [Intel-gfx] [PATCH 25/51] drm/i915: Move active request tracking to a vfunc
` [Intel-gfx] [PATCH 26/51] drm/i915/guc: Reset implementation for new GuC interface
` [Intel-gfx] [PATCH 27/51] drm/i915: Reset GPU immediately if submission is disabled
` [Intel-gfx] [PATCH 28/51] drm/i915/guc: Add disable interrupts to guc sanitize
` [Intel-gfx] [PATCH 29/51] drm/i915/guc: Suspend/resume implementation for new interface
` [Intel-gfx] [PATCH 30/51] drm/i915/guc: Handle context reset notification
` [Intel-gfx] [PATCH 31/51] drm/i915/guc: Handle engine reset failure notification
` [Intel-gfx] [PATCH 32/51] drm/i915/guc: Enable the timer expired interrupt for GuC
` [Intel-gfx] [PATCH 33/51] drm/i915/guc: Provide mmio list to be saved/restored on engine reset
` [Intel-gfx] [PATCH 34/51] drm/i915/guc: Don't complain about reset races
` [Intel-gfx] [PATCH 35/51] drm/i915/guc: Enable GuC engine reset
` [Intel-gfx] [PATCH 36/51] drm/i915/guc: Capture error state on context reset
` [Intel-gfx] [PATCH 37/51] drm/i915/guc: Fix for error capture after full GPU reset with GuC
` [Intel-gfx] [PATCH 38/51] drm/i915/guc: Hook GuC scheduling policies up
` [Intel-gfx] [PATCH 39/51] drm/i915/guc: Connect reset modparam updates to GuC policy flags
` [Intel-gfx] [PATCH 40/51] drm/i915/guc: Include scheduling policies in the debugfs state dump
` [Intel-gfx] [PATCH 41/51] drm/i915/guc: Add golden context to GuC ADS
` [Intel-gfx] [PATCH 42/51] drm/i915/guc: Implement banned contexts for GuC submission
` [Intel-gfx] [PATCH 43/51] drm/i915/guc: Support request cancellation
` [Intel-gfx] [PATCH 44/51] drm/i915/selftest: Better error reporting from hangcheck selftest
` [Intel-gfx] [PATCH 45/51] drm/i915/selftest: Fix workarounds selftest for GuC submission
` [Intel-gfx] [PATCH 46/51] drm/i915/selftest: Fix MOCS "
` [Intel-gfx] [PATCH 47/51] drm/i915/selftest: Increase some timeouts in live_requests
` [Intel-gfx] [PATCH 48/51] drm/i915/selftest: Fix hangcheck self test for GuC submission
` [Intel-gfx] [PATCH 49/51] drm/i915/selftest: Bump selftest timeouts for hangcheck
` [Intel-gfx] [PATCH 50/51] drm/i915/guc: Implement GuC priority management
` [Intel-gfx] [PATCH 51/51] drm/i915/guc: Unblock GuC submission on Gen11+
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for GuC submission support (rev3)

[Intel-gfx] [PATCH v2 00/50] Begin enabling Xe_HP SDV and DG2 platforms
 2021-07-19 18:22 UTC  (35+ messages)
` [Intel-gfx] [PATCH v2 01/50] drm/i915: Add XE_HP initial definitions
` [Intel-gfx] [PATCH v2 08/50] drm/i915/xehp: Extra media engines - Part 3 (reset)
` [Intel-gfx] [PATCH v2 10/50] drm/i915/xehp: Define multicast register ranges
` [Intel-gfx] [PATCH v2 15/50] drm/i915/xehpsdv: add initial XeHP SDV definitions
` [Intel-gfx] [PATCH v2 17/50] drm/i915/xehpsdv: Add maximum sseu limits
` [Intel-gfx] [PATCH v2 23/50] drm/i915/dg2: add DG2 platform info
` [Intel-gfx] [PATCH v2 24/50] drm/i915/dg2: DG2 uses the same sseu limits as XeHP SDV
` [Intel-gfx] [PATCH v2 32/50] drm/i915/dg2: Add fake PCH
` [Intel-gfx] [PATCH v2 34/50] drm/i915/dg2: Skip shared DPLL handling
` [Intel-gfx] [PATCH v2 35/50] drm/i915/dg2: Don't wait for AUX power well enable ACKs
` [Intel-gfx] [PATCH v2 36/50] drm/i915/dg2: Setup display outputs
` [Intel-gfx] [PATCH v2 37/50] drm/i915/dg2: Add dbuf programming
` [Intel-gfx] [PATCH v2 38/50] drm/i915/dg2: Don't program BW_BUDDY registers
` [Intel-gfx] [PATCH v2 42/50] drm/i915/dg2: Add MPLLB programming for HDMI
` [Intel-gfx] [PATCH v2 43/50] drm/i915/dg2: Add vswing programming for SNPS phys
` [Intel-gfx] [PATCH v2 45/50] drm/i915/dg2: Classify DG2 PHY types
` [Intel-gfx] [PATCH v2 46/50] drm/i915/dg2: Wait for SNPS PHY calibration during display init

[Intel-gfx] [PATCH 0/7] More workaround updates
 2021-07-19 18:00 UTC  (18+ messages)
` [Intel-gfx] [PATCH 1/7] drm/i915: Fix application of WaInPlaceDecompressionHang
` [Intel-gfx] [PATCH 2/7] drm/i915/icl: Drop a couple unnecessary workarounds
` [Intel-gfx] [PATCH 3/7] drm/i915: Program DFR enable/disable as a GT workaround
` [Intel-gfx] [PATCH 4/7] drm/i915/adl_s: Wa_14011765242 is also needed on A1 display stepping
` [Intel-gfx] [PATCH 5/7] drm/i915/rkl: Wa_1409767108 also applies to RKL
` [Intel-gfx] [PATCH 6/7] drm/i915/rkl: Wa_1408330847 no longer "
` [Intel-gfx] [PATCH 7/7] drm/i915: Make workaround upper bounds exclusive
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for More workaround updates
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [v7 0/3] Set BPP in the kernel
 2021-07-19 15:19 UTC  (8+ messages)
` [Intel-gfx] [v7 1/3] drm/i915/display: Add write permissions for fec support
` [Intel-gfx] [v7 2/3] drm/i915/display/dsc: Add Per connector debugfs node for DSC BPP enable
` [Intel-gfx] [v7 3/3] drm/i915/display/dsc: Force dsc BPP
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Set BPP in the kernel (rev5)
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH 12/13] vfio/gvt: Fix open/close when multiple device FDs are open
 2021-07-19 14:47 UTC  (2+ messages)

[Intel-gfx] [PATCH 10/13] vfio/mbochs: Fix close when multiple device FDs are open
 2021-07-19 14:45 UTC  (2+ messages)

[Intel-gfx] [PATCH 11/13] vfio/ap, ccw: Fix open/close when multiple device FDs are open
 2021-07-19 14:40 UTC  (2+ messages)

[Intel-gfx] [PATCH 0/7] drm/i915: Migrate memory to SMEM when imported cross-device
 2021-07-19 13:34 UTC  (10+ messages)
` [Intel-gfx] [PATCH 5/7] drm/i915/gem/ttm: Respect the objection region in placement_from_obj

[Intel-gfx] [PATCH 03/13] vfio: Provide better generic support for open/release vfio_device_ops
 2021-07-19 13:03 UTC  (4+ messages)

[Intel-gfx] [PATCH 04/13] vfio/samples: Delete useless open/close
 2021-07-19 13:01 UTC  (2+ messages)

[Intel-gfx] [PATCH 02/13] vfio: Introduce a vfio_uninit_group_dev() API call
 2021-07-19 12:43 UTC  (4+ messages)

[Intel-gfx] [PATCH] drm/i915: Check for nomodeset in i915_init() first
 2021-07-19 12:28 UTC  (7+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH 01/13] vfio/samples: Remove module get/put
 2021-07-19 11:42 UTC  (2+ messages)

[Intel-gfx] [PATCH 0/5] MIPI DSI driver enhancements
 2021-07-19 10:34 UTC  (10+ messages)
` [Intel-gfx] [PATCH 1/5] drm/i915/dsi: send correct gpio_number on gen11 platform
` [Intel-gfx] [PATCH 2/5] drm/i915/jsl: program DSI panel GPIOs
` [Intel-gfx] [PATCH 3/5] drm/i915/dsi: wait for header and payload credit available
` [Intel-gfx] [PATCH 4/5] drm/i915/dsi: refine send MIPI DCS command sequence
` [Intel-gfx] [PATCH 5/5] drm/i915: Get proper min cdclk if vDSC enabled
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for MIPI DSI driver enhancements
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH 0/4] Some DG1 uAPI cleanup
 2021-07-19  9:09 UTC  (7+ messages)
` [Intel-gfx] [PATCH 4/4] drm/i915/uapi: reject set_domain for discrete
` [Intel-gfx] ✗ Fi.CI.IGT: failure for Some DG1 uAPI cleanup

[Intel-gfx] [PATCH 1/2] drm/i915: Call i915_globals_exit() after i915_pmu_exit()
 2021-07-19  8:55 UTC  (8+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i915: Tear down properly on early i915_init exit
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [1/2] drm/i915: Call i915_globals_exit() after i915_pmu_exit()
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH 0/7] drm/i915: Migrate memory to SMEM when imported cross-device (v7)
 2021-07-19  8:17 UTC  (10+ messages)
` [Intel-gfx] [PATCH 2/7] drm/i915/gem: Refactor placement setup for i915_gem_object_create* (v2)
` [Intel-gfx] [PATCH 4/7] drm/i915/gem: Unify user object creation (v2)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Migrate memory to SMEM when imported cross-device (rev2)
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH] drm/i915: Fix the 12 BPC bits for PIPE_MISC reg
 2021-07-19  7:35 UTC  (4+ messages)
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH] drm/i915/display: Fix shared dpll mismatch for bigjoiner slave
 2021-07-19  6:17 UTC  (3+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display: Fix shared dpll mismatch for bigjoiner slave (rev3)

[Intel-gfx] [PATCH rdma-next v2 0/2] SG fix together with update to RDMA umem
 2021-07-18 11:14 UTC  (4+ messages)
` [Intel-gfx] [PATCH rdma-next v2 1/2] lib/scatterlist: Fix wrong update of orig_nents
` [Intel-gfx] [PATCH rdma-next v2 2/2] RDMA: Use dma_map_sgtable for map umem pages
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for SG fix together with update to RDMA umem

[Intel-gfx] [PATCH 00/16] Enable GuC based power management features
 2021-07-17 19:30 UTC  (4+ messages)
` [Intel-gfx] [PATCH 12/16] drm/i915/guc/slpc: Cache platform frequency limits for slpc

[Intel-gfx] [PATCH 1/4] drm/i915/display: Disable FBC when PSR2 is enabled for xelpd platforms
 2021-07-17 12:48 UTC  (7+ messages)
` [Intel-gfx] [PATCH 2/4] drm/i915/display/psr2: Mark as updated all planes that intersect with pipe_clip
` [Intel-gfx] [PATCH 3/4] drm/i915/display/psr2: Fix cursor updates using legacy apis
` [Intel-gfx] [PATCH 4/4] drm/i915/display/psr2: Force a PSR exit in the frontbuffer modification flushes
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [1/4] drm/i915/display: Disable FBC when PSR2 is enabled for xelpd platforms
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH] drm/i915/gvt: Convert from atomic_t to refcount_t on intel_vgpu_ppgtt_spt->refcount
 2021-07-17 10:03 UTC  (4+ messages)
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH] drm/i915: Fix error return code in igt_vma_create()
 2021-07-17  9:09 UTC  (4+ messages)
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] misc vgaarb cleanups
 2021-07-17  8:14 UTC  (5+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] vgaarb: remove VGA_DEFAULT_DEVICE
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH 0/4] drm: Make modeset locking easier
 2021-07-17  7:20 UTC  (6+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH v2] drm/i915: Fix wm params for ccs
 2021-07-17  6:29 UTC  (4+ messages)
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: Fix wm params for ccs (rev4)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH 00/47] GuC submission support
 2021-07-17  4:09 UTC  (5+ messages)
` [Intel-gfx] [PATCH 22/47] drm/i915/guc: Update intel_gt_wait_for_idle to work with GuC

[Intel-gfx] [PATCH] drivers/gpu/drm/i915/display: remove boilerplate code using LOCK_ALL macros
 2021-07-17  2:36 UTC  (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH 00/13] drm/i915: Clean up DPLL stuff
 2021-07-17  0:55 UTC  (2+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for "

[Intel-gfx] [RFC 0/8] Per client GPU stats
 2021-07-16 23:58 UTC  (2+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for Per client GPU stats (rev2)

[Intel-gfx] [PATCH 1/2] drm/i915/step: Add macro magic for handling steps
 2021-07-16 23:07 UTC  (2+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915/step: Add macro magic for handling steps (rev2)

[Intel-gfx] [PATCH 00/13] Provide core infrastructure for managing open/release
 2021-07-16 22:10 UTC  (2+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for Provide core infrastructure for managing open/release (rev2)