intel-gfx.lists.freedesktop.org archive mirror

 messages from 2021-07-21 15:57:54 to 2021-07-22 08:28:02 UTC [more...]

[Intel-gfx] [PATCH 0/4] Nuke legacy hw_id
 2021-07-22  8:27 UTC  (14+ messages)
` [Intel-gfx] [PATCH 1/4] drm/i915/gt: fix platform prefix
` [Intel-gfx] [PATCH 2/4] drm/i915/gt: nuke unused legacy engine hw_id
` [Intel-gfx] [PATCH 3/4] drm/i915/gt: rename legacy engine->hw_id to engine->gen6_hw_id
` [Intel-gfx] [PATCH 4/4] drm/i915/gt: nuke gen6_hw_id

[Intel-gfx] [PATCH 00/51] GuC submission support
 2021-07-22  8:17 UTC  (12+ messages)
` [Intel-gfx] [PATCH 06/51] drm/i915/guc: Implement GuC context operations for new inteface
` [Intel-gfx] [PATCH 33/51] drm/i915/guc: Provide mmio list to be saved/restored on engine reset
` [Intel-gfx] [PATCH 47/51] drm/i915/selftest: Increase some timeouts in live_requests
` [Intel-gfx] [PATCH 49/51] drm/i915/selftest: Bump selftest timeouts for hangcheck

[Intel-gfx] [CI 00/18] CI pass for reviewed Xe_HP SDV and DG2 patches
 2021-07-22  7:47 UTC  (23+ messages)
` [Intel-gfx] [CI 01/18] drm/i915: Add XE_HP initial definitions
` [Intel-gfx] [CI 02/18] drm/i915/xehpsdv: add initial XeHP SDV definitions
` [Intel-gfx] [CI 03/18] drm/i915/dg2: add DG2 platform info
` [Intel-gfx] [CI 04/18] drm/i915: Fork DG1 interrupt handler
` [Intel-gfx] [CI 05/18] drm/i915/xehp: VDBOX/VEBOX fusing registers are enable-based
` [Intel-gfx] [CI 06/18] drm/i915/gen12: Use fuse info to enable SFC
` [Intel-gfx] [CI 07/18] drm/i915/selftests: Allow for larger engine counts
` [Intel-gfx] [CI 08/18] drm/i915/xehp: Handle new device context ID format
` [Intel-gfx] [CI 09/18] drm/i915/xehp: New engine context offsets
` [Intel-gfx] [CI 10/18] drm/i915/dg2: Add fake PCH
` [Intel-gfx] [CI 11/18] drm/i915/dg2: Add cdclk table and reference clock
` [Intel-gfx] [CI 12/18] drm/i915/dg2: Skip shared DPLL handling
` [Intel-gfx] [CI 13/18] drm/i915/dg2: Don't wait for AUX power well enable ACKs
` [Intel-gfx] [CI 14/18] drm/i915/dg2: Setup display outputs
` [Intel-gfx] [CI 15/18] drm/i915/dg2: Add dbuf programming
` [Intel-gfx] [CI 16/18] drm/i915/dg2: Don't program BW_BUDDY registers
` [Intel-gfx] [CI 17/18] drm/i915/dg2: Don't read DRAM info
` [Intel-gfx] [CI 18/18] drm/i915/dg2: DG2 has fixed memory bandwidth
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for CI pass for reviewed Xe_HP SDV and DG2 patches
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH] drm/i915/bios: Fix ports mask
 2021-07-22  7:22 UTC  (7+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] 5.14-rc2 warnings with kvmgvt
 2021-07-22  7:20 UTC  (12+ messages)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for "
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for 5.14-rc2 warnings with kvmgvt (rev2)

[Intel-gfx] [PATCH 0/5] MIPI DSI driver enhancements
 2021-07-22  7:17 UTC  (4+ messages)
` [Intel-gfx] [PATCH 5/5] drm/i915: Get proper min cdclk if vDSC enabled

[Intel-gfx] [PATCH 01/10] drm/i915/bios: Allow DSI ports to be parsed by parse_ddi_port()
 2021-07-22  6:37 UTC  (13+ messages)
` [Intel-gfx] [PATCH 02/10] drm/i915/bios: Start to support two integrated panels
` [Intel-gfx] [PATCH 03/10] drm/i915/bios: Enable parse of two integrated panels timing data
` [Intel-gfx] [PATCH 04/10] drm/i915/bios: Enable parse of two integrated panels backlight data
` [Intel-gfx] [PATCH 05/10] drm/i915/bios: Enable parse of two integrated panels eDP data
` [Intel-gfx] [PATCH 06/10] drm/i915/bios: Enable parse of two integrated panels PSR data
` [Intel-gfx] [PATCH 07/10] drm/i915/bios: Enable parse of two DSI panels data
` [Intel-gfx] [PATCH 08/10] drm/i915/bios: Nuke panel_type
` [Intel-gfx] [PATCH 09/10] drm/i915/bios: Only use opregion panel index for display ver 8 and older
` [Intel-gfx] [PATCH 10/10] drm/i915/display/tgl+: Use PPS index from vbt
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/10] drm/i915/bios: Allow DSI ports to be parsed by parse_ddi_port()
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "

[Intel-gfx] [CI 1/4] drm/i915/step: Add macro magic for handling steps
 2021-07-22  5:07 UTC  (8+ messages)
` [Intel-gfx] [CI 2/4] drm/i915/dmc: Change intel_get_stepping_info()
` [Intel-gfx] [CI 3/4] drm/i915/firmware: Update to DMC v2.12 on TGL
` [Intel-gfx] [CI 4/4] drm/i915/firmware: Update to DMC v2.03 on RKL
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/4] drm/i915/step: Add macro magic for handling steps
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH 00/18] Series to merge a subset of GuC submission
 2021-07-22  4:15 UTC  (23+ messages)
` [Intel-gfx] [PATCH 01/18] drm/i915/guc: Add new GuC interface defines and structures
` [Intel-gfx] [PATCH 02/18] drm/i915/guc: Remove GuC stage descriptor, add LRC descriptor
` [Intel-gfx] [PATCH 03/18] drm/i915/guc: Add LRC descriptor context lookup array
` [Intel-gfx] [PATCH 04/18] drm/i915/guc: Implement GuC submission tasklet
` [Intel-gfx] [PATCH 05/18] drm/i915/guc: Add bypass tasklet submission path to GuC
` [Intel-gfx] [PATCH 06/18] drm/i915/guc: Implement GuC context operations for new inteface
` [Intel-gfx] [PATCH 07/18] drm/i915/guc: Insert fence on context when deregistering
` [Intel-gfx] [PATCH 08/18] drm/i915/guc: Defer context unpin until scheduling is disabled
` [Intel-gfx] [PATCH 09/18] drm/i915/guc: Disable engine barriers with GuC during unpin
` [Intel-gfx] [PATCH 10/18] drm/i915/guc: Extend deregistration fence to schedule disable
` [Intel-gfx] [PATCH 11/18] drm/i915: Disable preempt busywait when using GuC scheduling
` [Intel-gfx] [PATCH 12/18] drm/i915/guc: Ensure request ordering via completion fences
` [Intel-gfx] [PATCH 13/18] drm/i915/guc: Disable semaphores when using GuC scheduling
` [Intel-gfx] [PATCH 14/18] drm/i915/guc: Ensure G2H response has space in buffer
` [Intel-gfx] [PATCH 15/18] drm/i915/guc: Update intel_gt_wait_for_idle to work with GuC
` [Intel-gfx] [PATCH 16/18] drm/i915/guc: Update GuC debugfs to support new GuC
` [Intel-gfx] [PATCH 17/18] drm/i915/guc: Add trace point for GuC submit
` [Intel-gfx] [PATCH 18/18] drm/i915: Add intel_context tracing
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Series to merge a subset of GuC submission (rev2)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH 0/7] drm/i915: Migrate memory to SMEM when imported cross-device (v8)
 2021-07-22  3:22 UTC  (11+ messages)
` [Intel-gfx] [PATCH 1/7] drm/i915/gem: Check object_can_migrate from object_migrate
` [Intel-gfx] [PATCH 2/7] drm/i915/gem: Refactor placement setup for i915_gem_object_create* (v2)
` [Intel-gfx] [PATCH 3/7] drm/i915/gem: Call i915_gem_flush_free_objects() in i915_gem_dumb_create()
` [Intel-gfx] [PATCH 4/7] drm/i915/gem: Unify user object creation (v3)
` [Intel-gfx] [PATCH 5/7] drm/i915/gem/ttm: Respect the objection region in placement_from_obj
` [Intel-gfx] [PATCH 6/7] drm/i915/gem: Correct the locking and pin pattern for dma-buf (v8)
` [Intel-gfx] [PATCH 7/7] drm/i915/gem: Migrate to system at dma-buf attach time (v7)
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Migrate memory to SMEM when imported cross-device (rev3)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH v2 00/14] drm/i915/guc: Enable GuC based power management features
 2021-07-22  2:36 UTC  (33+ messages)
` [Intel-gfx] [PATCH 01/14] drm/i915/guc: SQUASHED PATCH - DO NOT REVIEW
` [Intel-gfx] [PATCH 02/14] drm/i915/guc/slpc: Initial definitions for SLPC
` [Intel-gfx] [PATCH 03/14] drm/i915/guc/slpc: Gate Host RPS when SLPC is enabled
` [Intel-gfx] [PATCH 04/14] drm/i915/guc/slpc: Adding SLPC communication interfaces
` [Intel-gfx] [PATCH 05/14] drm/i915/guc/slpc: Allocate, initialize and release SLPC
` [Intel-gfx] [PATCH 06/14] drm/i915/guc/slpc: Enable SLPC and add related H2G events
` [Intel-gfx] [PATCH 07/14] drm/i915/guc/slpc: Add methods to set min/max frequency
` [Intel-gfx] [PATCH 08/14] drm/i915/guc/slpc: Add get max/min freq hooks
` [Intel-gfx] [PATCH 09/14] drm/i915/guc/slpc: Add debugfs for SLPC info
` [Intel-gfx] [PATCH 10/14] drm/i915/guc/slpc: Enable ARAT timer interrupt
` [Intel-gfx] [PATCH 11/14] drm/i915/guc/slpc: Cache platform frequency limits
` [Intel-gfx] [PATCH 12/14] drm/i915/guc/slpc: Sysfs hooks for SLPC
` [Intel-gfx] [PATCH 13/14] drm/i915/guc/slpc: Add SLPC selftest
` [Intel-gfx] [PATCH 14/14] drm/i915/guc/rc: Setup and enable GUCRC feature
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc: Enable GuC based power management features
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH] drm/i915: Ditch i915 globals shrink infrastructure
 2021-07-22  2:31 UTC  (6+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH 00/18] Series to merge a subset of GuC submission
 2021-07-21 23:57 UTC  (6+ messages)
` [Intel-gfx] [PATCH 06/18] drm/i915/guc: Implement GuC context operations for new inteface
` [Intel-gfx] [PATCH 12/18] drm/i915/guc: Ensure request ordering via completion fences

[Intel-gfx] [PATCH i-g-t 0/7] Updates for GuC & parallel execbuf
 2021-07-21 23:20 UTC  (8+ messages)
` [Intel-gfx] [PATCH i-g-t 1/7] include/drm-uapi: Add parallel context configuration uAPI
` [Intel-gfx] [PATCH i-g-t 2/7] include/drm-uapi: Add logical mapping uAPI
` [Intel-gfx] [PATCH i-g-t 3/7] lib/intel_ctx: Add support for parallel contexts to intel_ctx library
` [Intel-gfx] [PATCH i-g-t 4/7] i915/gem_exec_balancer: Test parallel execbuf
` [Intel-gfx] [PATCH i-g-t 5/7] include/drm-uapi: Add static priority mapping UAPI
` [Intel-gfx] [PATCH i-g-t 6/7] i915/gem_scheduler: Make gem_scheduler understand static priority mapping
` [Intel-gfx] [PATCH i-g-t 7/7] i915/gem_ctx_shared: Make gem_ctx_shared "

[Intel-gfx] refactor the i915 GVT support
 2021-07-21 21:14 UTC  (17+ messages)
` [Intel-gfx] [PATCH 10/21] drm/i915/gvt: remove vgpu->handle
` [Intel-gfx] [PATCH 11/21] drm/i915/gvt: devirtualize ->{read, write}_gpa
` [Intel-gfx] [PATCH 12/21] drm/i915/gvt: devirtualize ->{get, put}_vfio_device
` [Intel-gfx] [PATCH 13/21] drm/i915/gvt: devirtualize ->set_edid and ->set_opregion
` [Intel-gfx] [PATCH 14/21] drm/i915/gvt: devirtualize ->detach_vgpu
` [Intel-gfx] [PATCH 15/21] drm/i915/gvt: devirtualize ->inject_msi
` [Intel-gfx] [PATCH 16/21] drm/i915/gvt: devirtualize ->is_valid_gfn
` [Intel-gfx] [PATCH 17/21] drm/i915/gvt: devirtualize ->gfn_to_mfn
` [Intel-gfx] [PATCH 18/21] drm/i915/gvt: devirtualize ->{enable, disable}_page_track
` [Intel-gfx] [PATCH 19/21] drm/i915/gvt: devirtualize ->dma_{, un}map_guest_page
` [Intel-gfx] [PATCH 20/21] drm/i915/gvt: devirtualize dma_pin_guest_page
` [Intel-gfx] [PATCH 21/21] drm/i915/gvt: remove struct intel_gvt_mpt
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/21] drm/i915/gvt: integrate into the main Makefile
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH 0/7] drm/i915: Migrate memory to SMEM when imported cross-device
 2021-07-21 20:32 UTC  (18+ messages)
` [Intel-gfx] [PATCH 3/7] drm/i915/gem: Unify user object creation
` [Intel-gfx] [PATCH 5/7] drm/i915/gem/ttm: Respect the objection region in placement_from_obj

[Intel-gfx] [PATCH 0/4] Some DG1 uAPI cleanup
 2021-07-21 20:27 UTC  (5+ messages)
` [Intel-gfx] [PATCH 3/4] drm/i915/userptr: Probe existence of backing struct pages upon creation

[Intel-gfx] [PATCH 0/6] Fix the debugfs splat from mock selftests (v3)
 2021-07-21 20:15 UTC  (7+ messages)
` [Intel-gfx] [PATCH 6/6] drm/i915: Make the kmem slab for i915_buddy_block a global
` [Intel-gfx] ✓ Fi.CI.BAT: success for Fix the debugfs splat from mock selftests (rev3)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH CI 1/4] drm: Add function to convert rect in 16.16 fixed format to regular format
 2021-07-21 19:42 UTC  (9+ messages)
` [Intel-gfx] [PATCH CI 2/4] drm/i915/display/psr: Use plane damage clips to calculate damaged area

[Intel-gfx] [PATCH] drm/i915/gvt: Fix cached atomics setting for Windows VM
 2021-07-21 19:41 UTC  (3+ messages)

[Intel-gfx] [PATCH 0/7] More workaround updates
 2021-07-21 18:24 UTC  (3+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for "

[Intel-gfx] [PATCH v2 00/50] Begin enabling Xe_HP SDV and DG2 platforms
 2021-07-21 18:23 UTC  (9+ messages)
` [Intel-gfx] [PATCH v2 06/50] drm/i915/xehp: Extra media engines - Part 1 (engine definitions)
` [Intel-gfx] [PATCH v2 40/50] drm/i915/dg2: DG2 has fixed memory bandwidth
` [Intel-gfx] [PATCH v2 47/50] drm/i915/dg2: Update lane disable power state during PSR
` [Intel-gfx] [PATCH v2 48/50] drm/i915/dg2: Add DG2 to the PSR2 defeature list

[Intel-gfx] [PATCH 0/7] drm/i915: Migrate memory to SMEM when imported cross-device (v7)
 2021-07-21 18:22 UTC  (6+ messages)
` [Intel-gfx] [PATCH 2/7] drm/i915/gem: Refactor placement setup for i915_gem_object_create* (v2)

[Intel-gfx] [PATCH 1/4] drm/i915/display: Disable FBC when PSR2 is enabled for xelpd platforms
 2021-07-21 18:04 UTC  (2+ messages)

[Intel-gfx] [RESEND PATCH v6 03/14] drm/i915/utils: Replace dev_printk with drm helpers
 2021-07-21 17:55 UTC  (3+ messages)
` [Intel-gfx] [RESEND PATCH v6 09/14] drm/i915: Change infoframe debug checks to specify syslog
` [Intel-gfx] [RESEND PATCH v6 12/14] drm/i915: Use debug category printer for welcome message

[Intel-gfx] [PATCH 00/16] Enable GuC based power management features
 2021-07-21 17:36 UTC  (5+ messages)
` [Intel-gfx] [PATCH 07/16] drm/i915/guc/slpc: Enable slpc and add related H2G events

[Intel-gfx] [PATCH] drm/i915/display: Fix shared dpll mismatch for bigjoiner slave
 2021-07-21 17:42 UTC  (5+ messages)

[Intel-gfx] [PATCH rdma-next v2 0/2] SG fix together with update to RDMA umem
 2021-07-21 16:16 UTC  (5+ messages)
` [Intel-gfx] [PATCH rdma-next v2 1/2] lib/scatterlist: Fix wrong update of orig_nents
` [Intel-gfx] [PATCH rdma-next v2 2/2] RDMA: Use dma_map_sgtable for map umem pages