messages from 2021-07-29 13:34:39 to 2021-08-02 10:30:19 UTC [more...]
[Intel-gfx] [PATCH] drm/i915: Correct SFC_DONE register offset
2021-08-02 10:29 UTC (4+ messages)
[Intel-gfx] [PATCH 0/1] Fix gem_ctx_persistence failures with GuC submission
2021-08-02 9:40 UTC (7+ messages)
` [Intel-gfx] [PATCH 1/1] drm/i915: Check if engine has heartbeat when closing a context
[Intel-gfx] [PATCH v2 1/2] drm/i915: document caching related bits
2021-08-02 9:24 UTC (2+ messages)
[Intel-gfx] [PATCH] drm: Fix oops in damage self-tests by mocking damage property
2021-08-02 9:10 UTC (8+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] [RFC PATCH] drm: mock_device can be static
` [Intel-gfx] ✓ Fi.CI.IGT: success for drm: Fix oops in damage self-tests by mocking damage property
[Intel-gfx] [PATCH i-g-t 0/1] Fix gem_scheduler.manycontexts for GuC submission
2021-08-02 8:59 UTC (7+ messages)
` [Intel-gfx] [PATCH i-g-t 1/1] i915/gem_scheduler: Ensure submission order in manycontexts
` [Intel-gfx] [igt-dev] "
[Intel-gfx] [PATCH] drm/i915: Tweaked Wa_14010685332 for all PCHs
2021-08-02 7:58 UTC (2+ messages)
` [Intel-gfx] [CI v2] "
[Intel-gfx] [PATCH v2 7/7] drm/connector: add ref to drm_connector_get in iter docs
2021-08-02 7:36 UTC
[Intel-gfx] [PATCH v3 0/1] lpsp with hdmi/dp outputs
2021-08-02 6:51 UTC (4+ messages)
` [Intel-gfx] [PATCH v3 1/1] drm/i915/dg1: Adjust the AUDIO power domain
` [Intel-gfx] ✗ Fi.CI.IGT: failure for lpsp with hdmi/dp outputs
[Intel-gfx] [PATCH i-g-t v3 01/11] lib/i915/gem_mman: add FIXED mmap mode
2021-08-02 6:29 UTC (14+ messages)
` [Intel-gfx] [PATCH i-g-t v3 02/11] lib/i915/gem_mman: add fixed mode to mmap__device_coherent
` [Intel-gfx] [PATCH i-g-t v3 03/11] lib/i915/gem_mman: add fixed mode to gem_mmap_offset__cpu
` [Intel-gfx] [PATCH i-g-t v3 04/11] lib/i915/gem_mman: add fixed mode to gem_mmap__cpu
` [Intel-gfx] [PATCH i-g-t v3 05/11] lib/i915/gem_mman: update mmap_offset_types with FIXED
` [Intel-gfx] [PATCH i-g-t v3 06/11] lib/ioctl_wrappers: update mmap_{read, write} for discrete
` [Intel-gfx] [PATCH i-g-t v3 07/11] lib/intel_bufops: "
` [Intel-gfx] [PATCH i-g-t v3 08/11] lib/ioctl_wrappers: update set_domain "
` [Intel-gfx] [PATCH i-g-t v3 09/11] tests/i915/module_load: update "
` [Intel-gfx] [PATCH i-g-t v3 10/11] lib/i915/gem_mman: add helper query for has_device_coherent
` [Intel-gfx] [PATCH i-g-t v3 11/11] tests/i915/gem_exec_fence: use device_coherent mmap
[Intel-gfx] [PATCH i-g-t v2 01/11] lib/i915/gem_mman: add FIXED mmap mode
2021-08-02 6:29 UTC (7+ messages)
` [Intel-gfx] [PATCH i-g-t v2 04/11] lib/i915/gem_mman: add fixed mode to gem_mmap__cpu
[Intel-gfx] [PATCH] drm/i915: Use Transparent Hugepages when IOMMU is enabled
2021-08-01 14:27 UTC (2+ messages)
[Intel-gfx] [PATCH] dyndbg: add special aux_print framework
2021-08-01 6:01 UTC (4+ messages)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for dyndbg: add special aux_print framework (rev2)
[Intel-gfx] [PATCH] dyndbg: add special aux_print framework
2021-08-01 3:34 UTC
[Intel-gfx] [PATCH v4 0/7] drm: use dyndbg in drm_print
2021-08-01 0:54 UTC (12+ messages)
` [Intel-gfx] [PATCH v4 1/7] drm/print: fixup spelling in a comment
` [Intel-gfx] [PATCH v4 2/7] moduleparam: add data member to struct kernel_param
` [Intel-gfx] [PATCH v4 3/7] dyndbg: add dyndbg-bitmap definer and callbacks
` [Intel-gfx] [PATCH v4 4/7] i915/gvt: remove spaces in pr_debug "gvt: core:" etc prefixes
` [Intel-gfx] [PATCH v4 5/7] i915/gvt: control pr_debug("gvt:")s with bits in parameters/debug_gvt
` [Intel-gfx] [PATCH v4 6/7] drm/print: add choice to use dynamic debug in drm-debug
` [Intel-gfx] [PATCH v4 7/7] amdgpu: define a dydbg-bitmap to control categorized pr_debugs
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm: use dyndbg in drm_print (rev3)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v6 00/14] drm/i915/guc/slpc: Enable GuC based power management features
2021-07-31 10:40 UTC (20+ messages)
` [Intel-gfx] [PATCH 01/14] drm/i915/guc/slpc: Initial definitions for SLPC
` [Intel-gfx] [PATCH 02/14] drm/i915/guc/slpc: Gate Host RPS when SLPC is enabled
` [Intel-gfx] [PATCH 03/14] drm/i915/guc/slpc: Adding SLPC communication interfaces
` [Intel-gfx] [PATCH 04/14] drm/i915/guc/slpc: Allocate, initialize and release SLPC
` [Intel-gfx] [PATCH 05/14] drm/i915/guc/slpc: Enable SLPC and add related H2G events
` [Intel-gfx] [PATCH 06/14] drm/i915/guc/slpc: Remove BUG_ON in guc_submission_disable
` [Intel-gfx] [PATCH 07/14] drm/i915/guc/slpc: Add methods to set min/max frequency
` [Intel-gfx] [PATCH 08/14] drm/i915/guc/slpc: Add get max/min freq hooks
` [Intel-gfx] [PATCH 09/14] drm/i915/guc/slpc: Add debugfs for SLPC info
` [Intel-gfx] [PATCH 10/14] drm/i915/guc/slpc: Enable ARAT timer interrupt
` [Intel-gfx] [PATCH 11/14] drm/i915/guc/slpc: Cache platform frequency limits
` [Intel-gfx] [PATCH 12/14] drm/i915/guc/slpc: Sysfs hooks for SLPC
` [Intel-gfx] [PATCH 13/14] drm/i915/guc/slpc: Add SLPC selftest
` [Intel-gfx] [PATCH 14/14] drm/i915/guc/rc: Setup and enable GuCRC feature
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc/slpc: Enable GuC based power management features (rev4)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH] drm/i915: Fix syncmap memory leak
2021-07-31 2:17 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH] drm/i915/xehp: Fix missing sentinel on mcr_ranges_xehp
2021-07-31 2:07 UTC (6+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH 1/4] drm/i915/display/tgl+: Dispatch atomic commits instead of front buffer modifications
2021-07-31 0:45 UTC (6+ messages)
` [Intel-gfx] [PATCH 2/4] drm/i915/display: Fix sel fetch plane offset calculation
` [Intel-gfx] [PATCH 3/4] drm/i915: Nuke ORIGIN_GTT
` [Intel-gfx] [PATCH 4/4] DO_NOT_MERGE: drm/i915/display: Enable PSR2 selective fetch by default
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915/display/tgl+: Dispatch atomic commits instead of front buffer modifications
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [PATCH v5 00/14] drm/i915/guc/slpc: Enable GuC based power management features
2021-07-30 19:55 UTC (20+ messages)
` [Intel-gfx] [PATCH 01/14] drm/i915/guc/slpc: Initial definitions for SLPC
` [Intel-gfx] [PATCH 02/14] drm/i915/guc/slpc: Gate Host RPS when SLPC is enabled
` [Intel-gfx] [PATCH 03/14] drm/i915/guc/slpc: Adding SLPC communication interfaces
` [Intel-gfx] [PATCH 04/14] drm/i915/guc/slpc: Allocate, initialize and release SLPC
` [Intel-gfx] [PATCH 05/14] drm/i915/guc/slpc: Enable SLPC and add related H2G events
` [Intel-gfx] [PATCH 06/14] drm/i915/guc/slpc: Remove BUG_ON in guc_submission_disable
` [Intel-gfx] [PATCH 07/14] drm/i915/guc/slpc: Add methods to set min/max frequency
` [Intel-gfx] [PATCH 08/14] drm/i915/guc/slpc: Add get max/min freq hooks
` [Intel-gfx] [PATCH 09/14] drm/i915/guc/slpc: Add debugfs for SLPC info
` [Intel-gfx] [PATCH 10/14] drm/i915/guc/slpc: Enable ARAT timer interrupt
` [Intel-gfx] [PATCH 11/14] drm/i915/guc/slpc: Cache platform frequency limits
` [Intel-gfx] [PATCH 12/14] drm/i915/guc/slpc: Sysfs hooks for SLPC
` [Intel-gfx] [PATCH 13/14] drm/i915/guc/slpc: Add SLPC selftest
` [Intel-gfx] [PATCH 14/14] drm/i915/guc/rc: Setup and enable GuCRC feature
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc/slpc: Enable GuC based power management features (rev3)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH] drm/i915: Fix typo in comments and Kconfig.debug
2021-07-30 17:30 UTC (3+ messages)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for "
[Intel-gfx] [PATCH v4 00/18] Begin enabling Xe_HP SDV and DG2 platforms
2021-07-30 17:01 UTC (23+ messages)
` [Intel-gfx] [PATCH v4 01/18] drm/i915/xehp: handle new steering options
` [Intel-gfx] [PATCH v4 02/18] drm/i915/xehpsdv: Define steering tables
` [Intel-gfx] [PATCH v4 03/18] drm/i915/dg2: Add forcewake table
` [Intel-gfx] [PATCH v4 04/18] drm/i915/dg2: Update LNCF steering ranges
` [Intel-gfx] [PATCH v4 05/18] drm/i915/dg2: Add SQIDI steering
` [Intel-gfx] [PATCH v4 06/18] drm/i915/xehp: Loop over all gslices for INSTDONE processing
` [Intel-gfx] [PATCH v4 07/18] drm/i915/dg2: Report INSTDONE_GEOM values in error state
` [Intel-gfx] [PATCH v4 08/18] drm/i915/xehp: Changes to ss/eu definitions
` [Intel-gfx] [PATCH v4 09/18] drm/i915/xehpsdv: Add maximum sseu limits
` [Intel-gfx] [PATCH v4 10/18] drm/i915/xehpsdv: Add compute DSS type
` [Intel-gfx] [PATCH v4 11/18] drm/i915/dg2: DG2 uses the same sseu limits as XeHP SDV
` [Intel-gfx] [PATCH v4 12/18] drm/i915/xehpsdv: Define MOCS table for "
` [Intel-gfx] [PATCH v4 13/18] drm/i915/dg2: Define MOCS table for DG2
` [Intel-gfx] [PATCH v4 14/18] drm/i915/xehpsdv: factor out function to read RP_STATE_CAP
` [Intel-gfx] [PATCH v4 15/18] drm/i915/xehpsdv: Read correct RP_STATE_CAP register
` [Intel-gfx] [PATCH v4 16/18] drm/i915/dg2: Add new LRI reg offsets
` [Intel-gfx] [PATCH v4 17/18] drm/i915/dg2: Maintain backward-compatible nested batch behavior
` [Intel-gfx] [PATCH v4 18/18] drm/i915/dg2: Configure PCON in DP pre-enable path
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Begin enabling Xe_HP SDV and DG2 platforms (rev8)
[Intel-gfx] Requests For Proposals for hosting XDC 2022 are now open
2021-07-29 19:01 UTC (3+ messages)
` [Intel-gfx] [Mesa-dev] "
[Intel-gfx] [PATCH] drm/i915: Fix the 12 BPC bits for PIPE_MISC reg
2021-07-30 10:13 UTC (3+ messages)
[Intel-gfx] [PATCH 00/25] Remove CNL - for drm-intel-next
2021-07-30 10:04 UTC (8+ messages)
` [Intel-gfx] [PATCH 25/25] drm/i915: finish removal of CNL
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Remove CNL - for drm-intel-next (rev2)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Remove CNL - for drm-intel-next (rev3)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH CI 01/10] drm/i915/bios: Allow DSI ports to be parsed by parse_ddi_port()
2021-07-30 9:19 UTC (14+ messages)
` [Intel-gfx] [PATCH CI 02/10] drm/i915/bios: Start to support two integrated panels
` [Intel-gfx] [PATCH CI 03/10] drm/i915/bios: Enable parse of two integrated panels timing data
` [Intel-gfx] [PATCH CI 04/10] drm/i915/bios: Enable parse of two integrated panels backlight data
` [Intel-gfx] [PATCH CI 05/10] drm/i915/bios: Enable parse of two integrated panels eDP data
` [Intel-gfx] [PATCH CI 06/10] drm/i915/bios: Enable parse of two integrated panels PSR data
` [Intel-gfx] [PATCH CI 07/10] drm/i915/bios: Enable parse of two DSI panels data
` [Intel-gfx] [PATCH CI 08/10] drm/i915/bios: Nuke panel_type
` [Intel-gfx] [PATCH CI 09/10] drm/i915/bios: Only use opregion panel index for display ver 8 and older
` [Intel-gfx] [PATCH CI 10/10] drm/i915/display/tgl+: Use PPS index from vbt
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,01/10] drm/i915/bios: Allow DSI ports to be parsed by parse_ddi_port()
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 0/6] Forcewake and shadowed register updates
2021-07-30 8:36 UTC (10+ messages)
` [Intel-gfx] [PATCH 1/6] drm/i915: correct name of GT forcewake domain in error messages
` [Intel-gfx] [PATCH 2/6] drm/i915: Re-use gen11 forcewake read functions on gen12
` [Intel-gfx] [PATCH 6/6] drm/i915/xehp: Xe_HP shadowed registers are a strict superset of gen12
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Forcewake and shadowed register updates (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v4 00/14] drm/i915/guc/slpc: Enable GuC based power management features
2021-07-30 1:45 UTC (18+ messages)
` [Intel-gfx] [PATCH 01/14] drm/i915/guc/slpc: Initial definitions for SLPC
` [Intel-gfx] [PATCH 03/14] drm/i915/guc/slpc: Adding SLPC communication interfaces
` [Intel-gfx] [PATCH 05/14] drm/i915/guc/slpc: Enable SLPC and add related H2G events
` [Intel-gfx] [PATCH 07/14] drm/i915/guc/slpc: Add methods to set min/max frequency
` [Intel-gfx] [PATCH 11/14] drm/i915/guc/slpc: Cache platform frequency limits
` [Intel-gfx] [PATCH 12/14] drm/i915/guc/slpc: Sysfs hooks for SLPC
` [Intel-gfx] [PATCH 13/14] drm/i915/guc/slpc: Add SLPC selftest
[Intel-gfx] [PATCH 10/25] drm/i915/display: remove explicit CNL handling from intel_dpll_mgr.c
2021-07-29 23:39 UTC (2+ messages)
` [Intel-gfx] [PATCH v1.1 "
[Intel-gfx] [PATCH i-g-t 0/7] Updates for GuC & parallel submission
2021-07-29 23:35 UTC (4+ messages)
` [Intel-gfx] [PATCH i-g-t 6/7] i915/gem_scheduler: Make gem_scheduler understand static priority mapping
` [Intel-gfx] [igt-dev] "
[Intel-gfx] [PATCH 1/2] drm/i915/selftests: fixup igt_shrink_thp
2021-07-29 23:16 UTC (6+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i915: Use Transparent Hugepages when IOMMU is enabled
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/selftests: fixup igt_shrink_thp
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 3/6] drm/i915: Make shadow tables range-based
2021-07-29 21:59 UTC (4+ messages)
` [Intel-gfx] [PATCH v2 "
[Intel-gfx] [PULL] drm-misc-next
2021-07-29 20:57 UTC
[Intel-gfx] [PATCH 1/2] drm/i915/selftests: fixup igt_shrink_thp
2021-07-29 20:53 UTC (2+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] "
[Intel-gfx] [PATCH v6 00/15] drm/i915: Introduce Intel PXP
2021-07-29 20:45 UTC (7+ messages)
` [Intel-gfx] [PATCH v6 02/15] mei: pxp: export pavp client to me client bus
` [Intel-gfx] [PATCH v6 10/15] drm/i915/pxp: interfaces for using protected objects
[Intel-gfx] [PATCH v2] drm/i915/selftests: prefer the create_user helper
2021-07-29 19:17 UTC (2+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: prefer the create_user helper (rev2)
[Intel-gfx] [PATCH] drm/i915/dp: DPTX writes Swing/Pre-emphs(DPCD 0x103-0x106) requested during PHY Layer testing
2021-07-29 16:50 UTC (3+ messages)
` [Intel-gfx] [PATCH v2] "
[Intel-gfx] [PATCH 14/25] drm/i915/display: remove CNL ddi buf translation tables
2021-07-29 16:23 UTC (2+ messages)
` [Intel-gfx] [PATCH v1.1 "
[Intel-gfx] [PATCH v3 00/30] Begin enabling Xe_HP SDV and DG2 platforms
2021-07-29 15:14 UTC (7+ messages)
` [Intel-gfx] [PATCH v3 21/30] drm/i915/dg2: Report INSTDONE_GEOM values in error state
` [Intel-gfx] [PATCH v3 22/30] drm/i915/dg2: Define MOCS table for DG2
` [Intel-gfx] [PATCH v3 23/30] drm/i915/dg2: Add MPLLB programming for SNPS PHY
[Intel-gfx] [PATCH 0/3] drm, drm/vmwgfx: fixes and updates related to drm_master
2021-07-29 14:45 UTC (7+ messages)
` [Intel-gfx] [PATCH 1/3] drm: use the lookup lock in drm_is_current_master
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