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[Intel-gfx] [PATCH v6 00/15] drm/i915: Introduce Intel PXP
 2021-08-16 15:29 UTC  (10+ messages)
` [Intel-gfx] [PATCH v6 09/15] drm/i915/pxp: Implement PXP irq handler
` [Intel-gfx] [PATCH v6 10/15] drm/i915/pxp: interfaces for using protected objects

[Intel-gfx] [PATCH v2] drm: avoid races with modesetting rights
 2021-08-16 15:20 UTC  (11+ messages)
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH] drm/i915/adl_p: Allow underrun recovery when possible
 2021-08-16 15:04 UTC  (2+ messages)

[Intel-gfx] [PATCH 00/22] Clean up GuC CI failures, simplify locking, and kernel DOC
 2021-08-16 13:51 UTC  (23+ messages)
` [Intel-gfx] [PATCH 01/22] drm/i915/guc: Fix blocked context accounting
` [Intel-gfx] [PATCH 02/22] drm/i915/guc: Fix outstanding G2H accounting
` [Intel-gfx] [PATCH 03/22] drm/i915/guc: Unwind context requests in reverse order
` [Intel-gfx] [PATCH 04/22] drm/i915/guc: Don't drop ce->guc_active.lock when unwinding context
` [Intel-gfx] [PATCH 05/22] drm/i915/guc: Workaround reset G2H is received after schedule done G2H
` [Intel-gfx] [PATCH 06/22] drm/i915/execlists: Do not propagate errors to dependent fences
` [Intel-gfx] [PATCH 07/22] drm/i915/selftests: Add a cancel request selftest that triggers a reset
` [Intel-gfx] [PATCH 08/22] drm/i915/guc: Don't enable scheduling on a banned context, guc_id invalid, not registered
` [Intel-gfx] [PATCH 09/22] drm/i915/selftests: Fix memory corruption in live_lrc_isolation
` [Intel-gfx] [PATCH 10/22] drm/i915/selftests: Add initial GuC selftest for scrubbing lost G2H
` [Intel-gfx] [PATCH 11/22] drm/i915/guc: Take context ref when cancelling request
` [Intel-gfx] [PATCH 12/22] drm/i915/guc: Don't touch guc_state.sched_state without a lock
` [Intel-gfx] [PATCH 13/22] drm/i915/guc: Reset LRC descriptor if register returns -ENODEV
` [Intel-gfx] [PATCH 14/22] drm/i915: Allocate error capture in atomic context
` [Intel-gfx] [PATCH 15/22] drm/i915/guc: Flush G2H work queue during reset
` [Intel-gfx] [PATCH 16/22] drm/i915/guc: Release submit fence from an IRQ
` [Intel-gfx] [PATCH 17/22] drm/i915/guc: Move guc_blocked fence to struct guc_state
` [Intel-gfx] [PATCH 18/22] drm/i915/guc: Rework and simplify locking
` [Intel-gfx] [PATCH 19/22] drm/i915/guc: Proper xarray usage for contexts_lookup
` [Intel-gfx] [PATCH 20/22] drm/i915/guc: Drop pin count check trick between sched_disable and re-pin
` [Intel-gfx] [PATCH 21/22] drm/i915/guc: Move GuC priority fields in context under guc_active
` [Intel-gfx] [PATCH 22/22] drm/i915/guc: Add GuC kernel doc

[Intel-gfx] [PATCH] drm/i915: Ditch the i915_gem_ww_ctx loop member
 2021-08-16 13:49 UTC  (8+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH V2] drm/i915/adl_s: Update ADL-S PCI IDs
 2021-08-16 13:27 UTC 

[Intel-gfx] [PATCH 5.13 033/151] drm/i915/display: Fix the 12 BPC bits for PIPE_MISC reg
 2021-08-16 13:01 UTC 

[Intel-gfx] [PATCH] drm/i915/selftest: Fix use of err in igt_reset_{fail, nop}_engine()
 2021-08-16 12:55 UTC  (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH] drm/i915/dp: remove superfluous EXPORT_SYMBOL()
 2021-08-16 12:29 UTC  (5+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH] drm/i915/display: Drop redundant debug print
 2021-08-16 12:28 UTC  (6+ messages)

[Intel-gfx] [v3][PATCH] drm/i915/display: Drop redundant debug print
 2021-08-16 12:01 UTC  (4+ messages)

[Intel-gfx] [PATCH v2 0/6] Infoframe changes for DP-HDMI2.1 PCON
 2021-08-16 10:48 UTC  (4+ messages)
` [Intel-gfx] [PATCH v2 1/6] drm/i915: Export intel_hdmi_compute_avi_infoframe()

[Intel-gfx] [PATCH 01/10] drm/i915/bios: Allow DSI ports to be parsed by parse_ddi_port()
 2021-08-16 10:09 UTC  (4+ messages)
` [Intel-gfx] [PATCH 02/10] drm/i915/bios: Start to support two integrated panels

[Intel-gfx] [PATCH V2 0/5] drm/i915/gt: Initialize unused MOCS entries to L3_WB
 2021-08-16  7:09 UTC  (9+ messages)
` [Intel-gfx] [PATCH V2 1/5] drm/i915/gt: Add support of mocs propagation
` [Intel-gfx] [PATCH V2 2/5] drm/i915/gt: Use cmd_cctl override for platforms >= gen12
` [Intel-gfx] [PATCH V2 3/5] drm/i915/gt: Set BLIT_CCTL reg to un-cached
` [Intel-gfx] [PATCH V2 4/5] drm/i915/gt: Initialize unused MOCS entries with device specific values
` [Intel-gfx] [PATCH V2 5/5] drm/i95/adl: Define MOCS table for Alderlake
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gt: Initialize unused MOCS entries to L3_WB
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] Support Intel HD Graphics in Mipad 2
 2021-08-16  6:50 UTC 

[Intel-gfx] i915 timeouts delaying boot under GVT
 2021-08-16  6:21 UTC  (3+ messages)

[Intel-gfx] [PATCH 00/21] Clean up GuC CI failures, simplify locking, and kernel DOC
 2021-08-15 21:54 UTC  (26+ messages)
` [Intel-gfx] [PATCH 01/21] drm/i915/guc: Fix blocked context accounting
` [Intel-gfx] [PATCH 02/21] drm/i915/guc: outstanding G2H accounting
` [Intel-gfx] [PATCH 03/21] drm/i915/guc: Unwind context requests in reverse order
` [Intel-gfx] [PATCH 04/21] drm/i915/guc: Don't drop ce->guc_active.lock when unwinding context
` [Intel-gfx] [PATCH 05/21] drm/i915/guc: Workaround reset G2H is received after schedule done G2H
` [Intel-gfx] [PATCH 06/21] drm/i915/selftests: Add a cancel request selftest that triggers a reset
` [Intel-gfx] [PATCH 07/21] drm/i915/guc: Don't enable scheduling on a banned context, guc_id invalid, not registered
` [Intel-gfx] [PATCH 08/21] drm/i915/selftests: Fix memory corruption in live_lrc_isolation
` [Intel-gfx] [PATCH 09/21] drm/i915/selftests: Add initial GuC selftest for scrubbing lost G2H
` [Intel-gfx] [PATCH 10/21] drm/i915/guc: Take context ref when cancelling request
` [Intel-gfx] [PATCH 11/21] drm/i915/guc: Don't touch guc_state.sched_state without a lock
` [Intel-gfx] [PATCH 12/21] drm/i915/guc: Reset LRC descriptor if register returns -ENODEV
` [Intel-gfx] [PATCH 13/21] drm/i915: Allocate error capture in atomic context
` [Intel-gfx] [PATCH 14/21] drm/i915/guc: Flush G2H work queue during reset
` [Intel-gfx] [PATCH 15/21] drm/i915/guc: Release submit fence from an IRQ
` [Intel-gfx] [PATCH 16/21] drm/i915/guc: Move guc_blocked fence to struct guc_state
` [Intel-gfx] [PATCH 17/21] drm/i915/guc: Rework and simplify locking
` [Intel-gfx] [PATCH 18/21] drm/i915/guc: Proper xarray usage for contexts_lookup
` [Intel-gfx] [PATCH 19/21] drm/i915/guc: Drop pin count check trick between sched_disable and re-pin
` [Intel-gfx] [PATCH 20/21] drm/i915/guc: Move GuC priority fields in context under guc_active
` [Intel-gfx] [PATCH 21/21] drm/i915/guc: Add GuC kernel doc
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Clean up GuC CI failures, simplify locking, and kernel DOC
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "

[Intel-gfx] Patch "drm/i915/display: Fix the 12 BPC bits for PIPE_MISC reg" has been added to the 5.10-stable tree
 2021-08-15 13:22 UTC  (2+ messages)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for "

[Intel-gfx] Patch "drm/i915/display: Fix the 12 BPC bits for PIPE_MISC reg" has been added to the 5.13-stable tree
 2021-08-15 12:54 UTC 

[Intel-gfx] [PATCH 0/2] drm: update the ioctl handler
 2021-08-15  7:10 UTC  (9+ messages)
` [Intel-gfx] [PATCH 1/2] drm: avoid races with modesetting rights
` [Intel-gfx] [PATCH 2/2] drm: unexport drm_ioctl_permit
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm: update the ioctl handler
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH CI 1/2] drm/i915/display: Fix sel fetch plane offset calculation
 2021-08-15  3:37 UTC  (4+ messages)
` [Intel-gfx] [PATCH CI 2/2] drm/i915: Nuke ORIGIN_GTT
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/2] drm/i915/display: Fix sel fetch plane offset calculation
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH 1/3] drm/i915/display/skl+: Drop frontbuffer rendering support
 2021-08-15  2:51 UTC  (6+ messages)
` [Intel-gfx] [PATCH 2/3] drm/i915/display: Drop PSR support from HSW and BDW
` [Intel-gfx] [PATCH 3/3] drm/i915/psr: Drop frontbuffer rendering support
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915/display/skl+: "
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "

[Intel-gfx] SR-IOV development status
 2021-08-14 18:46 UTC 

[Intel-gfx] [BUG - BISECTED] display not detected anymore
 2021-08-14 12:46 UTC 

[Intel-gfx] [PATCH 01/11] drm/i915: Release i915_gem_context from a worker
 2021-08-14 12:38 UTC  (20+ messages)
` [Intel-gfx] [PATCH 02/11] drm/i915: Release ctx->syncobj on final put, not on ctx close
` [Intel-gfx] [PATCH 03/11] drm/i915: Keep gem ctx->vm alive until the final put
` [Intel-gfx] [PATCH 04/11] drm/i915: Drop code to handle set-vm races from execbuf
` [Intel-gfx] [PATCH 05/11] drm/i915: Rename i915_gem_context_get_vm_rcu to i915_gem_context_get_eb_vm
` [Intel-gfx] [PATCH 06/11] drm/i915: Use i915_gem_context_get_eb_vm in ctx_getparam
` [Intel-gfx] [PATCH 07/11] drm/i915: Add i915_gem_context_is_full_ppgtt
` [Intel-gfx] [PATCH 08/11] drm/i915: Use i915_gem_context_get_eb_vm in intel_context_set_gem
` [Intel-gfx] [PATCH 09/11] drm/i915: Drop __rcu from gem_context->vm
` [Intel-gfx] [PATCH 10/11] drm/i915: use xa_lock/unlock for fpriv->vm_xa lookups
` [Intel-gfx] [PATCH 11/11] drm/i915: Stop rcu support for i915_address_space
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/11] drm/i915: Release i915_gem_context from a worker
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
` [Intel-gfx] [PATCH] "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with drm/i915: Release i915_gem_context from a worker (rev2)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH v5 00/20] drm/sched dependency handling and implicit sync fixes
 2021-08-14  2:45 UTC  (4+ messages)
` [Intel-gfx] [PATCH v5 08/20] drm/lima: use scheduler dependency tracking

[Intel-gfx] [PATCH i-g-t 0/3] IGT fixes for priority management + capture with GuC submission
 2021-08-14  0:28 UTC  (5+ messages)
` [Intel-gfx] [PATCH i-g-t 1/3] i915/gem_exec_schedule: Make gem_exec_schedule understand static priority mapping
` [Intel-gfx] [PATCH i-g-t 3/3] i915/gem_exec_capture: Update to support GuC based resets

[Intel-gfx] [PATCH v5 0/9] dyndbg: add DEFINE_DYNAMIC_DEBUG_CATEGORIES and use in DRM
 2021-08-13 21:07 UTC  (17+ messages)
` [Intel-gfx] [PATCH v5 1/9] drm/print: fixup spelling in a comment
` [Intel-gfx] [PATCH v5 2/9] moduleparam: add data member to struct kernel_param
` [Intel-gfx] [PATCH v5 3/9] dyndbg: add DEFINE_DYNAMIC_DEBUG_CATEGORIES and callbacks
` [Intel-gfx] [PATCH v5 4/9] i915/gvt: remove spaces in pr_debug "gvt: core:" etc prefixes
` [Intel-gfx] [PATCH v5 5/9] i915/gvt: use DEFINE_DYNAMIC_DEBUG_CATEGORIES to create "gvt:core:" etc categories
` [Intel-gfx] [PATCH v5 6/9] amdgpu: use DEFINE_DYNAMIC_DEBUG_CATEGORIES to control categorized pr_debugs
` [Intel-gfx] [PATCH v5 7/9] drm_print: add choice to use dynamic debug in drm-debug
` [Intel-gfx] [PATCH v5 8/9] amdgpu_ucode: reduce number of pr_debug calls
` [Intel-gfx] [PATCH v5 9/9] dyndbg: RFC add tracer facility RFC
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for dyndbg: add DEFINE_DYNAMIC_DEBUG_CATEGORIES and use in DRM
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH v2 0/2] drm/i915, drm/ttm: Update the ttm_move_memcpy() interface
 2021-08-13 20:28 UTC  (5+ messages)
` [Intel-gfx] [PATCH v2 1/2] drm/i915/ttm: Reorganize the ttm move code somewhat
` [Intel-gfx] [PATCH v2 2/2] drm/ttm, drm/i915: Update ttm_move_memcpy for async use
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915, drm/ttm: Update the ttm_move_memcpy() interface (rev3)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH 1/3] drm/i915/dp: pass crtc_state to intel_ddi_dp_level()
 2021-08-13 19:59 UTC  (11+ messages)
` [Intel-gfx] [PATCH 2/3] drm/i915/dg2: use existing mechanisms for SNPS PHY translations
` [Intel-gfx] [PATCH 3/3] drm/i915/dg2: add SNPS PHY translations for UHBR link rates
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915/dp: pass crtc_state to intel_ddi_dp_level()
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH] drm/i915/mst: use intel_de_rmw() to simplify VC payload alloc set/clear
 2021-08-13 19:30 UTC  (6+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH] drm/i915/edp: fix eDP MSO pipe sanity checks for ADL-P
 2021-08-13 19:27 UTC  (3+ messages)

[Intel-gfx] [PATCH] drm/i915/dg2: DG2 intermediate DP source rates are different from CNL+
 2021-08-13 18:56 UTC  (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [bug report] drm/i915/gem: Correct the locking and pin pattern for dma-buf (v8)
 2021-08-13 17:13 UTC  (2+ messages)

[Intel-gfx] [PATCH] drm/i915/gt: Potential error pointer dereference in pinned_context()
 2021-08-13 16:01 UTC  (3+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for "

[Intel-gfx] [PATCH 0/4] drm/dp: add some defines and prep for DP 2.0
 2021-08-13 15:14 UTC  (2+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for "

[Intel-gfx] [PATCH] fbdev/efifb: Release PCI device's runtime PM ref during FB destroy
 2021-08-13 13:46 UTC  (3+ messages)
` [Intel-gfx] [PATCH v2] "

[Intel-gfx] Requests For Proposals for hosting XDC 2022 are now open
 2021-08-13  6:41 UTC  (4+ messages)
` [Intel-gfx] [Mesa-dev] "

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