messages from 2021-08-21 00:26:09 to 2021-08-24 19:41:04 UTC [more...]
[Intel-gfx] [v4 0/7] MIPI DSI driver enhancements
2021-08-24 19:41 UTC (17+ messages)
` [Intel-gfx] [v4 2/7] drm/i915/jsl: program DSI panel GPIOs
` [Intel-gfx] [v4 4/7] drm/i915/dsi: refine send MIPI DCS command sequence
` [Intel-gfx] [v4 5/7] drm/i915: Get proper min cdclk if vDSC enabled
` [Intel-gfx] [v4 6/7] drm/i915/dsi: Retrieve max brightness level from VBT
` [Intel-gfx] [PATCH] "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for MIPI DSI driver enhancements (rev8)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [PATCH rdma-next v4 0/3] SG fix together with update to RDMA umem
2021-08-24 19:40 UTC (6+ messages)
` [Intel-gfx] [PATCH rdma-next v4 1/3] lib/scatterlist: Provide a dedicated function to support table append
` [Intel-gfx] [PATCH rdma-next v4 2/3] lib/scatterlist: Fix wrong update of orig_nents
` [Intel-gfx] [PATCH rdma-next v4 3/3] RDMA: Use the sg_table directly and remove the opencoded version from umem
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for SG fix together with update to RDMA umem (rev4)
[Intel-gfx] [PATCH 0/6] drm/i915/display: split out some dpt and fb stuff from intel_display.c
2021-08-24 18:03 UTC (14+ messages)
` [Intel-gfx] [PATCH 1/6] drm/i915/display: split out dpt out of intel_display.c
` [Intel-gfx] [PATCH 2/6] drm/i915: add HAS_ASYNC_FLIPS feature macro
` [Intel-gfx] [PATCH 3/6] drm/i915/fb: move intel_tile_width_bytes() to intel_fb.c
` [Intel-gfx] [PATCH 4/6] drm/i915/fb: move intel_fb_align_height() "
` [Intel-gfx] [PATCH 5/6] drm/i915/fb: move intel_surf_alignment() "
` [Intel-gfx] [PATCH 6/6] drm/i915/fb: move user framebuffer stuff "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/display: split out some dpt and fb stuff from intel_display.c
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 0/7] drm/i915/bios: remove vbt ddi_port_info caching
2021-08-24 17:06 UTC (10+ messages)
` [Intel-gfx] [PATCH 1/7] drm/i915/bios: use hdmi level shift directly from child data
` [Intel-gfx] [PATCH 2/7] drm/i915/bios: use max tmds clock "
` [Intel-gfx] [PATCH 3/7] drm/i915/bios: use dp max link rate "
` [Intel-gfx] [PATCH 4/7] drm/i915/bios: use alternate aux channel "
` [Intel-gfx] [PATCH 5/7] drm/i915/bios: move ddc pin mapping code next to ddc pin sanitize
` [Intel-gfx] [PATCH 6/7] drm/i915/bios: use ddc pin directly from child data
` [Intel-gfx] [PATCH 7/7] drm/i915/bios: get rid of vbt ddi_port_info
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/bios: remove vbt ddi_port_info caching
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [GIT PULL] drm-misc + drm-intel: Add support for out-of-band hotplug notification
2021-08-24 16:48 UTC (3+ messages)
[Intel-gfx] [PATCH] drm/i915/fdi: make intel_fdi_link_freq() return int
2021-08-24 16:27 UTC (5+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 00/27] Clean up GuC CI failures, simplify locking, and kernel DOC
2021-08-24 15:44 UTC (9+ messages)
` [Intel-gfx] [PATCH 13/27] drm/i915/guc: Take context ref when cancelling request
` [Intel-gfx] [PATCH 17/27] drm/i915/guc: Flush G2H work queue during reset
` [Intel-gfx] [PATCH 19/27] drm/i915/guc: Move guc_blocked fence to struct guc_state
[Intel-gfx] [PATCH 1/2] drm/i915/runtime_pm: Consolidate runtime_pm functions
2021-08-24 15:44 UTC (2+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i915/runtime_pm: Let's avoid the undocumented D1 opregion notification
[Intel-gfx] [PATCH v15 00/12] Restricted DMA
2021-08-24 14:26 UTC (3+ messages)
` [Intel-gfx] [PATCH v15 10/12] swiotlb: Add restricted DMA pool initialization
[Intel-gfx] [PATCH] drm/i915/selftest: Fix use of err in igt_reset_{fail, nop}_engine()
2021-08-24 9:52 UTC (3+ messages)
[Intel-gfx] [PATCH] drm/i915: switch from 'pci_' to 'dma_' API
2021-08-24 10:04 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [RFC 0/8] Per client GPU stats
2021-08-24 9:34 UTC (17+ messages)
` [Intel-gfx] [RFC 1/8] drm/i915: Explicitly track DRM clients
` [Intel-gfx] [RFC 2/8] drm/i915: Make GEM contexts "
` [Intel-gfx] [RFC 3/8] drm/i915: Track runtime spent in closed and unreachable GEM contexts
` [Intel-gfx] [RFC 4/8] drm/i915: Track all user contexts per client
` [Intel-gfx] [RFC 5/8] drm/i915: Track context current active time
` [Intel-gfx] [RFC 6/8] drm: Document fdinfo format specification
` [Intel-gfx] [RFC 7/8] drm/i915: Expose client engine utilisation via fdinfo
` [Intel-gfx] [RFC 8/8] drm/amdgpu: Convert to common fdinfo format
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Per client GPU stats (rev3)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 0/8] Drop frontbuffer rendering support from Skylake and newer
2021-08-24 7:21 UTC (3+ messages)
` [Intel-gfx] [PATCH 7/8] drm/i915/display/skl+: Drop frontbuffer rendering support
[Intel-gfx] [PATCH v5 0/9] Begin enabling Xe_HP SDV and DG2 platforms
2021-08-24 4:06 UTC (4+ messages)
` [Intel-gfx] [PATCH v5 8/9] drm/i915/dg2: Maintain backward-compatible nested batch behavior
[Intel-gfx] [PATCH V2 0/5] drm/i915/gt: Initialize unused MOCS entries to L3_WB
2021-08-23 21:38 UTC (5+ messages)
` [Intel-gfx] [PATCH V2 2/5] drm/i915/gt: Use cmd_cctl override for platforms >= gen12
[Intel-gfx] [PATCH] drm/i915/guc: drop guc_communication_enabled
2021-08-23 20:32 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v2 00/19] drm/i915/dp: dp 2.0 enabling prep work
2021-08-23 19:32 UTC (24+ messages)
` [Intel-gfx] [PATCH v2 01/19] drm/dp: add DP 2.0 UHBR link rate and bw code conversions
` [Intel-gfx] [PATCH v2 02/19] drm/dp: use more of the extended receiver cap
` [Intel-gfx] [PATCH v2 03/19] drm/dp: add LTTPR DP 2.0 DPCD addresses
` [Intel-gfx] [PATCH v2 04/19] drm/dp: add helper for extracting adjust 128b/132b TX FFE preset
` [Intel-gfx] [PATCH v2 05/19] drm/i915/dp: use actual link rate values in struct link_config_limits
` [Intel-gfx] [PATCH v2 06/19] drm/i915/dp: read sink UHBR rates
` [Intel-gfx] [PATCH v2 07/19] drm/i915/dg2: add TRANS_DP2_CTL register definition
` [Intel-gfx] [PATCH v2 08/19] drm/i915/dg2: add DG2+ TRANS_DDI_FUNC_CTL DP 2.0 128b/132b mode
` [Intel-gfx] [PATCH v2 09/19] drm/i915/dg2: add TRANS_DP2_VFREQHIGH and TRANS_DP2_VFREQLOW
` [Intel-gfx] [PATCH v2 10/19] drm/i915/dg2: add DG2 UHBR source rates
` [Intel-gfx] [PATCH v2 11/19] drm/i915/dp: add max data rate calculation for UHBR rates
` [Intel-gfx] [PATCH v2 12/19] drm/i915/dp: add helper for checking for UHBR link rate
` [Intel-gfx] [PATCH v2 13/19] drm/i915/dp: use 128b/132b TPS2 for UHBR+ link rates
` [Intel-gfx] [PATCH v2 14/19] drm/i915/dp: select 128b/132b channel encoding for UHBR rates
` [Intel-gfx] [PATCH v2 15/19] drm/i915/dg2: configure TRANS_DP2_CTL for DP 2.0
` [Intel-gfx] [PATCH v2 16/19] drm/i915/dp: add HAS_DP20 macro
` [Intel-gfx] [PATCH v2 17/19] drm/i915/dg2: use 128b/132b transcoder DDI mode
` [Intel-gfx] [PATCH v2 18/19] drm/i915/dg2: configure TRANS_DP2_VFREQ{HIGH, LOW} for 128b/132b
` [Intel-gfx] [PATCH v2 19/19] drm/i915/dg2: update link training "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dp: dp 2.0 enabling prep work (rev2)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v6 00/11] use DYNAMIC_DEBUG to implement DRM.debug
2021-08-23 18:36 UTC (15+ messages)
` [Intel-gfx] [PATCH v6 01/11] moduleparam: add data member to struct kernel_param
` [Intel-gfx] [PATCH v6 02/11] dyndbg: add DEFINE_DYNAMIC_DEBUG_CATEGORIES and callbacks
` [Intel-gfx] [PATCH v6 03/11] i915/gvt: remove spaces in pr_debug "gvt: core:" etc prefixes
` [Intel-gfx] [PATCH v6 04/11] i915/gvt: use DEFINE_DYNAMIC_DEBUG_CATEGORIES to create "gvt:core:" etc categories
` [Intel-gfx] [PATCH v6 05/11] amdgpu: use DEFINE_DYNAMIC_DEBUG_CATEGORIES to control categorized pr_debugs
` [Intel-gfx] [PATCH v6 06/11] drm_print: add choice to use dynamic debug in drm-debug
` [Intel-gfx] [PATCH v6 07/11] drm_print: instrument drm_debug_enabled
` [Intel-gfx] [PATCH v6 08/11] amdgpu_ucode: reduce number of pr_debug calls
` [Intel-gfx] [PATCH v6 09/11] nouveau: fold multiple DRM_DEBUG_DRIVERs together
` [Intel-gfx] [PATCH v6 10/11] dyndbg: RFC add debug-trace callback, selftest with it. RFC
` [Intel-gfx] [PATCH v6 11/11] dyndbg: RFC add print-once and print-ratelimited features. RFC
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for use DYNAMIC_DEBUG to implement DRM.debug
[Intel-gfx] [PATCH v5 0/6] drm: update locking for modesetting
2021-08-23 18:25 UTC (9+ messages)
` [Intel-gfx] [PATCH v5 1/6] drm: fix null ptr dereference in drm_master_release
` [Intel-gfx] [PATCH v5 2/6] drm: convert drm_device.master_mutex into a rwsem
` [Intel-gfx] [PATCH v5 3/6] drm: lock drm_global_mutex earlier in the ioctl handler
` [Intel-gfx] [PATCH v5 4/6] drm: avoid races with modesetting rights
` [Intel-gfx] [PATCH v5 5/6] drm: avoid circular locks with modeset_mutex and master_rwsem
` [Intel-gfx] [PATCH v5 6/6] drm: remove drm_file.master_lookup_lock
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm: update locking for modesetting (rev2)
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [PATCH 0/8] drm/i915/fbc: Rework CFB stride/size calculations
2021-08-23 17:52 UTC (3+ messages)
` [Intel-gfx] [PATCH 8/8] drm/i915/fbc: Allow higher compression limits on FBC1
[Intel-gfx] [PATCH] drm/amdgpu: switch from 'pci_' to 'dma_' API
2021-08-23 17:51 UTC (5+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v2 01/11] drm/i915: Check for nomodeset in i915_init() first
2021-08-23 16:15 UTC (4+ messages)
` [Intel-gfx] [PATCH v2 11/11] drm/i915: Extract i915_module.c
[Intel-gfx] [PATCH v2 0/2] drm/i915, drm/ttm: Update the ttm_move_memcpy() interface
2021-08-23 15:38 UTC (7+ messages)
` [Intel-gfx] [PATCH v2 2/2] drm/ttm, drm/i915: Update ttm_move_memcpy for async use
` [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915, drm/ttm: Update the ttm_move_memcpy() interface (rev3)
` [Intel-gfx] ✓ Fi.CI.IGT: success "
[Intel-gfx] [PATCH V3] drm/i915/adl_s: Update ADL-S PCI IDs
2021-08-23 15:24 UTC (5+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/adl_s: Update ADL-S PCI IDs (rev4)
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH] drm/i915/dp: return proper DPRX link training result
2021-08-23 15:13 UTC (8+ messages)
[Intel-gfx] [PATCH rdma-next v3 0/3] SG fix together with update to RDMA umem
2021-08-23 13:54 UTC (6+ messages)
` [Intel-gfx] [PATCH rdma-next v3 2/3] lib/scatterlist: Fix wrong update of orig_nents
[Intel-gfx] [PATCH 0/5] Fix in max source calculation for dp/edp
2021-08-23 8:09 UTC (4+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Fix in max source calculation for dp/edp (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v6 14/15] drm/i915/pxp: black pixels on pxp disabled
2021-08-23 7:56 UTC (3+ messages)
[Intel-gfx] [PATCH v6 13/15] drm/i915/pxp: Add plane decryption support
2021-08-23 7:50 UTC (3+ messages)
[Intel-gfx] [PATCH 0/2] Enable mipi dsi on XELPD
2021-08-23 7:47 UTC (11+ messages)
` [Intel-gfx] [PATCH 1/2] drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup guardband
` [Intel-gfx] [v2] "
` [Intel-gfx] [PATCH 2/2] drm/i915/dsi/xelpd: Enable mipi dsi support
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Enable mipi dsi on XELPD
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable mipi dsi on XELPD (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 00/53] Begin enabling Xe_HP SDV and DG2 platforms
2021-08-23 5:42 UTC (4+ messages)
` [Intel-gfx] [PATCH 50/53] drm/i915/display/dsc: Add Per connector debugfs node for DSC BPP enable
[Intel-gfx] [RFC 00/13] drm/i915/lmem: Enable device memory support for DG2
2021-08-22 18:28 UTC (18+ messages)
` [Intel-gfx] [RFC 01/13] drm/i915: Add has_64k_pages flag
` [Intel-gfx] [RFC 02/13] drm/i915/xehpsdv: set min page-size to 64K
` [Intel-gfx] [RFC 03/13] drm/i915/xehpsdv: enforce min GTT alignment
` [Intel-gfx] [RFC 04/13] drm/i915/gem: Remove unused i915_gem_lmem_obj_ops
` [Intel-gfx] [RFC 05/13] drm/i915: enforce min page size for scratch
` [Intel-gfx] [RFC 06/13] drm/i915/gtt/xehpsdv: move scratch page to system memory
` [Intel-gfx] [RFC 07/13] drm/i915/xehpsdv: support 64K GTT pages
` [Intel-gfx] [RFC 08/13] drm/i915: Add vm min alignment support
` [Intel-gfx] [RFC 09/13] drm/i915/selftests: account for min_alignment in GTT selftests
` [Intel-gfx] [RFC 10/13] drm/i915/xehpsdv: implement memory coloring
` [Intel-gfx] [RFC 11/13] drm/i915/xehpsdv: Add has_flat_ccs to device info
` [Intel-gfx] [RFC 12/13] drm/i915/lmem: Enable lmem for platforms with Flat CCS
` [Intel-gfx] [RFC 13/13] drm/i915/gt: Clear compress metadata for Gen12.5 >= platforms
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/lmem: Enable device memory support for DG2
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 15/27] drm/i915/guc: Implement multi-lrc submission
2021-08-22 2:18 UTC (3+ messages)
[Intel-gfx] [PATCH 24/27] drm/i915: Multi-BB execbuf
2021-08-21 19:01 UTC (2+ messages)
[Intel-gfx] [CI 0/4] drm/i915/guc: Improve CTB error handling
2021-08-21 11:51 UTC (6+ messages)
` [Intel-gfx] [CI 1/4] drm/i915/guc: Verify result from CTB (de)register action
` [Intel-gfx] [CI 2/4] drm/i915/guc: Print error name on CTB (de)registration failure
` [Intel-gfx] [CI 3/4] drm/i915/guc: Print error name on CTB send failure
` [Intel-gfx] [CI 4/4] drm/i915/guc: Move and improve error message for missed CTB reply
` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/guc: Improve CTB error handling (rev2)
[Intel-gfx] [PATCH] drm/i915/dg2: Memory latency values from pcode must be doubled
2021-08-21 1:56 UTC (2+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for "
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