messages from 2021-08-30 12:10:11 to 2021-09-01 16:26:39 UTC [more...]
[Intel-gfx] [PATCH 0/5] Fix in max source calculation for dp/edp
2021-09-01 16:03 UTC (2+ messages)
` [Intel-gfx] [PATCH 1/5] drm/i915/dp: Fix eDP max rate for display 11+
[Intel-gfx] [PATCH 0/5] drm/i915/display: debugfs cleanups
2021-09-01 16:20 UTC (18+ messages)
` [Intel-gfx] [PATCH 1/5] drm/i915/debugfs: clean up LPSP status
` [Intel-gfx] [PATCH 2/5] drm/i915/debugfs: clean up LPSP capable
` [Intel-gfx] [PATCH 3/5] drm/i915/debugfs: register LPSP capability on all platforms
` [Intel-gfx] [PATCH 4/5] drm/i915/display: stop returning errors from debugfs registration
` [Intel-gfx] [PATCH 5/5] drm/i915/debugfs: pass intel_connector to intel_connector_debugfs_add()
` [Intel-gfx] [PATCH v2] "
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/display: debugfs cleanups
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: debugfs cleanups (rev2)
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 0/7] [CI] Enable GuC submission by default on DG1
2021-09-01 16:12 UTC (11+ messages)
` [Intel-gfx] [PATCH 1/7] drm/i915: Do not define vma on stack
` [Intel-gfx] [PATCH 2/7] drm/i915/guc: put all guc objects in lmem when available
` [Intel-gfx] [PATCH 3/7] drm/i915/guc: Add DG1 GuC / HuC firmware defs
` [Intel-gfx] [PATCH 4/7] drm/i915/guc: Enable GuC submission by default on DG1
` [Intel-gfx] [PATCH 5/7] Me: Allow relocs on DG1 for CI
` [Intel-gfx] [PATCH 6/7] Me: Workaround LMEM blow up
` [Intel-gfx] [PATCH 7/7] Me: Dump GuC log to dmesg on SLPC load failure
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable GuC submission by default on DG1 (rev2)
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [PATCH v2 0/7] drm/i915/bios: remove vbt ddi_port_info caching
2021-09-01 16:10 UTC (8+ messages)
` [Intel-gfx] [PATCH v2 1/7] drm/i915/bios: use hdmi level shift directly from child data
` [Intel-gfx] [PATCH v2 2/7] drm/i915/bios: use max tmds clock "
` [Intel-gfx] [PATCH v2 3/7] drm/i915/bios: use dp max link rate "
` [Intel-gfx] [PATCH v2 4/7] drm/i915/bios: use alternate aux channel "
` [Intel-gfx] [PATCH v2 5/7] drm/i915/bios: move ddc pin mapping code next to ddc pin sanitize
` [Intel-gfx] [PATCH v2 6/7] drm/i915/bios: use ddc pin directly from child data
` [Intel-gfx] [PATCH v2 7/7] drm/i915/bios: get rid of vbt ddi_port_info
[Intel-gfx] [PATCH v7 00/17] drm/i915: Introduce Intel PXP
2021-09-01 16:06 UTC (14+ messages)
` [Intel-gfx] [PATCH v7 02/17] mei: pxp: export pavp client to me client bus
` [Intel-gfx] [PATCH v7 05/17] drm/i915/pxp: Implement funcs to create the TEE channel
` [Intel-gfx] [PATCH v7 10/17] drm/i915/pxp: interfaces for using protected objects
` [Intel-gfx] [PATCH v7 13/17] drm/i915/pxp: Add plane decryption support
` [Intel-gfx] [PATCH v7 14/17] drm/i915/pxp: black pixels on pxp disabled
[Intel-gfx] [PATCH 0/5] DSI driver improvement
2021-09-01 15:32 UTC (11+ messages)
` [Intel-gfx] [PATCH 1/5] drm/i915/dsi: wait for header and payload credit available
` [Intel-gfx] [PATCH 2/5] drm/i915/dsi: refine send MIPI DCS command sequence
` [Intel-gfx] [PATCH 3/5] drm/i915: Get proper min cdclk if vDSC enabled
` [Intel-gfx] [PATCH 4/5] drm/i915/dsi: Retrieve max brightness level from VBT
` [Intel-gfx] [PATCH 5/5] drm/i915/dsi: Read/write proper brightness value via MIPI DCS command
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for DSI driver improvement
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH] drm/i915: Flush buffer pools on driver remove
2021-09-01 15:22 UTC
[Intel-gfx] [PATCH] drm/i915: Mark GPU wedging on driver unregister unrecoverable
2021-09-01 15:14 UTC
[Intel-gfx] [PATCH] drm/i915/dp: fix DG2 max source rate check
2021-09-01 14:53 UTC (3+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for "
[Intel-gfx] [PATCH V4] drm/i915/gen11: Disable cursor clock gating in HDR mode
2021-09-01 13:48 UTC (2+ messages)
[Intel-gfx] [PATCH v2] drm/i915/gem: Fix the mman selftest
2021-09-01 12:12 UTC (10+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gem: Fix the mman selftest (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
` [Intel-gfx] ✓ Fi.CI.IGT: success "
[Intel-gfx] [PATCH v3 0/2] GPD Win Max display fixes
2021-09-01 12:06 UTC (7+ messages)
` [Intel-gfx] [PATCH v3 1/2] drm/i915/opregion: add support for mailbox #5 EDID
[Intel-gfx] [PATCH 0/5] Fix in max source calculation for dp/edp
2021-09-01 11:20 UTC (2+ messages)
[Intel-gfx] [PATCH 0/8] drm/i915: Migrate memory to SMEM when imported cross-device (v8)
2021-09-01 10:18 UTC (3+ messages)
` [Intel-gfx] [PATCH 7/8] drm/i915/gem: Correct the locking and pin pattern for dma-buf (v8)
[Intel-gfx] [PATCH] drm/i915: Update small joiner ram size
2021-09-01 7:45 UTC (3+ messages)
[Intel-gfx] [PATCH 1/2] drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup guardband
2021-09-01 7:45 UTC (5+ messages)
` [Intel-gfx] [v2] "
[Intel-gfx] [PATCH v7 0/8] use DYNAMIC_DEBUG to implement DRM.debug
2021-08-31 23:38 UTC (13+ messages)
` [Intel-gfx] [PATCH v7 1/8] dyndbg: add DEFINE_DYNAMIC_DEBUG_CATEGORIES and callbacks
` [Intel-gfx] [PATCH v7 2/8] dyndbg: remove spaces in pr_debug "gvt: core:" etc prefixes
` [Intel-gfx] [PATCH v7 3/8] i915/gvt: use DEFINE_DYNAMIC_DEBUG_CATEGORIES to create "gvt:core:" etc categories
` [Intel-gfx] [PATCH v7 4/8] amdgpu: use DEFINE_DYNAMIC_DEBUG_CATEGORIES
` [Intel-gfx] [PATCH v7 5/8] drm_print: add choice to use dynamic debug in drm-debug
` [Intel-gfx] [PATCH v7 6/8] drm_print: instrument drm_debug_enabled
` [Intel-gfx] [PATCH v7 7/8] amdgpu_ucode: reduce number of pr_debug calls
` [Intel-gfx] [PATCH v7 8/8] nouveau: fold multiple DRM_DEBUG_DRIVERs together
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for use DYNAMIC_DEBUG to implement DRM.debug (rev2)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH 0/8] Enable triggered perf query for Xe_HP
2021-08-31 20:35 UTC (13+ messages)
` [Intel-gfx] [PATCH 1/8] drm/i915/gt: Lock intel_engine_apply_whitelist with uncore->lock
` [Intel-gfx] [PATCH 2/8] drm/i915/gt: Refactor _wa_add to reuse wa_index and wa_list_grow
` [Intel-gfx] [PATCH 3/8] drm/i915/gt: Check for conflicting RING_NONPRIV
` [Intel-gfx] [PATCH 4/8] drm/i915/gt: Enable dynamic adjustment of RING_NONPRIV
` [Intel-gfx] [PATCH 5/8] drm/i915/perf: Ensure observation logic is not clock gated
` [Intel-gfx] [PATCH 6/8] drm/i915/perf: Whitelist OA report trigger registers
` [Intel-gfx] [PATCH 7/8] drm/i915/perf: Whitelist OA counter and buffer registers
` [Intel-gfx] [PATCH 8/8] drm/i915/perf: Map OA buffer to user space for gen12 performance query
` [Intel-gfx] ✗ Fi.CI.BAT: failure for Enable triggered perf query for Xe_HP (rev2)
[Intel-gfx] [PATCH v2 0/6] drm/displayid: VESA vendor block and drm/i915 MSO use of it
2021-08-31 19:36 UTC (10+ messages)
` [Intel-gfx] [PATCH v2 1/6] drm/displayid: re-align data block macros
` [Intel-gfx] [PATCH v2 2/6] drm/displayid: add DisplayID v2.0 data blocks and primary use cases
` [Intel-gfx] [PATCH v2 3/6] drm/edid: abstract OUI conversion to 24-bit int
` [Intel-gfx] [PATCH v2 4/6] drm/edid: parse the DisplayID v2.0 VESA vendor block for MSO
` [Intel-gfx] [PATCH v2 5/6] drm/i915/edp: postpone MSO init until after EDID read
` [Intel-gfx] [PATCH v2 6/6] drm/i915/edp: use MSO pixel overlap from DisplayID data
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/displayid: VESA vendor block and drm/i915 MSO use of it (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 00/27] Clean up GuC CI failures, simplify locking, and kernel DOC
2021-08-31 19:09 UTC (5+ messages)
` [Intel-gfx] [PATCH 26/27] drm/i915/guc: Add GuC kernel doc
` [Intel-gfx] [PATCH 27/27] drm/i915/guc: Drop static inline functions intel_guc_submission.c
[Intel-gfx] [PATCH 1/2] drm/i915/debugfs: Do not report currently active engine when describing objects
2021-08-31 16:13 UTC (6+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i915: Handle Intel igfx + Intel dgfx hybrid graphics setup
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/debugfs: Do not report currently active engine when describing objects
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH 01/11] drm/i915: Release i915_gem_context from a worker
2021-08-31 15:14 UTC (10+ messages)
` [Intel-gfx] [PATCH 10/11] drm/i915: use xa_lock/unlock for fpriv->vm_xa lookups
` [Intel-gfx] [PATCH] "
` [Intel-gfx] [PATCH] drm/i915: Release i915_gem_context from a worker
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with drm/i915: Release i915_gem_context from a worker (rev3)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with drm/i915: Release i915_gem_context from a worker (rev4)
[Intel-gfx] [PATCH 0/5] drm/displayid: VESA vendor block and drm/i915 MSO use of it
2021-08-31 14:19 UTC (8+ messages)
` [Intel-gfx] [PATCH 3/5] drm/edid: parse the DisplayID v2.0 VESA vendor block for MSO
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/displayid: VESA vendor block and drm/i915 MSO use of it
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH] drm/i915: Handle Intel igfx + Intel dgfx hybrid graphics setup
2021-08-31 13:18 UTC (7+ messages)
` [Intel-gfx] [PATCH v2] "
[Intel-gfx] [PATCH v8 0/7] drm: update locking for modesetting
2021-08-31 12:28 UTC (11+ messages)
` [Intel-gfx] [PATCH v8 3/7] drm: lock drm_global_mutex earlier in the ioctl handler
` [Intel-gfx] [PATCH v8 4/7] drm: avoid races with modesetting rights
` [Intel-gfx] [PATCH v8 7/7] drm: remove drm_file.master_lookup_lock
[Intel-gfx] [PATCH] drm/i915/gem: Fix the mman selftest
2021-08-31 10:52 UTC (3+ messages)
[Intel-gfx] [PATCH 00/19] drm/i915: Short-term pinning and async eviction
2021-08-31 10:29 UTC (13+ messages)
` [Intel-gfx] [PATCH 01/19] drm/i915: Move __i915_gem_free_object to ttm_bo_destroy
` [Intel-gfx] [PATCH 02/19] drm/i915: Remove unused bits of i915_vma/active api
` [Intel-gfx] [PATCH 07/19] drm/i915: vma is always backed by an object
` [Intel-gfx] [PATCH 09/19] drm/i915: Change shrink ordering to use locking around unbinding
` [Intel-gfx] [PATCH 12/19] drm/i915: Remove pages_mutex and intel_gtt->vma_ops.set/clear_pages members
` [Intel-gfx] [PATCH 18/19] drm/i915: Add support for asynchronous moving fence waiting
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Short-term pinning and async eviction
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [PATCH v10 0/4] drm: update locking for modesetting
2021-08-31 9:33 UTC (7+ messages)
` [Intel-gfx] [PATCH v10 1/4] drm: fix null ptr dereference in drm_master_release
` [Intel-gfx] [PATCH v10 2/4] drm: convert drm_device.master_mutex into a rwsem
` [Intel-gfx] [PATCH v10 3/4] drm: lock drm_global_mutex earlier in the ioctl handler
` [Intel-gfx] [PATCH v10 4/4] drm: avoid races with modesetting rights
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm: update locking for modesetting (rev7)
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v2] drm/ttm: Fix ttm_bo_move_memcpy() for subclassed struct ttm_resource
2021-08-31 7:17 UTC (2+ messages)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/ttm: Fix ttm_bo_move_memcpy() for subclassed struct ttm_resource (rev2)
[Intel-gfx] [PATCH v9 0/4] drm: update locking for modesetting
2021-08-31 6:49 UTC (6+ messages)
` [Intel-gfx] [PATCH v9 1/4] drm: fix null ptr dereference in drm_master_release
` [Intel-gfx] [PATCH v9 2/4] drm: convert drm_device.master_mutex into a rwsem
` [Intel-gfx] [PATCH v9 3/4] drm: lock drm_global_mutex earlier in the ioctl handler
` [Intel-gfx] [PATCH v9 4/4] drm: avoid races with modesetting rights
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm: update locking for modesetting (rev6)
[Intel-gfx] [PATCH V3 0/8] drm/i915/gt: Initialize unused MOCS entries to L3_WB
2021-08-31 4:03 UTC (17+ messages)
` [Intel-gfx] [PATCH V3 1/8] drm/i915/gt: Add support of mocs propagation
` [Intel-gfx] [PATCH V3 2/8] drm/i915/gt: Add support of mocs auxiliary registers programming
` [Intel-gfx] [RFC PATCH] drm/i915/gt: get_ctx_reg_count() can be static
` [Intel-gfx] [PATCH V3 3/8] drm/i915/gt: Set CMD_CCTL to UC for Gen12 Onward
` [Intel-gfx] [PATCH V3 4/8] drm/i915/gt: Set BLIT_CCTL reg to un-cached
` [Intel-gfx] [PATCH V3 5/8] drm/i915/gt: Initialize unused MOCS entries with device specific values
` [Intel-gfx] [PATCH V3 6/8] drm/i95/adl: Define MOCS table for Alderlake
` [Intel-gfx] [PATCH V3 7/8] drm/i915/gt: Initialize L3CC table in mocs init
` [Intel-gfx] [PATCH V3 8/8] drm/i915/selftest: Remove Renderer class check for l3cc table read
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gt: Initialize unused MOCS entries to L3_WB
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v6 0/3] drm/i915/hdcp: HDCP2.2 MST dock fixes
2021-08-30 21:11 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/hdcp: HDCP2.2 MST dock fixes (rev8)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH CI 1/3] drm/i915/display: Drop PSR support from HSW and BDW
2021-08-30 20:00 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/3] drm/i915/display: Drop PSR support from HSW and BDW (rev2)
[Intel-gfx] [PATCH v5 00/20] drm/sched dependency handling and implicit sync fixes
2021-08-30 19:38 UTC (3+ messages)
` [Intel-gfx] [PATCH v5 20/20] dma-resv: Give the docs a do-over
[Intel-gfx] [PATCH v3] drm/i915/dp: Use max params for panels < eDP 1.4
2021-08-30 16:42 UTC (4+ messages)
[Intel-gfx] [PATCH rdma-next v4 0/3] SG fix together with update to RDMA umem
2021-08-30 13:42 UTC (4+ messages)
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