messages from 2021-09-01 16:19:11 to 2021-09-03 10:40:33 UTC [more...]
[Intel-gfx] [PATCH 01/11] drm/i915: Release i915_gem_context from a worker
2021-09-03 10:40 UTC (11+ messages)
` [Intel-gfx] [PATCH] "
[Intel-gfx] [PATCH V5 0/5] drm/i915/gt: Initialize unused MOCS entries to L3_WB
2021-09-03 10:24 UTC (8+ messages)
` [Intel-gfx] [PATCH V5 1/5] drm/i915/gt: Add support of mocs propagation
` [Intel-gfx] [PATCH V5 2/5] drm/i915/gt: Set CMD_CCTL to UC for Gen12 Onward
` [Intel-gfx] [PATCH V5 3/5] drm/i915/gt: Set BLIT_CCTL reg to un-cached
` [Intel-gfx] [PATCH V5 4/5] drm/i915/gt: Initialize unused MOCS entries with device specific values
` [Intel-gfx] [PATCH V5 5/5] drm/i915/gt: Initialize L3CC table in mocs init
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gt: Initialize unused MOCS entries to L3_WB
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [PATCH v2 0/7] drm/i915/bios: remove vbt ddi_port_info caching
2021-09-03 10:05 UTC (18+ messages)
` [Intel-gfx] [PATCH v2 1/7] drm/i915/bios: use hdmi level shift directly from child data
` [Intel-gfx] [PATCH v2 2/7] drm/i915/bios: use max tmds clock "
` [Intel-gfx] [PATCH v2 3/7] drm/i915/bios: use dp max link rate "
` [Intel-gfx] [PATCH v2 4/7] drm/i915/bios: use alternate aux channel "
` [Intel-gfx] [PATCH v2 5/7] drm/i915/bios: move ddc pin mapping code next to ddc pin sanitize
` [Intel-gfx] [PATCH v2 6/7] drm/i915/bios: use ddc pin directly from child data
` [Intel-gfx] [PATCH v2 7/7] drm/i915/bios: get rid of vbt ddi_port_info
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/bios: remove vbt ddi_port_info caching (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PULL] drm-misc-next-fixes
2021-09-03 9:38 UTC
[Intel-gfx] [PATCH 00/19] drm/i915: Short-term pinning and async eviction
2021-09-03 9:33 UTC (8+ messages)
` [Intel-gfx] [PATCH 07/19] drm/i915: vma is always backed by an object
` [Intel-gfx] [PATCH 14/19] drm/i915: Add i915_vma_unbind_unlocked, and take obj lock for i915_vma_unbind
[Intel-gfx] [PATCH 01/11] drm/i915: Release i915_gem_context from a worker
2021-09-03 8:05 UTC (27+ messages)
` [Intel-gfx] [PATCH 02/11] drm/i915: Release ctx->syncobj on final put, not on ctx close
` [Intel-gfx] [PATCH 03/11] drm/i915: Keep gem ctx->vm alive until the final put
` [Intel-gfx] [PATCH 04/11] drm/i915: Drop code to handle set-vm races from execbuf
` [Intel-gfx] [PATCH 05/11] drm/i915: Rename i915_gem_context_get_vm_rcu to i915_gem_context_get_eb_vm
` [Intel-gfx] [PATCH 06/11] drm/i915: Use i915_gem_context_get_eb_vm in ctx_getparam
` [Intel-gfx] [PATCH 07/11] drm/i915: Add i915_gem_context_is_full_ppgtt
` [Intel-gfx] [PATCH 08/11] drm/i915: Use i915_gem_context_get_eb_vm in intel_context_set_gem
` [Intel-gfx] [PATCH 09/11] drm/i915: Drop __rcu from gem_context->vm
` [Intel-gfx] [PATCH 10/11] drm/i915: use xa_lock/unlock for fpriv->vm_xa lookups
` [Intel-gfx] [PATCH 11/11] drm/i915: Stop rcu support for i915_address_space
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/11] drm/i915: Release i915_gem_context from a worker
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/11] drm/i915: Release i915_gem_context from a worker (rev2)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/11] drm/i915: Release i915_gem_context from a worker (rev3)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v6 0/3] drm/i915/hdcp: HDCP2.2 MST dock fixes
2021-09-03 5:23 UTC (10+ messages)
` [Intel-gfx] [PATCH v6 1/3] drm/i915/hdcp: update cp_irq_count_cached in intel_dp_hdcp2_read_msg()
` [Intel-gfx] [PATCH v6 2/3] drm/i915/hdcp: read RxInfo once when reading RepeaterAuth_Send_ReceiverID_List
` [Intel-gfx] [PATCH v6 3/3] drm/i915/hdcp: reuse rx_info for mst stream type1 capability check
[Intel-gfx] [PATCH V4 0/6] drm/i915/gt: Initialize unused MOCS entries to L3_WB
2021-09-03 5:21 UTC (18+ messages)
` [Intel-gfx] [PATCH V4 1/6] drm/i915/gt: Add support of mocs propagation
` [Intel-gfx] [PATCH V4 2/6] drm/i915/gt: Set CMD_CCTL to UC for Gen12 Onward
` [Intel-gfx] [PATCH V4 3/6] drm/i915/gt: Set BLIT_CCTL reg to un-cached
` [Intel-gfx] [PATCH V4 4/6] drm/i915/gt: Initialize unused MOCS entries with device specific values
` [Intel-gfx] [PATCH V4 5/6] drm/i915/gt: Initialize L3CC table in mocs init
` [Intel-gfx] [PATCH V4 6/6] drm/i915/selftest: Remove Renderer class check for l3cc table read
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gt: Initialize unused MOCS entries to L3_WB
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [PATCH 0/2] Add support for querying hw info that UMDs need
2021-09-03 1:03 UTC (4+ messages)
` [Intel-gfx] [PATCH 1/2] drm/i915/guc: Add fetch of hwconfig table
` [Intel-gfx] [PATCH 2/2] drm/i915/uapi: Add query for "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add support for querying hw info that UMDs need
[Intel-gfx] [PATCH v7 0/8] use DYNAMIC_DEBUG to implement DRM.debug
2021-09-03 0:31 UTC (3+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for use DYNAMIC_DEBUG to implement DRM.debug (rev2)
[Intel-gfx] [PATCH][next] drm/i915: clean up inconsistent indenting
2021-09-02 23:48 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v5 00/25] Clean up GuC CI failures, simplify locking, and kernel DOC
2021-09-02 22:11 UTC (34+ messages)
` [Intel-gfx] [PATCH v5 01/25] drm/i915/guc: Fix blocked context accounting
` [Intel-gfx] [PATCH v5 02/25] drm/i915/guc: Fix outstanding G2H accounting
` [Intel-gfx] [PATCH v5 03/25] drm/i915/guc: Unwind context requests in reverse order
` [Intel-gfx] [PATCH v5 04/25] drm/i915/guc: Don't drop ce->guc_active.lock when unwinding context
` [Intel-gfx] [PATCH v5 05/25] drm/i915/guc: Process all G2H message at once in work queue
` [Intel-gfx] [PATCH v5 06/25] drm/i915/guc: Workaround reset G2H is received after schedule done G2H
` [Intel-gfx] [PATCH v5 07/25] Revert "drm/i915/gt: Propagate change in error status to children on unhold"
` [Intel-gfx] [PATCH v5 08/25] drm/i915/guc: Kick tasklet after queuing a request
` [Intel-gfx] [PATCH v5 09/25] drm/i915/guc: Don't enable scheduling on a banned context, guc_id invalid, not registered
` [Intel-gfx] [PATCH v5 10/25] drm/i915/guc: Copy whole golden context, set engine state size of subset
` [Intel-gfx] [PATCH v5 11/25] drm/i915/selftests: Add initial GuC selftest for scrubbing lost G2H
` [Intel-gfx] [PATCH v5 12/25] drm/i915/guc: Take context ref when cancelling request
` [Intel-gfx] [PATCH v5 13/25] drm/i915/guc: Don't touch guc_state.sched_state without a lock
` [Intel-gfx] [PATCH v5 14/25] drm/i915/guc: Reset LRC descriptor if register returns -ENODEV
` [Intel-gfx] [PATCH v5 15/25] drm/i915: Allocate error capture in nowait context
` [Intel-gfx] [PATCH v5 16/25] drm/i915/guc: Flush G2H work queue during reset
` [Intel-gfx] [PATCH v5 17/25] drm/i915/guc: Release submit fence from an irq_work
` [Intel-gfx] [PATCH v5 18/25] drm/i915/guc: Move guc_blocked fence to struct guc_state
` [Intel-gfx] [PATCH v5 19/25] drm/i915/guc: Rework and simplify locking
` [Intel-gfx] [PATCH v5 20/25] drm/i915/guc: Proper xarray usage for contexts_lookup
` [Intel-gfx] [PATCH v5 21/25] drm/i915/guc: Drop pin count check trick between sched_disable and re-pin
` [Intel-gfx] [PATCH v5 22/25] drm/i915/guc: Move GuC priority fields in context under guc_active
` [Intel-gfx] [PATCH v5 23/25] drm/i915/guc: Move fields protected by guc->contexts_lock into sub structure
` [Intel-gfx] [PATCH v5 24/25] drm/i915/guc: Drop guc_active move everything into guc_state
` [Intel-gfx] [PATCH v5 25/25] drm/i915/guc: Add GuC kernel doc
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Clean up GuC CI failures, simplify locking, and kernel DOC (rev8)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH] drm/i915: Mark GPU wedging on driver unregister unrecoverable
2021-09-02 19:56 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [v3 0/5] DSI driver improvement
2021-09-02 19:21 UTC (9+ messages)
` [Intel-gfx] [v3 1/5] drm/i915/dsi: wait for header and payload credit available
` [Intel-gfx] [v3 2/5] drm/i915/dsi: refine send MIPI DCS command sequence
` [Intel-gfx] [v3 3/5] drm/i915: Get proper min cdclk if vDSC enabled
` [Intel-gfx] [v3 4/5] drm/i915/dsi: Retrieve max brightness level from VBT
` [Intel-gfx] [v3 5/5] drm/i915/dsi: Read/write proper brightness value via MIPI DCS command
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for DSI driver improvement (rev3)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH V3 0/8] drm/i915/gt: Initialize unused MOCS entries to L3_WB
2021-09-02 18:49 UTC (22+ messages)
` [Intel-gfx] [PATCH V3 1/8] drm/i915/gt: Add support of mocs propagation
` [Intel-gfx] [PATCH V3 2/8] drm/i915/gt: Add support of mocs auxiliary registers programming
` [Intel-gfx] [RFC PATCH] drm/i915/gt: fix duplicated inclusion
` [Intel-gfx] [PATCH V3 4/8] drm/i915/gt: Set BLIT_CCTL reg to un-cached
` [Intel-gfx] [PATCH V3 5/8] drm/i915/gt: Initialize unused MOCS entries with device specific values
` [Intel-gfx] [PATCH V3 6/8] drm/i95/adl: Define MOCS table for Alderlake
` [Intel-gfx] [PATCH V3 7/8] drm/i915/gt: Initialize L3CC table in mocs init
` [Intel-gfx] [PATCH V3 8/8] drm/i915/selftest: Remove Renderer class check for l3cc table read
[Intel-gfx] [PATCH v2 0/8] Drop frontbuffer rendering support from Skylake and newer
2021-09-02 18:42 UTC (9+ messages)
` [Intel-gfx] [PATCH v2 4/8] drm/i915/display: Some code improvements and code style fixes for DRRS
` [Intel-gfx] [PATCH v2 5/8] drm/i915/display: Share code between intel_drrs_flush and intel_drrs_invalidate
` [Intel-gfx] [PATCH v2 6/8] drm/i915/display: Prepare DRRS for frontbuffer rendering drop
` [Intel-gfx] [PATCH v2 7/8] drm/i915/display/skl+: Drop frontbuffer rendering support
[Intel-gfx] [PATCH 0/6] drm/i915: Suspend / resume backup- and restore of LMEM
2021-09-02 15:12 UTC (10+ messages)
` [Intel-gfx] [PATCH 1/6] drm/i915/ttm: Implement a function to copy the contents of two TTM-base objects
` [Intel-gfx] [PATCH 2/6] drm/i915/gem: Implement a function to process all gem objects of a region
` [Intel-gfx] [PATCH 3/6] drm/i915 Implement LMEM backup and restore for suspend / resume
` [Intel-gfx] [PATCH 4/6] drm/i915/gt: Register the migrate contexts with their engines
` [Intel-gfx] [PATCH 5/6] drm/i915: Don't back up pinned LMEM context images and rings during suspend
` [Intel-gfx] [PATCH 6/6] drm/i915: Reduce the number of objects subject to memcpy recover
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Suspend / resume backup- and restore of LMEM
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH] drm/i915: Handle Intel igfx + Intel dgfx hybrid graphics setup
2021-09-02 15:01 UTC (9+ messages)
` [Intel-gfx] [PATCH v2] "
[Intel-gfx] [PATCH V4] drm/i915/gen11: Disable cursor clock gating in HDR mode
2021-09-02 13:07 UTC (6+ messages)
[Intel-gfx] [PATCH 0/5] Fix in max source calculation for dp/edp
2021-09-02 12:52 UTC (10+ messages)
` [Intel-gfx] [PATCH 1/5] drm/i915/dp: Fix eDP max rate for display 11+
` [Intel-gfx] [PATCH 2/5] drm/i915/dp: fix TGL and ICL max source rates
` [Intel-gfx] [PATCH 3/5] drm/i915/dp: fix EHL/JSL max source rates calculation
` [Intel-gfx] [PATCH 4/5] drm/i915/dp: fix DG1 and RKL max source rates
` [Intel-gfx] [PATCH 5/5] drm/i915/dp: fix for ADL_P/S dp/edp "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Fix in max source calculation for dp/edp (rev3)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [v2 0/5] DSI driver improvement
2021-09-02 12:46 UTC (12+ messages)
` [Intel-gfx] [v2 1/5] drm/i915/dsi: wait for header and payload credit available
` [Intel-gfx] [v2 2/5] drm/i915/dsi: refine send MIPI DCS command sequence
` [Intel-gfx] [v2 3/5] drm/i915: Get proper min cdclk if vDSC enabled
` [Intel-gfx] [v2 4/5] drm/i915/dsi: Retrieve max brightness level from VBT
` [Intel-gfx] [v2 5/5] drm/i915/dsi: Read/write proper brightness value via MIPI DCS command
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for DSI driver improvement (rev2)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 0/5] drm/i915/display: debugfs cleanups
2021-09-02 12:15 UTC (13+ messages)
` [Intel-gfx] [PATCH 2/5] drm/i915/debugfs: clean up LPSP capable
` [Intel-gfx] [PATCH 3/5] drm/i915/debugfs: register LPSP capability on all platforms
` [Intel-gfx] [PATCH 4/5] drm/i915/display: stop returning errors from debugfs registration
` [Intel-gfx] [PATCH 5/5] drm/i915/debugfs: pass intel_connector to intel_connector_debugfs_add()
[Intel-gfx] [PATCH] drm/i915/dp: fix DG2 max source rate check
2021-09-02 11:10 UTC (6+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: fix DG2 max source rate check (rev2)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915: Flush buffer pools on driver remove
2021-09-01 20:38 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Flush buffer pools on driver remove (rev2)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
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