messages from 2021-10-06 20:46:02 to 2021-10-07 23:00:20 UTC [more...]
[Intel-gfx] [PATCH] drm/i915/pmu: Connect engine busyness stats from GuC to pmu
2021-10-07 23:00 UTC (7+ messages)
[Intel-gfx] [PATCH 1/2] drm/i915/pmu: Add a name to the execlists stats
2021-10-07 22:55 UTC (2+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i915/pmu: Connect engine busyness stats from GuC to pmu
[Intel-gfx] [PATCH] drm/i915/gem: Check function return in live_nop_switch
2021-10-07 22:55 UTC (2+ messages)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for "
[Intel-gfx] [PATCH 00/26] Parallel submission aka multi-bb execbuf
2021-10-07 22:03 UTC (24+ messages)
` [Intel-gfx] [PATCH 01/26] drm/i915/guc: Move GuC guc_id allocation under submission state sub-struct
` [Intel-gfx] [PATCH 02/26] drm/i915/guc: Take GT PM ref when deregistering context
` [Intel-gfx] [PATCH 03/26] drm/i915/guc: Take engine PM when a context is pinned with GuC submission
` [Intel-gfx] [PATCH 04/26] drm/i915/guc: Don't call switch_to_kernel_context "
` [Intel-gfx] [PATCH 05/26] drm/i915: Add logical engine mapping
` [Intel-gfx] [PATCH 07/26] drm/i915/guc: Introduce context parent-child relationship
` [Intel-gfx] [PATCH 08/26] drm/i915/guc: Add multi-lrc context registration
` [Intel-gfx] [PATCH 09/26] drm/i915/guc: Ensure GuC schedule operations do not operate on child contexts
` [Intel-gfx] [PATCH 10/26] drm/i915/guc: Assign contexts in parent-child relationship consecutive guc_ids
` [Intel-gfx] [PATCH 21/26] drm/i915: Multi-BB execbuf
[Intel-gfx] [PATCH 00/11] drm/i915: Simplify handling of modifiers
2021-10-07 22:00 UTC (19+ messages)
` [Intel-gfx] [PATCH 01/11] drm/i915: Add a table with a descriptor for all i915 modifiers
` [Intel-gfx] [PATCH 02/11] drm/i915: Move intel_get_format_info() to intel_fb.c
` [Intel-gfx] [PATCH 03/11] drm/i915: Add tiling attribute to the modifier descriptor
` [Intel-gfx] [PATCH 04/11] drm/i915: Simplify the modifier check for interlaced scanout support
` [Intel-gfx] [PATCH 05/11] drm/i915: Unexport is_semiplanar_uv_plane()
` [Intel-gfx] [PATCH 06/11] drm/i915: Move intel_format_info_is_yuv_semiplanar() to intel_fb.c
` [Intel-gfx] [PATCH 07/11] drm/i915: Add a platform independent way to get the RC CCS CC plane
` [Intel-gfx] [PATCH 08/11] drm/i915: Handle CCS CC planes separately from CCS control planes
` [Intel-gfx] [PATCH 09/11] drm/i915: Add a platform independent way to check for "
` [Intel-gfx] [PATCH 10/11] drm/i915: Move is_ccs_modifier() to intel_fb.c
` [Intel-gfx] [PATCH 11/11] drm/i915: Add functions to check for RC CCS CC and MC CCS modifiers
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Simplify handling of modifiers
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [PATCH v3 00/20] drm: cleanup: Use DRM_MODESET_LOCK_ALL_* helpers
2021-10-07 21:31 UTC (24+ messages)
` [Intel-gfx] [PATCH v3 01/20] drm: cleanup: drm_modeset_lock_all_ctx() --> DRM_MODESET_LOCK_ALL_BEGIN()
` [Intel-gfx] [PATCH v3 02/20] drm/i915: "
` [Intel-gfx] [PATCH v3 03/20] drm/msm: "
` [Intel-gfx] [PATCH v3 04/20] drm: cleanup: drm_modeset_lock_all() "
` [Intel-gfx] [PATCH v3 05/20] drm/vmwgfx: "
` [Intel-gfx] [PATCH v3 06/20] drm/tegra: "
` [Intel-gfx] [PATCH v3 07/20] drm/shmobile: "
` [Intel-gfx] [PATCH v3 08/20] drm/radeon: "
` [Intel-gfx] [PATCH v3 09/20] drm/omapdrm: "
` [Intel-gfx] [PATCH v3 10/20] drm/nouveau: "
` [Intel-gfx] [PATCH v3 11/20] drm/msm: "
` [Intel-gfx] [PATCH v3 12/20] drm/i915: "
` [Intel-gfx] [PATCH v3 13/20] drm/i915: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN() [part 2]
` [Intel-gfx] [PATCH v3 14/20] drm/i915: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN() [part 3]
` [Intel-gfx] [PATCH v3 15/20] drm/gma500: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN()
` [Intel-gfx] [PATCH v3 16/20] drm/amd: "
` [Intel-gfx] [PATCH v3 17/20] drm/amd: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN() [part 2]
` [Intel-gfx] [PATCH v3 18/20] drm/amd: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN() [part 3]
` [Intel-gfx] [PATCH v3 19/20] drm: cleanup: remove drm_modeset_(un)lock_all()
` [Intel-gfx] [PATCH v3 20/20] drm: cleanup: remove acquire_ctx from drm_mode_config
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm: cleanup: Use DRM_MODESET_LOCK_ALL_* helpers
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [PATCH v3 0/5] drm/dp, drm/i915: Finish basic PWM support for VESA backlight helpers
2021-10-07 20:56 UTC (6+ messages)
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/dp, drm/i915: Finish basic PWM support for VESA backlight helpers (rev6)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/dp, drm/i915: Finish basic PWM support for VESA backlight helpers (rev7)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [PATCH 0/4] drm/i915: Clean up the pxp stuff
2021-10-07 18:36 UTC (14+ messages)
` [Intel-gfx] [PATCH 1/4] drm/i915: Move the pxp plane state computation
` [Intel-gfx] [PATCH 2/4] drm/i915: Fix up skl_program_plane() pxp stuff
` [Intel-gfx] [PATCH 3/4] drm/i915: Remove the drm_dbg() from the vblank evade critical section
` [Intel-gfx] [PATCH 4/4] drm/i915: Rename intel_load_plane_csc_black()
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Clean up the pxp stuff
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH v3] drm/i915: remove IS_ACTIVE
2021-10-07 15:49 UTC (4+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: remove IS_ACTIVE (rev3)
[Intel-gfx] [PATCH v7 1/8] drm/i915/gem: Break out some shmem backend utils
2021-10-07 18:18 UTC (13+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v7,1/8] "
` [Intel-gfx] ✓ Fi.CI.IGT: success "
[Intel-gfx] [PATCH v2 0/4] Panel replay phase1 implementation
2021-10-07 17:52 UTC (14+ messages)
` [Intel-gfx] [PATCH v2 1/4] drm/i915/panelreplay: HAS_PR() macro added for panel replay
` [Intel-gfx] [PATCH v2 2/4] drm/i915/panelreplay: Initializaton and compute config "
` [Intel-gfx] [PATCH v2 3/4] drm/i915/panelreplay: enable/disable "
` [Intel-gfx] [PATCH v2 4/4] drm/i915/panelreplay: Added state checker for panel replay state
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Panel replay phase1 implementation (rev2)
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [PATCH v4 1/2] drm/i915/dp: abstract intel_dp_lane_max_vswing_reached()
2021-10-07 16:58 UTC (8+ messages)
` [Intel-gfx] [PATCH v4 2/2] drm/i915/dg2: update link training for 128b/132b
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v4,1/2] drm/i915/dp: abstract intel_dp_lane_max_vswing_reached()
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915/dg2: fix snps buf trans for uhbr
2021-10-07 16:10 UTC (6+ messages)
` [Intel-gfx] [PATCH v2] "
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dg2: fix snps buf trans for uhbr (rev2)
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH] drm/i915/dp: take LTTPR into account in 128b/132b rates
2021-10-07 14:07 UTC (6+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH 1/2] dma-buf: add dma_resv_for_each_fence v3
2021-10-07 13:26 UTC (5+ messages)
` [Intel-gfx] [PATCH 2/2] dma-buf: add dma_resv selftest v3
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] dma-buf: add dma_resv_for_each_fence v3
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [bisected] suspend broken by DRM fbdev name change on i915 IVB
2021-10-07 13:04 UTC (4+ messages)
[Intel-gfx] [RFC v2 0/8] CPU + GPU synchronised priority scheduling
2021-10-07 10:00 UTC (9+ messages)
` [Intel-gfx] [RFC 1/8] sched: Add nice value change notifier
[Intel-gfx] Deploying new iterator interface for dma-buf
2021-10-06 8:24 UTC (3+ messages)
` [Intel-gfx] [PATCH 02/28] dma-buf: add dma_resv_for_each_fence v2
[Intel-gfx] [PATCH] lib/stackdepot: allow optional init and stack_table allocation by kvmalloc()
2021-10-07 11:35 UTC (4+ messages)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for "
[Intel-gfx] [PATCH] drm/i915: Free the returned object of acpi_evaluate_dsm()
2021-10-07 10:10 UTC (3+ messages)
[Intel-gfx] [PATCH] drm/i915/dg2: update link training for 128b/132b
2021-10-07 12:17 UTC (4+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dg2: update link training for 128b/132b (rev2)
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [RFC PATCH 0/8] drm/i915/display: refactor plane config + pin out
2021-10-07 11:09 UTC (17+ messages)
` [Intel-gfx] [PATCH 1/8] drm/i915/display: move plane prepare/cleanup to intel_atomic_plane.c
` [Intel-gfx] [PATCH 2/8] drm/i915/display: move intel_plane_uses_fence to inline
` [Intel-gfx] [PATCH 3/8] drm/i915/display: refactor out initial plane config for crtcs
` [Intel-gfx] [PATCH 4/8] drm/i915/display: refactor initial plane config to a separate file
` [Intel-gfx] [PATCH 5/8] drm/i915/display: move pin/unpin fb/plane code to a new file
` [Intel-gfx] [PATCH 6/8] drm/i915/display: refactor fbdev pin/unpin out into functions
` [Intel-gfx] [PATCH 7/8] drm/i915/display: move fbdev pin code into fb_pin
` [Intel-gfx] [PATCH 8/8] drm/i915/display: drop unused parameter to dpt pin
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/display: refactor plane config + pin out
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PULL] drm-intel-fixes
2021-10-07 10:08 UTC
[Intel-gfx] [PATCH v2 0/4] drm/dp, drm/i915: Finish basic PWM support for VESA backlight helpers
2021-10-07 10:07 UTC (5+ messages)
[Intel-gfx] [PATCH v2] drm/i915/display: Wait PSR2 get out of deep sleep to update pipe
2021-10-07 9:31 UTC (5+ messages)
` [Intel-gfx] [PATCH v3] "
[Intel-gfx] mmotm 2021-10-05-19-53 uploaded (drivers/gpu/drm/msm/hdmi/hdmi_phy.o)
2021-10-07 9:28 UTC (3+ messages)
[Intel-gfx] [PATCH] drm/i915/display: Remove check for low voltage sku for max dp source rate
2021-10-07 7:49 UTC (6+ messages)
[Intel-gfx] [PATCH 00/16] drm/i915: DP per-lane drive settings for icl+
2021-10-07 3:08 UTC (21+ messages)
` [Intel-gfx] [PATCH 01/16] drm/i915: Remove pointless extra namespace from dkl/snps buf trans structs
` [Intel-gfx] [PATCH 02/16] drm/i915: Shrink {icl_mg, tgl_dkl}_phy_ddi_buf_trans
` [Intel-gfx] [PATCH 03/16] drm/i915: Use standard form terminating condition for lane for loops
` [Intel-gfx] [PATCH 04/16] drm/i915: Add all per-lane register definitions for icl combo phy
` [Intel-gfx] [PATCH 05/16] drm/i915: Remove dead DKL_TX_LOADGEN_SHARING_PMD_DISABLE stuff
` [Intel-gfx] [PATCH 06/16] drm/i915: Extract icl_combo_phy_loadgen_select()
` [Intel-gfx] [PATCH 07/16] drm/i915: Stop using group access when progrmming icl combo phy TX
` [Intel-gfx] [PATCH 08/16] drm/i915: Query the vswing levels per-lane for icl combo phy
` [Intel-gfx] [PATCH 09/16] drm/i915: Query the vswing levels per-lane for icl mg phy
` [Intel-gfx] [PATCH 10/16] drm/i915: Query the vswing levels per-lane for tgl dkl phy
` [Intel-gfx] [PATCH 11/16] drm/i915: Query the vswing levels per-lane for snps phy
` [Intel-gfx] [PATCH 12/16] drm/i915: Enable per-lane drive settings for icl+
` [Intel-gfx] [PATCH 13/16] drm/i915: Use intel_de_rmw() for tgl dkl phy programming
` [Intel-gfx] [PATCH 14/16] drm/i915: Use intel_de_rmw() for icl mg "
` [Intel-gfx] [PATCH 15/16] drm/i915: Use intel_de_rmw() for icl combo "
` [Intel-gfx] [PATCH 16/16] drm/i915: Fix icl+ combo phy static lane power down setup
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: DP per-lane drive settings for icl+
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] i915/display/dmc: Add Support for PipeC and PipeD DMC
2021-10-07 0:17 UTC (2+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for "
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