messages from 2022-10-11 15:49:03 to 2022-10-13 12:37:18 UTC [more...]
[Intel-gfx] [PATCH] drm/edid/firmware: stop using throwaway platform device
2022-10-12 8:25 UTC (5+ messages)
[Intel-gfx] [PULL] drm-misc-fixes
2022-10-13 12:37 UTC
[Intel-gfx] [PATCH] drm/i915/hdmi: Prune Interlaced modes for Display >= 12
2022-10-13 12:10 UTC (7+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915/slpc: Use platform limits for min/max frequency
2022-10-13 11:34 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH 1/2] drm/print: Add drm_dbg_ratelimited
2022-10-13 9:52 UTC (4+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i915: Ratelimit debug log in vm_fault_ttm
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/print: Add drm_dbg_ratelimited
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [PATCH] drm/i915/display/lspcon: Increase LSPCON mode settle timeout
2022-10-13 9:49 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display/lspcon: Increase LSPCON mode settle timeout (rev2)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH v4 00/30] drm: Analog TV Improvements
2022-10-13 8:36 UTC (4+ messages)
` [Intel-gfx] [PATCH v4 11/30] drm/modes: Add a function to generate analog display modes
[Intel-gfx] [PATCH v2] overflow: Introduce overflows_type() and castable_to_type()
2022-10-13 8:17 UTC (4+ messages)
` [Intel-gfx] [PATCH v3] "
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for overflow: Introduce overflows_type() and castable_to_type() (rev2)
[Intel-gfx] [PATCH v2 00/14] Explicit MCR handling and MTL steering
2022-10-13 7:21 UTC (5+ messages)
` [Intel-gfx] [PATCH v2 09/14] drm/i915/gt: Always use MCR functions on multicast registers
` [Intel-gfx] [PATCH v2 12/14] drm/i915: Define multicast registers as a new type
[Intel-gfx] [PATCH v3 0/4] Enable YCbCr420 for VDSC
2022-10-13 7:18 UTC (8+ messages)
` [Intel-gfx] [PATCH v3 1/4] drm/i915/dp: Check if DSC supports the given output_format
` [Intel-gfx] [PATCH v3 2/4] drm/i915: Adding the new registers for DSC
` [Intel-gfx] [PATCH v3 3/4] drm/i915: Enable YCbCr420 for VDSC
` [Intel-gfx] [PATCH v3 4/4] drm/i915: Fill in native_420 field
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable YCbCr420 for VDSC (rev4)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [PATCH] drm/i915: Allow panel fixed modes to have differing sync polarities
2022-10-13 6:46 UTC (2+ messages)
[Intel-gfx] [PATCH v2 0/4] Enable YCbCr420 for VDSC
2022-10-13 6:12 UTC (5+ messages)
` [Intel-gfx] [PATCH v2 1/4] drm/i915/dp: Check if DSC supports the given output_format
` [Intel-gfx] [PATCH v2 2/4] drm/i915: Adding the new registers for DSC
` [Intel-gfx] [PATCH v2 3/4] drm/i915: Enable YCbCr420 for VDSC
` [Intel-gfx] [PATCH v2 4/4] drm/i915: Fill in native_420 field
[Intel-gfx] [PATCH v2 0/7] drm/i915: prepare for uC loading on MTL
2022-10-13 6:09 UTC (12+ messages)
` [Intel-gfx] [PATCH v2 1/7] drm/i915/huc: only load HuC on GTs that have VCS engines
` [Intel-gfx] [PATCH v2 2/7] drm/i915/uc: fetch uc firmwares for each GT
` [Intel-gfx] [PATCH v2 3/7] drm/i915/uc: use different ggtt pin offsets for uc loads
` [Intel-gfx] [PATCH v2 4/7] drm/i915/guc: Add GuC deprivilege feature to MTL
` [Intel-gfx] [PATCH v2 5/7] drm/i915/mtl: Handle wopcm per-GT and limit calculations
` [Intel-gfx] [PATCH v2 6/7] drm/i915/guc: define media GT GuC send regs
` [Intel-gfx] [PATCH v2 7/7] drm/i915/guc: handle interrupts from media GuC
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: prepare for uC loading on MTL (rev2)
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH v5 0/4] Improve anti-pre-emption w/a for compute workloads
2022-10-12 23:55 UTC (8+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for Improve anti-pre-emption w/a for compute workloads (rev8)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Improve anti-pre-emption w/a for compute workloads (rev9)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v4 00/16] Add DG2 OA support
2022-10-12 23:46 UTC (21+ messages)
` [Intel-gfx] [PATCH v4 01/16] drm/i915/perf: Fix OA filtering logic for GuC mode
` [Intel-gfx] [PATCH v4 02/16] drm/i915/perf: Add 32-bit OAG and OAR formats for DG2
` [Intel-gfx] [PATCH v4 03/16] drm/i915/perf: Fix noa wait predication "
` [Intel-gfx] [PATCH v4 04/16] drm/i915/perf: Determine gen12 oa ctx offset at runtime
` [Intel-gfx] [PATCH v4 05/16] drm/i915/perf: Enable bytes per clock reporting in OA
` [Intel-gfx] [PATCH v4 06/16] drm/i915/perf: Simply use stream->ctx
` [Intel-gfx] [PATCH v4 07/16] drm/i915/perf: Move gt-specific data from i915->perf to gt->perf
` [Intel-gfx] [PATCH v4 08/16] drm/i915/perf: Replace gt->perf.lock with stream->lock for file ops
` [Intel-gfx] [PATCH v4 09/16] drm/i915/perf: Use gt-specific ggtt for OA and noa-wait buffers
` [Intel-gfx] [PATCH v4 10/16] drm/i915/perf: Store a pointer to oa_format in oa_buffer
` [Intel-gfx] [PATCH v4 11/16] drm/i915/perf: Add Wa_1508761755:dg2
` [Intel-gfx] [PATCH v4 12/16] drm/i915/perf: Apply Wa_18013179988
` [Intel-gfx] [PATCH v4 13/16] drm/i915/perf: Save/restore EU flex counters across reset
` [Intel-gfx] [PATCH v4 14/16] drm/i915/guc: Support OA when Wa_16011777198 is enabled
` [Intel-gfx] [PATCH v4 15/16] drm/i915/perf: complete programming whitelisting for XEHPSDV
` [Intel-gfx] [PATCH v4 16/16] drm/i915/perf: Enable OA for DG2
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add DG2 OA support (rev6)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [PATCH] drm/i915: add wait and lock to i915_vma_move_to_active
2022-10-12 22:34 UTC (5+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [CI] PR for HuC 7.10.3
2022-10-12 21:42 UTC
[Intel-gfx] [PATCH 0/3] Add _PICK_EVEN_RANGES
2022-10-12 19:05 UTC (11+ messages)
` [Intel-gfx] [PATCH 1/3] drm/i915: Add _PICK_EVEN_RANGES()
` [Intel-gfx] [PATCH 2/3] drm/i915: Fix coding style on DPLL*_ENABLE defines
` [Intel-gfx] [PATCH 3/3] drm/i915: Convert pll macros to _PICK_EVEN_RANGES
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add _PICK_EVEN_RANGES
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH v3 0/8] Handle BPC for HDMI2.1 PCON without DSC1.2 sink and other fixes
2022-10-12 17:17 UTC (4+ messages)
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Handle BPC for HDMI2.1 PCON without DSC1.2 sink and other fixes (rev4)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH v3 00/16] Add DG2 OA support
2022-10-12 16:12 UTC (10+ messages)
` [Intel-gfx] [PATCH v3 04/16] drm/i915/perf: Determine gen12 oa ctx offset at runtime
` [Intel-gfx] [PATCH v3 15/16] drm/i915/perf: complete programming whitelisting for XEHPSDV
[Intel-gfx] [PATCH 00/22] drm/i915: ELD precompute and readout
2022-10-12 16:06 UTC (60+ messages)
` [Intel-gfx] [PATCH 01/22] drm/i915/audio: s/dev_priv/i915/
` [Intel-gfx] [PATCH 02/22] drm/i915/audio: Nuke leftover ROUNDING_FACTOR
` [Intel-gfx] [PATCH 03/22] drm/i915/audio: Remove CL/BLC audio stuff
` [Intel-gfx] [PATCH 04/22] drm/i915/audio: Exract struct ilk_audio_regs
` [Intel-gfx] [PATCH 05/22] drm/i915/audio: Use REG_BIT() & co
` [Intel-gfx] [PATCH 06/22] drm/i915/audio: Unify register bit naming
` [Intel-gfx] [PATCH 07/22] drm/i915/audio: Protect singleton register with a lock
` [Intel-gfx] [PATCH 08/22] drm/i915/audio: Nuke intel_eld_uptodate()
` [Intel-gfx] [PATCH 09/22] drm/i915/audio: Read ELD buffer size from hardware
` [Intel-gfx] [PATCH 10/22] drm/i915/audio: Make sure we write the whole ELD buffer
` [Intel-gfx] [PATCH 11/22] drm/i915/audio: Use u32* for ELD
` [Intel-gfx] [PATCH 12/22] drm/i915/audio: Use intel_de_rmw() for most audio registers
` [Intel-gfx] [PATCH 13/22] drm/i915/audio: Split "ELD valid" vs. audio PD on hsw+
` [Intel-gfx] [PATCH 14/22] drm/i915/audio: Do the vblank waits
` [Intel-gfx] [PATCH 15/22] drm/i915/audio: Precompute the ELD
` [Intel-gfx] [PATCH 16/22] drm/i915/audio: Hardware ELD readout
` [Intel-gfx] [PATCH 17/22] drm/i915/sdvo: Extract intel_sdvo_has_audio()
` [Intel-gfx] [PATCH 18/22] drm/i915/sdvo: Precompute the ELD
` [Intel-gfx] [PATCH 19/22] drm/i915/sdvo: Do ELD hardware readout
` [Intel-gfx] [PATCH 20/22] drm/i915/audio: Hook up ELD into the state checker
` [Intel-gfx] [PATCH 21/22] drm/i915/audio: Include ELD in the state dump
` [Intel-gfx] [PATCH 22/22] hax: drm/i915/audio: Make HSW hardware ELD buffer sort of work
` [Intel-gfx] [PATCH v2 22/22] drm/i915/audio: Resume HSW/BDW HDA controller around ELD access
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: ELD precompute and readout
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: ELD precompute and readout (rev2)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [PATCH] drm/i915/dgfx: Temporary hammer to keep autosuspend control 'on'
2022-10-12 15:19 UTC (11+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH v3 00/17] drm/i915/vm_bind: Add VM_BIND functionality
2022-10-12 15:21 UTC (16+ messages)
` [Intel-gfx] [PATCH v3 05/17] drm/i915/vm_bind: Implement bind and unbind of object
` [Intel-gfx] [PATCH v3 06/17] drm/i915/vm_bind: Support for VM private BOs
` [Intel-gfx] [PATCH v3 07/17] drm/i915/vm_bind: Add support to handle object evictions
` [Intel-gfx] [PATCH v3 12/17] drm/i915/vm_bind: Implement I915_GEM_EXECBUFFER3 ioctl
[Intel-gfx] [PATCH v2] drm: split build lists one per line and sort
2022-10-12 14:05 UTC (6+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm: split build lists one per line and sort (rev2)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH v3 6/8] drm/i915/dp: Replace intel_dp.dfp members with the new crtc_state sink_format
2022-10-12 9:55 UTC (2+ messages)
` [Intel-gfx] [PATCH v4 "
[Intel-gfx] [PATCH v5 0/1] Delay disabling GuC scheduling of an idle context
2022-10-12 4:05 UTC (3+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for "
[Intel-gfx] [PATCH v2 1/2] drm/i915: Add intel_ prefix to struct ip_version
2022-10-12 0:37 UTC (4+ messages)
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v2,1/2] "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH v2] drm/i915/huc: bump timeout for delayed load and reduce print verbosity
2022-10-12 0:03 UTC (4+ messages)
[Intel-gfx] [PATCH v2 0/4] Simplify uncore register updates
2022-10-11 22:18 UTC (2+ messages)
[Intel-gfx] [PATCH] drm/i915/trace: Removed unused frequency trace
2022-10-11 22:17 UTC (5+ messages)
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915: Use graphics ver, rel info for media on old platforms
2022-10-11 18:57 UTC (6+ messages)
[Intel-gfx] [PATCH 00/15] drm/edid: EDID override refactoring and fixes
2022-10-11 18:49 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH v6 00/21] Move all drivers to a common dma-buf locking convention
2022-10-11 17:31 UTC (2+ messages)
[Intel-gfx] [PATCH v5 1/5] drm/i915: remove the TODO in pin_and_fence_fb_obj
2022-10-11 16:35 UTC (7+ messages)
` [Intel-gfx] [PATCH v5 4/5] drm/i915/display: consider DG2_RC_CCS_CC when migrating buffers
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