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DIR:OUT; SFP:1102; x-ms-exchange-antispam-messagedata: UKTVpZW43AstVPJLKHfzSysSNMunRv4HjTODroNpE8/ukRSPJ3vtAvDFbCItaYHal6PhHQ/eDqEeUd35wpDImBH3III4j6oSRu/fg85RjmSlb5t2/kQw4JhRy6k7ScUBKvgNEhu3ZklwWAQ5tX16kG97hMFff8uhKbncAENXqOTKA//Rk3HlHKM78ZW5V/Vzc0i03yf+cdyQ2Fe44sjCtVlcH8HVqoaHibFnCgKTVwhsOu5IN2ZTY6XTYXJ55TKHqtPlsZ4DiKfjFooTorzyZSc9/ucSNSLRUCUffTAiFrE+/uExROawL0cqVhPYQU7SEOatBzKPte/RXWK+0xM+m0jEOTUcXdRKPmmUN8DUkAcBZ07Y+GF1K1vbFiODR1s6airwF1GWc4O6XJzGAgA1JMyb/7JjS1NH7o+KdOCTyAQAAQrBqvZZ01hI3Lrfl70ny3yBA91MGeEx4ZOXNx9nO3fI1+YFSvbC/9Z/no3XyGQ= MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: 19c69daf-ec6c-458b-c81f-08d7f63c1bf8 X-MS-Exchange-CrossTenant-originalarrivaltime: 12 May 2020 06:17:12.1845 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: eHF2vBVslPLQrhPiPHnKgJ/QxXnxA03HhqmYc/ePvNof0JY4pIlloMQ/3q2A+eapsNaG8ag1JlK9MnZvI+qqEw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR11MB1684 X-OriginatorOrg: intel.com Subject: Re: [Intel-gfx] [PATCH] drm/i915/mst: filter out the display mode exceed sink's capability X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: "20200417212408.19649-1-shawn.c.lee@intel.com" <20200417212408.19649-1-shawn.c.lee@intel.com> Cc: "Chiou, Cooper" Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Thu, May 11, 2020, Ville Syrj=E4l=E4 wrote: >On Thu, May 07, 2020 at 06:46:17PM -0400, Lyude Paul wrote: >> On Thu, 2020-04-30 at 02:37 +0000, Lee, Shawn C wrote: >> > On Sat, 2020-04-25, Lyude Paul wrote: >> > > Hi! Sorry this took me a little while to get back to, I had a couple= of >> > > MST regressions that I had to look into >> > > = >> > > On Sat, 2020-04-18 at 05:24 +0800, Lee Shawn C wrote: >> > > > So far, max dot clock rate for MST mode rely on physcial bandwidth = >> > > > limitation. It would caused compatibility issue if source display = >> > > > resolution exceed MST hub output ability. >> > > > = >> > > > For example, source DUT had DP 1.2 output capability. >> > > > And MST docking just support HDMI 1.4 spec. When a HDMI 2.0 monito= r = >> > > > connected. Source would retrieve EDID from external and get max = >> > > > resolution 4k@60fps. DP 1.2 can support 4K@60fps because it did no= t = >> > > > surpass DP physical bandwidth limitation. >> > > > Do modeset to 4k@60fps, source output display data but MST docking = >> > > > can't output HDMI properly due to this resolution already over HDM= I = >> > > > 1.4 spec. >> > > > = >> > > > Refer to commit ("drm/dp_mst: Use full_pbn instead = of = >> > > > available_pbn for bandwidth checks"). >> > > > Source driver should refer to full_pbn to evaluate sink output = >> > > > capability. And filter out the resolution surpass sink output = >> > > > limitation. >> > > > = >> > > > Cc: Manasi Navare >> > > > Cc: Jani Nikula >> > > > Cc: Ville Syrjala >> > > > Cc: Cooper Chiou >> > > > Cc: Lyude Paul >> > > > Signed-off-by: Lee Shawn C >> > > > --- >> > > > drivers/gpu/drm/i915/display/intel_dp_mst.c | 24 = >> > > > ++++++++++++++++++++- >> > > > 1 file changed, 23 insertions(+), 1 deletion(-) >> > > > = >> > > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c >> > > > b/drivers/gpu/drm/i915/display/intel_dp_mst.c >> > > > index 61605eb8c2af..68697f463dab 100644 >> > > > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c >> > > > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c >> > > > @@ -609,6 +609,26 @@ static int intel_dp_mst_get_modes(struct = >> > > > drm_connector >> > > > *connector) >> > > > return intel_dp_mst_get_ddc_modes(connector); >> > > > } >> > > > = >> > > > +static bool >> > > > +intel_dp_mst_mode_clock_exceed_pbn_bandwidth(struct drm_connector >> > > > *connector, int clock, int bpp) >> > > > +{ >> > > > + struct intel_connector *intel_connector =3D >> > > > to_intel_connector(connector); >> > > > + struct intel_dp *intel_dp =3D intel_connector->mst_port; >> > > > + struct drm_dp_mst_topology_mgr *mgr =3D &intel_dp->mst_mgr; >> > > > + struct drm_dp_mst_port *port =3D (to_intel_connector(connector))= ->port; >> > > > + bool ret =3D false; >> > > > + >> > > > + if (!mgr) >> > > > + return ret; >> > > > + >> > > > + mutex_lock(&mgr->lock); >> > > = >> > > This isn't the right lock for this - mgr->lock protects the topology >> > > layout (e.g. drm_dp_mst_port.mstb, drm_dp_mst_port.next, and >> > > drm_dp_mst_branch.ports). port->full_pbn is protected under >> > > &drm_dp_mst_topology_mgr.base.lock (not drm_dp_mst_topology_mgr.lock= ), so >> > > you need to first add a version of .mode_valid() to struct >> > > drm_connector_helper_funcs that accepts a drm_modeset_acquire_ctx so= you >> > > can use that to safely grab &drm_dp_mst_topology_mgr.base.lock. >> > > = >> > = >> > Thanks for comments! I will correct the lock to protect port->full_pbn. >> > = >> > > > + if (port->full_pbn) >> > > = >> > > Also - there's no reason to check if (port->full_pbn) here, so long = as >> > > you're holding the right locks this should always be populated by th= e time >> > > we create the drm_connector for the MST port (if it's not, that's a = bug >> > > that needs to be fixed). >> > > = >> > = >> > Just want to make sure full_pbn value is greater than zero. As you men= tion >> > in another patch, it's hard to predict sink report full or available P= BN >> > properly. >> = >> Sorry this took me a little while to respond to, crunch time came up at = work. >> Anyway-have you seen issues with full_pbn reporting on hubs? I've seen p= lenty >> of problems with available_pbn reporting, but the reason we switched ove= r to >> full_pbn in the first place is because that seemed to be the one hubs re= ported >> reliably. We actually make the assumption full_pbn is always > 0 if >> something's connected in some places in the MST helpers, so if we've got= cases >> of full_pbn lying as well on some hubs we might want to fix that. > >We have at least one full_pbn=3D=3D0 issue in ci: ><4>[ 5.061345] WARNING: CPU: 0 PID: 376 at drivers/gpu/drm/drm_dp_mst_t= opology.c:4889 drm_dp_mst_atomic_check_mstb_bw_limit+0x193/0x1c0 > >https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8460/fi-kbl-7560u/boot0.txt > >Dunno if that's the MST device reporting zero or due to some other >bug, but at least CI is currently borked on that machine. Thanks for sharing! It will be good to keep checking full_pbn to avoid unex= pected issue. BTW, I just upload patch v2. Could you please share your comments about tha= t? Best regards, Shawn _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx