From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.6 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_INVALID,DKIM_SIGNED,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4B8D8C11F67 for ; Tue, 13 Jul 2021 16:51:10 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1C9236101D for ; Tue, 13 Jul 2021 16:51:10 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1C9236101D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 91C4089E1B; Tue, 13 Jul 2021 16:51:09 +0000 (UTC) Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [IPv6:2a00:1450:4864:20::435]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8C65D899DC; Tue, 13 Jul 2021 16:51:07 +0000 (UTC) Received: by mail-wr1-x435.google.com with SMTP id f9so25703748wrq.11; Tue, 13 Jul 2021 09:51:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=wFFHLp9waseJ2G/puEpfRVsnB7l3dk1EhVjDPNKxo0w=; b=oRYEosIl/+VXXp8xPnkDtbDs6XxcvWe9cSe3IdKQ0xuwtARZBPMqav6ImsdGRAiaIH oDrAnnzxRjt1df8F216Cf6hBDj25WwmBu5m9dDIEBS3IAbX/oInQhQ3mxZgkst1YUqmU WICQ5MgaZnp2FKMK59mPBLB0PkANyHR9mZXwmgYI2TtDtcl4zLEYljN0/k3nq6Fowi5P zsdL8pZc6ZYHyOhoBKTVEqSiKDC1oYIob/wyvfYlUeCWQFbs+FI8Obh3zfDoXyt9/8wD V3nJYlz/q1+xd3QpIFZJjxPvek2gaO0B4yTJHhfz/iWSdSZK1Yee2R4/gUJD0o8jWmA5 qtFg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=wFFHLp9waseJ2G/puEpfRVsnB7l3dk1EhVjDPNKxo0w=; b=W24tMUpPx8QfiDn4PVw0kgQpOsco5+LDHHzd7K5HPMVPqfV3DorqnuCrKaYjv/x5Bj mrGnxfS2f+hlkyLuCEcsVdm0gA/hYLo0Kzbryqw2OsfCUUHW0V4YPBOj9vMXXEu2/JPB WIHBGZUW1u4pyRWIjqZws6Qn+GchG6GZ8zaRy1MpYL0HdSznI5zWVw98i671fApaKRym nWAYhq6e4bCXXdEb4BcpKLV9msd0xN+/0b5gyfY87G48svAPaGpqcMhLRQxOxj3+6rvC D3lNnWR90NKjtSlO5X4XnO5O8ZYgDKOrHcBxukMIpIA+HUyB9+XwEoDbhmWpHrk0hkfE d9Lg== X-Gm-Message-State: AOAM531vg55Kl5uX5nVxsP/42c2nelBCPxls9H7rw2hHaKesQG0BFM2m rFV6vGMMNFQ62DygTowuzGfyHhduTclOaUUhT4o= X-Google-Smtp-Source: ABdhPJx/ogTTn6NfhMkXQ92VLMz/HOLhtw2qz/mwA6c9pkrSIwOCJG2zfNP7afdC9MvRMTC4ad7jGc+5QoQoIWGkNpE= X-Received: by 2002:adf:f346:: with SMTP id e6mr7295133wrp.28.1626195066164; Tue, 13 Jul 2021 09:51:06 -0700 (PDT) MIME-Version: 1.0 References: <20210712175352.802687-1-daniel.vetter@ffwll.ch> <20210712175352.802687-15-daniel.vetter@ffwll.ch> In-Reply-To: <20210712175352.802687-15-daniel.vetter@ffwll.ch> From: Rob Clark Date: Tue, 13 Jul 2021 09:55:11 -0700 Message-ID: To: Daniel Vetter Subject: Re: [Intel-gfx] [PATCH v4 14/18] drm/msm: Don't break exclusive fence ordering X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: freedreno , linux-arm-msm , Intel Graphics Development , DRI Development , Daniel Vetter , Lucas Stach Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Mon, Jul 12, 2021 at 1:02 PM Daniel Vetter wrote: > > There's only one exclusive slot, and we must not break the ordering. > > Adding a new exclusive fence drops all previous fences from the > dma_resv. To avoid violating the signalling order we err on the side of > over-synchronizing by waiting for the existing fences, even if > userspace asked us to ignore them. > > A better fix would be to us a dma_fence_chain or _array like e.g. > amdgpu now uses, but > - msm has a synchronous dma_fence_wait for anything from another > context, so doesn't seem to care much, > - and it probably makes sense to lift this into dma-resv.c code as a > proper concept, so that drivers don't have to hack up their own > solution each on their own. > > v2: Improve commit message per Lucas' suggestion. > > Cc: Lucas Stach > Signed-off-by: Daniel Vetter > Cc: Rob Clark > Cc: Sean Paul > Cc: linux-arm-msm@vger.kernel.org > Cc: freedreno@lists.freedesktop.org > --- > drivers/gpu/drm/msm/msm_gem_submit.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/msm/msm_gem_submit.c b/drivers/gpu/drm/msm/msm_gem_submit.c > index b71da71a3dd8..edd0051d849f 100644 > --- a/drivers/gpu/drm/msm/msm_gem_submit.c > +++ b/drivers/gpu/drm/msm/msm_gem_submit.c > @@ -306,7 +306,8 @@ static int submit_fence_sync(struct msm_gem_submit *submit, bool no_implicit) > return ret; > } > > - if (no_implicit) > + /* exclusive fences must be ordered */ > + if (no_implicit && !write) > continue; In practice, modern userspace (the kind that is more likely to set the no-implicit flag on every submit) also sets MSM_SUBMIT_BO_WRITE on every bo, to shave some cpu overhead so I suppose this would not really hurt anything Do you know if this is covered in any piglit/etc test? BR, -R > > ret = msm_gem_sync_object(&msm_obj->base, submit->ring->fctx, > -- > 2.32.0 > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx