From mboxrd@z Thu Jan  1 00:00:00 1970
From: Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH 01/13] drm/i915: Flush the context object
 from the CPU caches upon creation
Date: Sat, 14 Jul 2012 14:59:02 +0200
Message-ID: <CAKMK7uERzubJ=p_mxQ7RpO5rQX1adKv0o1Siw7_a3tafSD+CfQ@mail.gmail.com>
References: <1342185256-16024-1-git-send-email-chris@chris-wilson.co.uk>
	<1342185256-16024-2-git-send-email-chris@chris-wilson.co.uk>
	<20120714115858.GB5498@phenom.ffwll.local>
	<1342270150_7607@CP5-2952>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
Return-path: <intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org>
Received: from mail-ob0-f177.google.com (mail-ob0-f177.google.com
	[209.85.214.177])
	by gabe.freedesktop.org (Postfix) with ESMTP id DBEF29E836
	for <intel-gfx@lists.freedesktop.org>;
	Sat, 14 Jul 2012 05:59:02 -0700 (PDT)
Received: by obbta17 with SMTP id ta17so6537776obb.36
	for <intel-gfx@lists.freedesktop.org>;
	Sat, 14 Jul 2012 05:59:02 -0700 (PDT)
In-Reply-To: <1342270150_7607@CP5-2952>
List-Unsubscribe: <http://lists.freedesktop.org/mailman/options/intel-gfx>,
	<mailto:intel-gfx-request@lists.freedesktop.org?subject=unsubscribe>
List-Archive: <http://lists.freedesktop.org/archives/intel-gfx>
List-Post: <mailto:intel-gfx@lists.freedesktop.org>
List-Help: <mailto:intel-gfx-request@lists.freedesktop.org?subject=help>
List-Subscribe: <http://lists.freedesktop.org/mailman/listinfo/intel-gfx>,
	<mailto:intel-gfx-request@lists.freedesktop.org?subject=subscribe>
Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org
Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org, Ben Widawsky <ben@bwidawsk.net>
List-Id: intel-gfx@lists.freedesktop.org

On Sat, Jul 14, 2012 at 2:48 PM, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> On Sat, 14 Jul 2012 13:58:58 +0200, Daniel Vetter <daniel@ffwll.ch> wrote:
>> So afact this first patch here seems to add another instance of the very
>> bug this patch series tries squash ... Additionally I'm still hunting for
>> that other failure case, which can't be fixed by adding the flush in
>> execbuffer if ring->gpu_caches_dirty is set.
>>
>> /me is still lost
>
> Now all that you are missing is that we only flush GPU_DOMAINS when on
> the gpu_write_list.

Hm, I guess we've seen that one before ;-) But that would require that
we add an object with a non-gpu write domain to the active list, but
both with or without this patch I don't see how that should happen ...

I guess a WARN in move_to_active won't hurt (and we should have done
that when fixing the GTT_DOMAIN relocation hole in execbuf), but
besides that I'm still as dense as ever, it seems.
-Daniel
-- 
Daniel Vetter
daniel.vetter@ffwll.ch - +41 (0) 79 364 57 48 - http://blog.ffwll.ch