From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Lutomirski Subject: Re: [PATCH] drm/i915: Revert i915.semaphore=1 default from 47ae63e0 Date: Wed, 31 Aug 2011 14:30:00 -0400 Message-ID: References: <87ipsiglms.fsf@eliezer.anholt.net> <20110822095311.5c3d7a34@jbarnes-desktop> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2077867955==" Return-path: Received: from mail-pz0-f44.google.com (mail-pz0-f44.google.com [209.85.210.44]) by gabe.freedesktop.org (Postfix) with ESMTP id 2B64D9E710 for ; Wed, 31 Aug 2011 11:30:01 -0700 (PDT) Received: by pzk36 with SMTP id 36so1779792pzk.3 for ; Wed, 31 Aug 2011 11:30:01 -0700 (PDT) In-Reply-To: <20110822095311.5c3d7a34@jbarnes-desktop> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Jesse Barnes Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============2077867955== Content-Type: multipart/alternative; boundary=bcaec5215d3feb274d04abd15083 --bcaec5215d3feb274d04abd15083 Content-Type: text/plain; charset=ISO-8859-1 On Mon, Aug 22, 2011 at 12:53 PM, Jesse Barnes wrote: > On Fri, 10 Jun 2011 10:06:39 -0400 > Andrew Lutomirski wrote: > >> On Tue, Jun 7, 2011 at 3:12 AM, Eric Anholt wrote: >> > I fear this bug is just "getting more asynchronous with the GPU means we >> > trigger race conditions on the GPU more easily." On that note, could >> > you retest with Mesa as of this commit, since I'm told this is a GT1 CPU: >> > >> > commit ef59049c5242a1be7fa59a182d342191185dd62b >> > Author: Eric Anholt >> > Date: Sun Jun 5 23:20:57 2011 -0700 >> > >> > i965: Fix flipped GT1 vs GT2 URB VS entry count limits. >> > >> >> Nope -- I still got the reset-button-not-working hang. >> >> I'm pretty sure I installed mesa right -- I moved everything in >> /usr/lib64/dri out of the way and put the files in mesa/lib/ in there. > > Andrew, what's the latest with this? Are you still seeing problems > when semaphores are enabled? Yes. On the latest -rc, the system still freezes hard when mutter starts up if I set i915.semaphores=1. [I typed this email last week but apparently it got stuck as a draft. Sorry.] --Andy --bcaec5215d3feb274d04abd15083 Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable

On Mon, Aug 22, 2011 at 12:53 PM, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> On Fri, 10 Jun 2011 10:06:39 -0400
> Andrew Lutomirski <luto@mit.edu= > wrote:
>
>> On Tue, Jun 7, 2011 at 3:12 AM, Eric Anholt <eric@anholt.net> wrote:
>> > I fear this bug is just "getting more asynchronous with = the GPU means we
>> > trigger race conditions on the GPU more easily." =A0On t= hat note, could
>> > you retest with Mesa as of this commit, since I'm told th= is is a GT1 CPU:
>> >
>> > commit ef59049c5242a1be7fa59a182d342191185dd62b
>> > Author: Eric Anholt <er= ic@anholt.net>
>> > Date: =A0 Sun Jun 5 23:20:57 2011 -0700
>> >
>> > =A0 =A0i965: Fix flipped GT1 vs GT2 URB VS entry count limits= .
>> >
>>
>> Nope -- I still got the reset-button-not-working hang.
>>
>> I'm pretty sure I installed mesa right -- I moved everything i= n
>> /usr/lib64/dri out of the way and put the files in mesa/lib/ in th= ere.
>
> Andrew, what's the latest with this? =A0Are you still seeing probl= ems
> when semaphores are enabled?

Yes. On the latest -rc, the system still freezes hard when mutter starts= up if I set i915.semaphores=3D1.

[I typed this email last week but apparently it got stuck as a draft.=A0= Sorry.]

--Andy

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