* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dp/mst : Get clock rate from sink's available PBN
2020-01-06 17:41 [Intel-gfx] [PATCH] drm/i915/dp/mst : Get clock rate from sink's available PBN Lee Shawn C
@ 2020-01-06 9:54 ` Patchwork
2020-01-06 10:22 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
` (10 subsequent siblings)
11 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2020-01-06 9:54 UTC (permalink / raw)
To: Lee Shawn C; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/dp/mst : Get clock rate from sink's available PBN
URL : https://patchwork.freedesktop.org/series/71647/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
aead470c8162 drm/i915/dp/mst : Get clock rate from sink's available PBN
-:48: WARNING:LONG_LINE: line over 100 characters
#48: FILE: drivers/gpu/drm/i915/display/intel_dp_mst.c:564:
+ clock_rate = ((u64)port->available_pbn * (54 * 8 * 1000 * 1000)) / (64 * 1006);
total: 0 errors, 1 warnings, 0 checks, 45 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp/mst : Get clock rate from sink's available PBN
2020-01-06 17:41 [Intel-gfx] [PATCH] drm/i915/dp/mst : Get clock rate from sink's available PBN Lee Shawn C
2020-01-06 9:54 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
@ 2020-01-06 10:22 ` Patchwork
2020-01-06 10:22 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
` (9 subsequent siblings)
11 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2020-01-06 10:22 UTC (permalink / raw)
To: Lee Shawn C; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/dp/mst : Get clock rate from sink's available PBN
URL : https://patchwork.freedesktop.org/series/71647/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7680 -> Patchwork_15998
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_15998:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_setmode@basic-clone-single-crtc:
- {fi-kbl-7560u}: NOTRUN -> [WARN][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/fi-kbl-7560u/igt@kms_setmode@basic-clone-single-crtc.html
Known issues
------------
Here are the changes found in Patchwork_15998 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_module_load@reload-with-fault-injection:
- fi-cfl-guc: [PASS][2] -> [INCOMPLETE][3] ([i915#505] / [i915#671])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/fi-cfl-guc/igt@i915_module_load@reload-with-fault-injection.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/fi-cfl-guc/igt@i915_module_load@reload-with-fault-injection.html
- fi-cfl-8700k: [PASS][4] -> [INCOMPLETE][5] ([i915#505])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/fi-cfl-8700k/igt@i915_module_load@reload-with-fault-injection.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/fi-cfl-8700k/igt@i915_module_load@reload-with-fault-injection.html
- fi-skl-6700k2: [PASS][6] -> [INCOMPLETE][7] ([i915#671])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/fi-skl-6700k2/igt@i915_module_load@reload-with-fault-injection.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/fi-skl-6700k2/igt@i915_module_load@reload-with-fault-injection.html
- fi-skl-6770hq: [PASS][8] -> [DMESG-WARN][9] ([i915#889])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/fi-skl-6770hq/igt@i915_module_load@reload-with-fault-injection.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/fi-skl-6770hq/igt@i915_module_load@reload-with-fault-injection.html
* igt@i915_pm_rpm@module-reload:
- fi-skl-6770hq: [PASS][10] -> [INCOMPLETE][11] ([i915#151])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
* igt@i915_selftest@live_gem_contexts:
- fi-hsw-peppy: [PASS][12] -> [DMESG-FAIL][13] ([i915#761])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/fi-hsw-peppy/igt@i915_selftest@live_gem_contexts.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/fi-hsw-peppy/igt@i915_selftest@live_gem_contexts.html
* igt@i915_selftest@live_mman:
- fi-bxt-dsi: [PASS][14] -> [DMESG-WARN][15] ([i915#889]) +23 similar issues
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/fi-bxt-dsi/igt@i915_selftest@live_mman.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/fi-bxt-dsi/igt@i915_selftest@live_mman.html
* igt@i915_selftest@live_reset:
- fi-bxt-dsi: [PASS][16] -> [DMESG-FAIL][17] ([i915#889]) +7 similar issues
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/fi-bxt-dsi/igt@i915_selftest@live_reset.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/fi-bxt-dsi/igt@i915_selftest@live_reset.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][18] -> [FAIL][19] ([fdo#111096] / [i915#323])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy: [PASS][20] -> [DMESG-WARN][21] ([i915#44])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html
#### Possible fixes ####
* igt@gem_close_race@basic-threads:
- fi-byt-j1900: [TIMEOUT][22] ([i915#816]) -> [PASS][23]
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/fi-byt-j1900/igt@gem_close_race@basic-threads.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/fi-byt-j1900/igt@gem_close_race@basic-threads.html
* igt@i915_module_load@reload-with-fault-injection:
- fi-skl-lmem: [INCOMPLETE][24] ([i915#671]) -> [PASS][25]
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/fi-skl-lmem/igt@i915_module_load@reload-with-fault-injection.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/fi-skl-lmem/igt@i915_module_load@reload-with-fault-injection.html
* igt@i915_selftest@live_active:
- fi-icl-y: [DMESG-FAIL][26] ([i915#765]) -> [PASS][27]
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/fi-icl-y/igt@i915_selftest@live_active.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/fi-icl-y/igt@i915_selftest@live_active.html
* igt@i915_selftest@live_blt:
- fi-ivb-3770: [DMESG-FAIL][28] ([i915#725]) -> [PASS][29]
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/fi-ivb-3770/igt@i915_selftest@live_blt.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/fi-ivb-3770/igt@i915_selftest@live_blt.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
[i915#151]: https://gitlab.freedesktop.org/drm/intel/issues/151
[i915#323]: https://gitlab.freedesktop.org/drm/intel/issues/323
[i915#44]: https://gitlab.freedesktop.org/drm/intel/issues/44
[i915#505]: https://gitlab.freedesktop.org/drm/intel/issues/505
[i915#671]: https://gitlab.freedesktop.org/drm/intel/issues/671
[i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
[i915#761]: https://gitlab.freedesktop.org/drm/intel/issues/761
[i915#765]: https://gitlab.freedesktop.org/drm/intel/issues/765
[i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816
[i915#889]: https://gitlab.freedesktop.org/drm/intel/issues/889
Participating hosts (43 -> 41)
------------------------------
Additional (6): fi-bdw-gvtdvm fi-glk-dsi fi-ilk-650 fi-cfl-8109u fi-kbl-7560u fi-skl-6600u
Missing (8): fi-hsw-4770r fi-byt-squawks fi-bsw-cyan fi-kbl-guc fi-ctg-p8600 fi-byt-n2820 fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7680 -> Patchwork_15998
CI-20190529: 20190529
CI_DRM_7680: b70a5ffaee3192a3d21296a6d68f4a1b4f4cecd5 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5357: a555a4b98f90dab655d24bb3d07e9291a8b8dac8 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_15998: aead470c8162bad96ba015b057f6dc9f1217750c @ git://anongit.freedesktop.org/gfx-ci/linux
== Kernel 32bit build ==
Warning: Kernel 32bit buildtest failed:
https://intel-gfx-ci.01.org/Patchwork_15998/build_32bit.log
CALL scripts/checksyscalls.sh
CALL scripts/atomic/check-atomics.sh
CHK include/generated/compile.h
Kernel: arch/x86/boot/bzImage is ready (#1)
Building modules, stage 2.
MODPOST 121 modules
ERROR: "__udivdi3" [drivers/gpu/drm/i915/i915.ko] undefined!
ERROR: "__divdi3" [drivers/gpu/drm/i915/i915.ko] undefined!
scripts/Makefile.modpost:93: recipe for target '__modpost' failed
make[1]: *** [__modpost] Error 1
Makefile:1282: recipe for target 'modules' failed
make: *** [modules] Error 2
== Linux commits ==
aead470c8162 drm/i915/dp/mst : Get clock rate from sink's available PBN
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BUILD: warning for drm/i915/dp/mst : Get clock rate from sink's available PBN
2020-01-06 17:41 [Intel-gfx] [PATCH] drm/i915/dp/mst : Get clock rate from sink's available PBN Lee Shawn C
2020-01-06 9:54 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2020-01-06 10:22 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2020-01-06 10:22 ` Patchwork
2020-01-06 11:54 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
` (8 subsequent siblings)
11 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2020-01-06 10:22 UTC (permalink / raw)
To: Lee Shawn C; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/dp/mst : Get clock rate from sink's available PBN
URL : https://patchwork.freedesktop.org/series/71647/
State : warning
== Summary ==
CALL scripts/checksyscalls.sh
CALL scripts/atomic/check-atomics.sh
CHK include/generated/compile.h
Kernel: arch/x86/boot/bzImage is ready (#1)
Building modules, stage 2.
MODPOST 121 modules
ERROR: "__udivdi3" [drivers/gpu/drm/i915/i915.ko] undefined!
ERROR: "__divdi3" [drivers/gpu/drm/i915/i915.ko] undefined!
scripts/Makefile.modpost:93: recipe for target '__modpost' failed
make[1]: *** [__modpost] Error 1
Makefile:1282: recipe for target 'modules' failed
make: *** [modules] Error 2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/build_32bit.log
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/dp/mst : Get clock rate from sink's available PBN
2020-01-06 17:41 [Intel-gfx] [PATCH] drm/i915/dp/mst : Get clock rate from sink's available PBN Lee Shawn C
` (2 preceding siblings ...)
2020-01-06 10:22 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
@ 2020-01-06 11:54 ` Patchwork
2020-01-06 14:48 ` [Intel-gfx] [PATCH] " kbuild test robot
` (7 subsequent siblings)
11 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2020-01-06 11:54 UTC (permalink / raw)
To: Lee Shawn C; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/dp/mst : Get clock rate from sink's available PBN
URL : https://patchwork.freedesktop.org/series/71647/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7680_full -> Patchwork_15998_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_15998_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_15998_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_15998_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_create@create-clear:
- shard-tglb: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-tglb3/igt@gem_create@create-clear.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-tglb8/igt@gem_create@create-clear.html
New tests
---------
New tests have been introduced between CI_DRM_7680_full and Patchwork_15998_full:
### New Piglit tests (5) ###
* spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-int_ivec2_array3-double_dvec2_array2-position:
- Statuses : 1 fail(s)
- Exec time: [0.15] s
* spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-position-double_dvec2-uint_uint:
- Statuses : 1 fail(s)
- Exec time: [0.13] s
* spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-position-double_dvec3_array5-float_mat3x2:
- Statuses : 1 fail(s)
- Exec time: [0.14] s
* spec@glsl-4.20@execution@vs_in@vs-input-double_dmat2x4_array3-position-double_double_array2:
- Statuses : 1 fail(s)
- Exec time: [0.13] s
* spec@glsl-4.20@execution@vs_in@vs-input-uint_uvec3-double_dmat4x2_array2-position:
- Statuses : 1 fail(s)
- Exec time: [0.20] s
Known issues
------------
Here are the changes found in Patchwork_15998_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_persistence@bcs0-mixed-process:
- shard-apl: [PASS][3] -> [FAIL][4] ([i915#679])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-apl2/igt@gem_ctx_persistence@bcs0-mixed-process.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-apl2/igt@gem_ctx_persistence@bcs0-mixed-process.html
* igt@gem_ctx_persistence@vcs1-queued:
- shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#109276] / [fdo#112080]) +2 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-iclb4/igt@gem_ctx_persistence@vcs1-queued.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-iclb8/igt@gem_ctx_persistence@vcs1-queued.html
* igt@gem_exec_await@wide-contexts:
- shard-tglb: [PASS][7] -> [INCOMPLETE][8] ([fdo#111736])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-tglb6/igt@gem_exec_await@wide-contexts.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-tglb3/igt@gem_exec_await@wide-contexts.html
* igt@gem_exec_balancer@bonded-slice:
- shard-tglb: [PASS][9] -> [INCOMPLETE][10] ([i915#751])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-tglb2/igt@gem_exec_balancer@bonded-slice.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-tglb2/igt@gem_exec_balancer@bonded-slice.html
* igt@gem_exec_balancer@smoke:
- shard-iclb: [PASS][11] -> [SKIP][12] ([fdo#110854])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-iclb4/igt@gem_exec_balancer@smoke.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-iclb7/igt@gem_exec_balancer@smoke.html
* igt@gem_exec_schedule@in-order-bsd:
- shard-iclb: [PASS][13] -> [SKIP][14] ([fdo#112146]) +4 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-iclb7/igt@gem_exec_schedule@in-order-bsd.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-iclb2/igt@gem_exec_schedule@in-order-bsd.html
* igt@gem_exec_schedule@preempt-contexts-bsd2:
- shard-iclb: [PASS][15] -> [SKIP][16] ([fdo#109276]) +11 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-iclb2/igt@gem_exec_schedule@preempt-contexts-bsd2.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-iclb6/igt@gem_exec_schedule@preempt-contexts-bsd2.html
* igt@gem_exec_schedule@preempt-queue-chain-bsd1:
- shard-tglb: [PASS][17] -> [INCOMPLETE][18] ([fdo#111606] / [fdo#111677]) +1 similar issue
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-tglb9/igt@gem_exec_schedule@preempt-queue-chain-bsd1.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-tglb3/igt@gem_exec_schedule@preempt-queue-chain-bsd1.html
* igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing:
- shard-tglb: [PASS][19] -> [TIMEOUT][20] ([fdo#112126] / [i915#530])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-tglb1/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-tglb7/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
* igt@i915_selftest@live_execlists:
- shard-skl: [PASS][21] -> [DMESG-FAIL][22] ([i915#656])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-skl8/igt@i915_selftest@live_execlists.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-skl10/igt@i915_selftest@live_execlists.html
* igt@kms_color@pipe-a-ctm-red-to-blue:
- shard-skl: [PASS][23] -> [DMESG-WARN][24] ([i915#109]) +1 similar issue
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-skl9/igt@kms_color@pipe-a-ctm-red-to-blue.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-skl2/igt@kms_color@pipe-a-ctm-red-to-blue.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-kbl: [PASS][25] -> [DMESG-WARN][26] ([i915#180]) +2 similar issues
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-suspend.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw:
- shard-tglb: [PASS][27] -> [FAIL][28] ([i915#49]) +3 similar issues
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-tglb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-tglb9/igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
- shard-apl: [PASS][29] -> [DMESG-WARN][30] ([i915#180]) +2 similar issues
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-apl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-apl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: [PASS][31] -> [FAIL][32] ([fdo#108145]) +1 similar issue
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-skl2/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
* igt@kms_psr@psr2_primary_mmap_cpu:
- shard-iclb: [PASS][33] -> [SKIP][34] ([fdo#109441]) +2 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-iclb6/igt@kms_psr@psr2_primary_mmap_cpu.html
* igt@perf_pmu@busy-check-all-vcs1:
- shard-iclb: [PASS][35] -> [SKIP][36] ([fdo#112080]) +9 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-iclb4/igt@perf_pmu@busy-check-all-vcs1.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-iclb7/igt@perf_pmu@busy-check-all-vcs1.html
#### Possible fixes ####
* igt@gem_busy@busy-vcs1:
- shard-iclb: [SKIP][37] ([fdo#112080]) -> [PASS][38] +8 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-iclb6/igt@gem_busy@busy-vcs1.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-iclb1/igt@gem_busy@busy-vcs1.html
* igt@gem_ctx_isolation@rcs0-s3:
- shard-kbl: [DMESG-WARN][39] ([i915#180]) -> [PASS][40] +9 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-kbl6/igt@gem_ctx_isolation@rcs0-s3.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-kbl1/igt@gem_ctx_isolation@rcs0-s3.html
- shard-iclb: [DMESG-WARN][41] ([fdo#111764]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-iclb5/igt@gem_ctx_isolation@rcs0-s3.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-iclb1/igt@gem_ctx_isolation@rcs0-s3.html
* igt@gem_ctx_isolation@vcs1-clean:
- shard-iclb: [SKIP][43] ([fdo#109276] / [fdo#112080]) -> [PASS][44] +3 similar issues
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-iclb6/igt@gem_ctx_isolation@vcs1-clean.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-iclb1/igt@gem_ctx_isolation@vcs1-clean.html
* igt@gem_ctx_persistence@rcs0-mixed-process:
- shard-apl: [FAIL][45] ([i915#679]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-apl4/igt@gem_ctx_persistence@rcs0-mixed-process.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-apl2/igt@gem_ctx_persistence@rcs0-mixed-process.html
* igt@gem_ctx_shared@q-smoketest-vebox:
- shard-tglb: [INCOMPLETE][47] ([fdo#111735]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-tglb9/igt@gem_ctx_shared@q-smoketest-vebox.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-tglb8/igt@gem_ctx_shared@q-smoketest-vebox.html
* igt@gem_eio@kms:
- shard-tglb: [INCOMPLETE][49] ([i915#476]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-tglb6/igt@gem_eio@kms.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-tglb5/igt@gem_eio@kms.html
* igt@gem_eio@reset-stress:
- shard-snb: [FAIL][51] ([i915#232]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-snb6/igt@gem_eio@reset-stress.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-snb7/igt@gem_eio@reset-stress.html
* igt@gem_exec_schedule@independent-bsd2:
- shard-iclb: [SKIP][53] ([fdo#109276]) -> [PASS][54] +15 similar issues
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-iclb5/igt@gem_exec_schedule@independent-bsd2.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-iclb1/igt@gem_exec_schedule@independent-bsd2.html
* {igt@gem_exec_schedule@pi-common-bsd}:
- shard-iclb: [SKIP][55] ([i915#677]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-iclb2/igt@gem_exec_schedule@pi-common-bsd.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-iclb6/igt@gem_exec_schedule@pi-common-bsd.html
* igt@gem_exec_schedule@preempt-other-chain-bsd:
- shard-iclb: [SKIP][57] ([fdo#112146]) -> [PASS][58] +6 similar issues
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-iclb4/igt@gem_exec_schedule@preempt-other-chain-bsd.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-iclb8/igt@gem_exec_schedule@preempt-other-chain-bsd.html
* igt@i915_selftest@live_gt_timelines:
- shard-tglb: [INCOMPLETE][59] ([i915#455]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-tglb1/igt@i915_selftest@live_gt_timelines.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-tglb2/igt@i915_selftest@live_gt_timelines.html
* igt@kms_color@pipe-a-ctm-0-75:
- shard-skl: [DMESG-WARN][61] ([i915#109]) -> [PASS][62] +1 similar issue
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-skl1/igt@kms_color@pipe-a-ctm-0-75.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-skl4/igt@kms_color@pipe-a-ctm-0-75.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic:
- shard-skl: [FAIL][63] ([IGT#5]) -> [PASS][64]
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-skl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-skl9/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt:
- shard-tglb: [FAIL][65] ([i915#49]) -> [PASS][66] +2 similar issues
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-tglb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-tglb7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt.html
* igt@kms_psr2_su@page_flip:
- shard-iclb: [SKIP][67] ([fdo#109642] / [fdo#111068]) -> [PASS][68]
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-iclb7/igt@kms_psr2_su@page_flip.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-iclb2/igt@kms_psr2_su@page_flip.html
* igt@kms_setmode@basic:
- shard-apl: [FAIL][69] ([i915#31]) -> [PASS][70]
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-apl2/igt@kms_setmode@basic.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-apl4/igt@kms_setmode@basic.html
#### Warnings ####
* igt@gem_ctx_isolation@vcs1-nonpriv-switch:
- shard-iclb: [FAIL][71] ([IGT#28]) -> [SKIP][72] ([fdo#109276] / [fdo#112080])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-iclb2/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-iclb6/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html
* igt@gem_ctx_isolation@vcs2-dirty-create:
- shard-tglb: [SKIP][73] ([fdo#112080]) -> [SKIP][74] ([fdo#111912] / [fdo#112080])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-tglb9/igt@gem_ctx_isolation@vcs2-dirty-create.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-tglb1/igt@gem_ctx_isolation@vcs2-dirty-create.html
* igt@kms_atomic_transition@6x-modeset-transitions:
- shard-tglb: [SKIP][75] ([fdo#112021]) -> [SKIP][76] ([fdo#112016] / [fdo#112021])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-tglb9/igt@kms_atomic_transition@6x-modeset-transitions.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-tglb8/igt@kms_atomic_transition@6x-modeset-transitions.html
* igt@kms_cursor_crc@pipe-a-cursor-suspend:
- shard-kbl: [DMESG-FAIL][77] ([i915#180] / [i915#54]) -> [FAIL][78] ([i915#54])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7680/shard-kbl6/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/shard-kbl6/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28
[IGT#5]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/5
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111606]: https://bugs.freedesktop.org/show_bug.cgi?id=111606
[fdo#111677]: https://bugs.freedesktop.org/show_bug.cgi?id=111677
[fdo#111735]: https://bugs.freedesktop.org/show_bug.cgi?id=111735
[fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736
[fdo#111764]: https://bugs.freedesktop.org/show_bug.cgi?id=111764
[fdo#111912]: https://bugs.freedesktop.org/show_bug.cgi?id=111912
[fdo#112016]: https://bugs.freedesktop.org/show_bug.cgi?id=112016
[fdo#112021]: https://bugs.freedesktop.org/show_bug.cgi?id=112021
[fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
[fdo#112126]: https://bugs.freedesktop.org/show_bug.cgi?id=112126
[fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
[i915#109]: https://gitlab.freedesktop.org/drm/intel/issues/109
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#232]: https://gitlab.freedesktop.org/drm/intel/issues/232
[i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
[i915#455]: https://gitlab.freedesktop.org/drm/intel/issues/455
[i915#476]: https://gitlab.freedesktop.org/drm/intel/issues/476
[i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
[i915#530]: https://gitlab.freedesktop.org/drm/intel/issues/530
[i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
[i915#656]: https://gitlab.freedesktop.org/drm/intel/issues/656
[i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
[i915#679]: https://gitlab.freedesktop.org/drm/intel/issues/679
[i915#751]: https://gitlab.freedesktop.org/drm/intel/issues/751
Participating hosts (10 -> 11)
------------------------------
Additional (1): pig-hsw-4770r
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7680 -> Patchwork_15998
CI-20190529: 20190529
CI_DRM_7680: b70a5ffaee3192a3d21296a6d68f4a1b4f4cecd5 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5357: a555a4b98f90dab655d24bb3d07e9291a8b8dac8 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_15998: aead470c8162bad96ba015b057f6dc9f1217750c @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15998/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/dp/mst : Get clock rate from sink's available PBN
2020-01-06 17:41 [Intel-gfx] [PATCH] drm/i915/dp/mst : Get clock rate from sink's available PBN Lee Shawn C
` (3 preceding siblings ...)
2020-01-06 11:54 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2020-01-06 14:48 ` kbuild test robot
2020-01-08 15:15 ` Ville Syrjälä
` (6 subsequent siblings)
11 siblings, 0 replies; 16+ messages in thread
From: kbuild test robot @ 2020-01-06 14:48 UTC (permalink / raw)
To: Lee Shawn C; +Cc: Cooper Chiou, intel-gfx, kbuild-all
[-- Attachment #1: Type: text/plain, Size: 1231 bytes --]
Hi Lee,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v5.5-rc5 next-20200106]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/Lee-Shawn-C/drm-i915-dp-mst-Get-clock-rate-from-sink-s-available-PBN/20200106-190912
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-defconfig (attached as .config)
compiler: gcc-7 (Debian 7.5.0-3) 7.5.0
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
ld: drivers/gpu/drm/i915/display/intel_dp_mst.o: in function `intel_dp_mst_mode_valid':
>> intel_dp_mst.c:(.text+0x385): undefined reference to `__udivdi3'
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 28356 bytes --]
[-- Attachment #3: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] [PATCH] drm/i915/dp/mst : Get clock rate from sink's available PBN
@ 2020-01-06 17:41 Lee Shawn C
2020-01-06 9:54 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
` (11 more replies)
0 siblings, 12 replies; 16+ messages in thread
From: Lee Shawn C @ 2020-01-06 17:41 UTC (permalink / raw)
To: intel-gfx; +Cc: Cooper Chiou
Driver report physcial bandwidth for max dot clock rate.
It would caused compatibility issue sometimes when physical
bandwidth exceed MST hub output ability.
For example, here is a MST hub with HDMI 1.4 and DP 1.2 output.
And source have DP 1.2 output capability. Connect a HDMI 2.0
display then source will retrieve EDID from external monitor.
Driver got max resolution was 4k@60fps. DP 1.2 can support
this resolution because it did not surpass max physical bandwidth.
After modeset, source output display data but MST hub can't
output HDMI properly due to it already over HDMI 1.4 spec.
Apply this calculation, source calcualte max dot clock according
to available PBN. Driver will remove the mode that over current
clock rate. And external display can works normally.
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Cooper Chiou <cooper.chiou@intel.com>
Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 27 ++++++++++++++++++---
1 file changed, 24 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 3b066c63816d..eaa440165ad2 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -550,6 +550,27 @@ static int intel_dp_mst_get_modes(struct drm_connector *connector)
return intel_dp_mst_get_ddc_modes(connector);
}
+static int
+intel_dp_mst_downstream_max_dotclock(struct drm_connector *connector)
+{
+ struct intel_connector *intel_connector = to_intel_connector(connector);
+ struct intel_dp *intel_dp = intel_connector->mst_port;
+ struct drm_dp_mst_port *port;
+ u64 clock_rate = 0;
+
+ if (intel_dp->mst_mgr.mst_primary)
+ list_for_each_entry(port, &intel_dp->mst_mgr.mst_primary->ports, next)
+ if (port->connector == connector) {
+ clock_rate = ((u64)port->available_pbn * (54 * 8 * 1000 * 1000)) / (64 * 1006);
+
+ // FIXME: We should used pipe bpp to do this calculation.
+ // But can't retrieve bpp setting from drm_connector.
+ return (int)(clock_rate / 24);
+ }
+
+ return to_i915(connector->dev)->max_dotclk_freq;
+}
+
static enum drm_mode_status
intel_dp_mst_mode_valid(struct drm_connector *connector,
struct drm_display_mode *mode)
@@ -557,8 +578,7 @@ intel_dp_mst_mode_valid(struct drm_connector *connector,
struct drm_i915_private *dev_priv = to_i915(connector->dev);
struct intel_connector *intel_connector = to_intel_connector(connector);
struct intel_dp *intel_dp = intel_connector->mst_port;
- int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
- int max_rate, mode_rate, max_lanes, max_link_clock;
+ int max_rate, mode_rate, max_lanes, max_link_clock, max_dotclk;
if (drm_connector_is_unregistered(connector))
return MODE_ERROR;
@@ -572,7 +592,8 @@ intel_dp_mst_mode_valid(struct drm_connector *connector,
max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
mode_rate = intel_dp_link_required(mode->clock, 18);
- /* TODO - validate mode against available PBN for link */
+ max_dotclk = intel_dp_mst_downstream_max_dotclock(connector);
+
if (mode->clock < 10000)
return MODE_CLOCK_LOW;
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/dp/mst : Get clock rate from sink's available PBN
2020-01-06 17:41 [Intel-gfx] [PATCH] drm/i915/dp/mst : Get clock rate from sink's available PBN Lee Shawn C
` (4 preceding siblings ...)
2020-01-06 14:48 ` [Intel-gfx] [PATCH] " kbuild test robot
@ 2020-01-08 15:15 ` Ville Syrjälä
2020-01-09 3:11 ` Lee, Shawn C
2020-02-05 5:56 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dp/mst : Get clock rate from sink's available PBN (rev2) Patchwork
` (5 subsequent siblings)
11 siblings, 1 reply; 16+ messages in thread
From: Ville Syrjälä @ 2020-01-08 15:15 UTC (permalink / raw)
To: Lee Shawn C; +Cc: Cooper Chiou, intel-gfx
On Tue, Jan 07, 2020 at 01:41:56AM +0800, Lee Shawn C wrote:
> Driver report physcial bandwidth for max dot clock rate.
> It would caused compatibility issue sometimes when physical
> bandwidth exceed MST hub output ability.
>
> For example, here is a MST hub with HDMI 1.4 and DP 1.2 output.
> And source have DP 1.2 output capability. Connect a HDMI 2.0
> display then source will retrieve EDID from external monitor.
> Driver got max resolution was 4k@60fps. DP 1.2 can support
> this resolution because it did not surpass max physical bandwidth.
> After modeset, source output display data but MST hub can't
> output HDMI properly due to it already over HDMI 1.4 spec.
>
> Apply this calculation, source calcualte max dot clock according
> to available PBN. Driver will remove the mode that over current
> clock rate. And external display can works normally.
>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Cc: Cooper Chiou <cooper.chiou@intel.com>
>
> Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 27 ++++++++++++++++++---
> 1 file changed, 24 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 3b066c63816d..eaa440165ad2 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -550,6 +550,27 @@ static int intel_dp_mst_get_modes(struct drm_connector *connector)
> return intel_dp_mst_get_ddc_modes(connector);
> }
>
> +static int
> +intel_dp_mst_downstream_max_dotclock(struct drm_connector *connector)
> +{
> + struct intel_connector *intel_connector = to_intel_connector(connector);
> + struct intel_dp *intel_dp = intel_connector->mst_port;
> + struct drm_dp_mst_port *port;
> + u64 clock_rate = 0;
> +
> + if (intel_dp->mst_mgr.mst_primary)
> + list_for_each_entry(port, &intel_dp->mst_mgr.mst_primary->ports, next)
> + if (port->connector == connector) {
> + clock_rate = ((u64)port->available_pbn * (54 * 8 * 1000 * 1000)) / (64 * 1006);
IIRC avaible pbn is soime kind of dynamic "how much bw we have left
currently" so we don't want to use it for this purpose. If we really
wanted to do this we'd have to refilter the modelist and generate
hotplugs whenever the bw allocations change.
In the current design what should happens is that we check that we
have enough bw when doing the modeset, and if that fails userspace
is supposed to handle the situation in some graceful manner.
Also locking totally missing.
So nak.
> +
> + // FIXME: We should used pipe bpp to do this calculation.
> + // But can't retrieve bpp setting from drm_connector.
> + return (int)(clock_rate / 24);
> + }
> +
> + return to_i915(connector->dev)->max_dotclk_freq;
> +}
> +
> static enum drm_mode_status
> intel_dp_mst_mode_valid(struct drm_connector *connector,
> struct drm_display_mode *mode)
> @@ -557,8 +578,7 @@ intel_dp_mst_mode_valid(struct drm_connector *connector,
> struct drm_i915_private *dev_priv = to_i915(connector->dev);
> struct intel_connector *intel_connector = to_intel_connector(connector);
> struct intel_dp *intel_dp = intel_connector->mst_port;
> - int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
> - int max_rate, mode_rate, max_lanes, max_link_clock;
> + int max_rate, mode_rate, max_lanes, max_link_clock, max_dotclk;
>
> if (drm_connector_is_unregistered(connector))
> return MODE_ERROR;
> @@ -572,7 +592,8 @@ intel_dp_mst_mode_valid(struct drm_connector *connector,
> max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
> mode_rate = intel_dp_link_required(mode->clock, 18);
>
> - /* TODO - validate mode against available PBN for link */
> + max_dotclk = intel_dp_mst_downstream_max_dotclock(connector);
> +
> if (mode->clock < 10000)
> return MODE_CLOCK_LOW;
>
> --
> 2.17.1
--
Ville Syrjälä
Intel
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/dp/mst : Get clock rate from sink's available PBN
2020-01-08 15:15 ` Ville Syrjälä
@ 2020-01-09 3:11 ` Lee, Shawn C
0 siblings, 0 replies; 16+ messages in thread
From: Lee, Shawn C @ 2020-01-09 3:11 UTC (permalink / raw)
To: intel-gfx; +Cc: Chiou, Cooper
On Jan. 8, 2020, 3:15 p.m, Ville Syrjala wrote:
>On Tue, Jan 07, 2020 at 01:41:56AM +0800, Lee Shawn C wrote:
>> Driver report physcial bandwidth for max dot clock rate.
>> It would caused compatibility issue sometimes when physical
>> bandwidth exceed MST hub output ability.
>>
>> For example, here is a MST hub with HDMI 1.4 and DP 1.2 output.
>> And source have DP 1.2 output capability. Connect a HDMI 2.0
>> display then source will retrieve EDID from external monitor.
>> Driver got max resolution was 4k@60fps. DP 1.2 can support
>> this resolution because it did not surpass max physical bandwidth.
>> After modeset, source output display data but MST hub can't
>> output HDMI properly due to it already over HDMI 1.4 spec.
>>
>> Apply this calculation, source calcualte max dot clock according
>> to available PBN. Driver will remove the mode that over current
>> clock rate. And external display can works normally.
>>
>> Cc: Manasi Navare <manasi.d.navare@intel.com>
>> Cc: Jani Nikula <jani.nikula@linux.intel.com>
>> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
>> Cc: Cooper Chiou <cooper.chiou@intel.com>
>>
>> Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_dp_mst.c | 27 ++++++++++++++++++---
>> 1 file changed, 24 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
>> index 3b066c63816d..eaa440165ad2 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
>> @@ -550,6 +550,27 @@ static int intel_dp_mst_get_modes(struct drm_connector *connector)
>> return intel_dp_mst_get_ddc_modes(connector);
>> }
>>
>> +static int
>> +intel_dp_mst_downstream_max_dotclock(struct drm_connector *connector)
>> +{
>> + struct intel_connector *intel_connector = to_intel_connector(connector);
>> + struct intel_dp *intel_dp = intel_connector->mst_port;
>> + struct drm_dp_mst_port *port;
>> + u64 clock_rate = 0;
>> +
>> + if (intel_dp->mst_mgr.mst_primary)
>> + list_for_each_entry(port, &intel_dp->mst_mgr.mst_primary->ports, next)
>> + if (port->connector == connector) {
>> + clock_rate = ((u64)port->available_pbn * (54 * 8 * 1000 * 1000)) / (64 * 1006);
>
>IIRC avaible pbn is soime kind of dynamic "how much bw we have left
>currently" so we don't want to use it for this purpose. If we really
>wanted to do this we'd have to refilter the modelist and generate
>hotplugs whenever the bw allocations change.
>
>In the current design what should happens is that we check that we
>have enough bw when doing the modeset, and if that fails userspace
>is supposed to handle the situation in some graceful manner.
>
>Also locking totally missing.
>
>So nak.
>
Thanks for comments! In my opinion, branch device (MST hub) would tell
source driver the available PBN for each extended port it owns.
And source driver will renew it everytime after HPD coming.
That's why we should refer the PBN report by MST branch to calculate
dot clock rate and make sure sink can support the resolution while
creating mode list.
>> +
>> + // FIXME: We should used pipe bpp to do this calculation.
>> + // But can't retrieve bpp setting from drm_connector.
>> + return (int)(clock_rate / 24);
>> + }
>> +
>> + return to_i915(connector->dev)->max_dotclk_freq;
>> +}
>> +
Here try to get the max dot clock according to PBN value from sink. If driver can't
find it, will return the orginal max_dotclk_freq.
>> static enum drm_mode_status
>> intel_dp_mst_mode_valid(struct drm_connector *connector,
>> struct drm_display_mode *mode)
>> @@ -557,8 +578,7 @@ intel_dp_mst_mode_valid(struct drm_connector *connector,
>> struct drm_i915_private *dev_priv = to_i915(connector->dev);
>> struct intel_connector *intel_connector = to_intel_connector(connector);
>> struct intel_dp *intel_dp = intel_connector->mst_port;
>> - int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
>> - int max_rate, mode_rate, max_lanes, max_link_clock;
>> + int max_rate, mode_rate, max_lanes, max_link_clock, max_dotclk;
>>
>> if (drm_connector_is_unregistered(connector))
>> return MODE_ERROR;
>> @@ -572,7 +592,8 @@ intel_dp_mst_mode_valid(struct drm_connector *connector,
>> max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
>> mode_rate = intel_dp_link_required(mode->clock, 18);
>>
>> - /* TODO - validate mode against available PBN for link */
>> + max_dotclk = intel_dp_mst_downstream_max_dotclock(connector);
>> +
Then driver would the clock rate exceed max_dotclk or not to create mode list.
if (mode_rate > max_rate || mode->clock > max_dotclk)
return MODE_CLOCK_HIGH;
When connect to MST hub with HDMI 1.4 output. If user connect the monitor with
HDMI 2.0 capability. EDID from sink shows it can meet DP 1.2 requirement and
source set the prefer resolution (4k@60fps) to display. But MST hub can't
output the video data via its HDMI port due to this resolution already exceed
its ability.
This change may increase source driver compatibility at MST mode. Please give us
advice if more concern.
>> if (mode->clock < 10000)
>> return MODE_CLOCK_LOW;
>>
>> --
>> 2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dp/mst : Get clock rate from sink's available PBN (rev2)
2020-01-06 17:41 [Intel-gfx] [PATCH] drm/i915/dp/mst : Get clock rate from sink's available PBN Lee Shawn C
` (5 preceding siblings ...)
2020-01-08 15:15 ` Ville Syrjälä
@ 2020-02-05 5:56 ` Patchwork
2020-02-05 6:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
` (4 subsequent siblings)
11 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2020-02-05 5:56 UTC (permalink / raw)
To: Lee Shawn C; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/dp/mst : Get clock rate from sink's available PBN (rev2)
URL : https://patchwork.freedesktop.org/series/71647/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
1cb408eb7f9a drm/i915/dp/mst : Get clock rate from sink's available PBN
-:59: WARNING:LONG_LINE: line over 100 characters
#59: FILE: drivers/gpu/drm/i915/display/intel_dp_mst.c:575:
+ clock_rate = ((u64)port->available_pbn * (54 * 8 * 1000 * 1000)) / (64 * 1006);
total: 0 errors, 1 warnings, 0 checks, 53 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp/mst : Get clock rate from sink's available PBN (rev2)
2020-01-06 17:41 [Intel-gfx] [PATCH] drm/i915/dp/mst : Get clock rate from sink's available PBN Lee Shawn C
` (6 preceding siblings ...)
2020-02-05 5:56 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dp/mst : Get clock rate from sink's available PBN (rev2) Patchwork
@ 2020-02-05 6:45 ` Patchwork
2020-02-05 6:45 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
` (3 subsequent siblings)
11 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2020-02-05 6:45 UTC (permalink / raw)
To: Lee Shawn C; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/dp/mst : Get clock rate from sink's available PBN (rev2)
URL : https://patchwork.freedesktop.org/series/71647/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7867 -> Patchwork_16425
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/index.html
Known issues
------------
Here are the changes found in Patchwork_16425 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_gttfill@basic:
- fi-byt-n2820: [PASS][1] -> [FAIL][2] ([i915#694])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/fi-byt-n2820/igt@gem_exec_gttfill@basic.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/fi-byt-n2820/igt@gem_exec_gttfill@basic.html
* igt@i915_pm_rpm@module-reload:
- fi-skl-6770hq: [PASS][3] -> [FAIL][4] ([i915#178])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
* igt@i915_selftest@live_active:
- fi-whl-u: [PASS][5] -> [DMESG-FAIL][6] ([i915#666])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/fi-whl-u/igt@i915_selftest@live_active.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/fi-whl-u/igt@i915_selftest@live_active.html
#### Possible fixes ####
* igt@gem_exec_parallel@fds:
- fi-byt-n2820: [TIMEOUT][7] ([fdo#112271]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/fi-byt-n2820/igt@gem_exec_parallel@fds.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/fi-byt-n2820/igt@gem_exec_parallel@fds.html
#### Warnings ####
* igt@gem_exec_parallel@contexts:
- fi-byt-n2820: [TIMEOUT][9] ([fdo#112271] / [i915#1084]) -> [FAIL][10] ([i915#694])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/fi-byt-n2820/igt@gem_exec_parallel@contexts.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/fi-byt-n2820/igt@gem_exec_parallel@contexts.html
[fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
[i915#1084]: https://gitlab.freedesktop.org/drm/intel/issues/1084
[i915#178]: https://gitlab.freedesktop.org/drm/intel/issues/178
[i915#666]: https://gitlab.freedesktop.org/drm/intel/issues/666
[i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
Participating hosts (42 -> 40)
------------------------------
Additional (9): fi-bdw-5557u fi-bsw-n3050 fi-hsw-peppy fi-kbl-7500u fi-gdg-551 fi-ivb-3770 fi-kbl-7560u fi-kbl-r fi-snb-2600
Missing (11): fi-kbl-soraka fi-hsw-4200u fi-bdw-gvtdvm fi-glk-dsi fi-byt-squawks fi-ilk-650 fi-ctg-p8600 fi-elk-e7500 fi-blb-e6850 fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7867 -> Patchwork_16425
CI-20190529: 20190529
CI_DRM_7867: a4c409e48c6281538b1e375545dfb5989fa02063 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5418: 4028bd390b41925f6e26f6f11b31e05054652527 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16425: 1cb408eb7f9a1e8aea209a6fd4542c67721fa949 @ git://anongit.freedesktop.org/gfx-ci/linux
== Kernel 32bit build ==
Warning: Kernel 32bit buildtest failed:
https://intel-gfx-ci.01.org/Patchwork_16425/build_32bit.log
CALL scripts/checksyscalls.sh
CALL scripts/atomic/check-atomics.sh
CHK include/generated/compile.h
Kernel: arch/x86/boot/bzImage is ready (#1)
Building modules, stage 2.
MODPOST 122 modules
ERROR: "__udivdi3" [drivers/gpu/drm/i915/i915.ko] undefined!
ERROR: "__divdi3" [drivers/gpu/drm/i915/i915.ko] undefined!
scripts/Makefile.modpost:93: recipe for target '__modpost' failed
make[1]: *** [__modpost] Error 1
Makefile:1282: recipe for target 'modules' failed
make: *** [modules] Error 2
== Linux commits ==
1cb408eb7f9a drm/i915/dp/mst : Get clock rate from sink's available PBN
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BUILD: warning for drm/i915/dp/mst : Get clock rate from sink's available PBN (rev2)
2020-01-06 17:41 [Intel-gfx] [PATCH] drm/i915/dp/mst : Get clock rate from sink's available PBN Lee Shawn C
` (7 preceding siblings ...)
2020-02-05 6:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2020-02-05 6:45 ` Patchwork
2020-02-05 13:18 ` [Intel-gfx] [PATCH v2] drm/i915/dp/mst : Get clock rate from sink's available PBN Lee Shawn C
` (2 subsequent siblings)
11 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2020-02-05 6:45 UTC (permalink / raw)
To: Lee Shawn C; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/dp/mst : Get clock rate from sink's available PBN (rev2)
URL : https://patchwork.freedesktop.org/series/71647/
State : warning
== Summary ==
CALL scripts/checksyscalls.sh
CALL scripts/atomic/check-atomics.sh
CHK include/generated/compile.h
Kernel: arch/x86/boot/bzImage is ready (#1)
Building modules, stage 2.
MODPOST 122 modules
ERROR: "__udivdi3" [drivers/gpu/drm/i915/i915.ko] undefined!
ERROR: "__divdi3" [drivers/gpu/drm/i915/i915.ko] undefined!
scripts/Makefile.modpost:93: recipe for target '__modpost' failed
make[1]: *** [__modpost] Error 1
Makefile:1282: recipe for target 'modules' failed
make: *** [modules] Error 2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/build_32bit.log
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] [PATCH v2] drm/i915/dp/mst : Get clock rate from sink's available PBN
2020-01-06 17:41 [Intel-gfx] [PATCH] drm/i915/dp/mst : Get clock rate from sink's available PBN Lee Shawn C
` (8 preceding siblings ...)
2020-02-05 6:45 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
@ 2020-02-05 13:18 ` Lee Shawn C
2020-02-07 11:10 ` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/dp/mst : Get clock rate from sink's available PBN (rev2) Patchwork
2020-03-11 23:09 ` [Intel-gfx] [PATCH] drm/i915/dp/mst : Get clock rate from sink's available PBN Lyude Paul
11 siblings, 0 replies; 16+ messages in thread
From: Lee Shawn C @ 2020-02-05 13:18 UTC (permalink / raw)
To: intel-gfx; +Cc: Cooper Chiou
Driver report physcial bandwidth for max dot clock rate.
It would caused compatibility issue sometimes when physical
bandwidth exceed MST hub output ability.
For example, here is a MST hub with HDMI 1.4 and DP 1.2 output.
And source have DP 1.2 output capability. Connect a HDMI 2.0
display then source will retrieve EDID from external monitor.
Driver got max resolution was 4k@60fps. DP 1.2 can support
this resolution because it did not surpass max physical bandwidth.
After modeset, source output display data but MST hub can't
output HDMI properly due to it already over HDMI 1.4 spec.
Test on several MST hubs. Available PBN value would be renew
if the connected sink (monitor) number was changed. At the same time,
MST hub would trigger HPD to source. Then source driver can refresh
mode list rely on the latest PBN value.
Apply this calculation, source calcualte max dot clock according
to the latest available PBN. Driver will ignore the mode that over
current clock rate. And external display can works normally.
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Cooper Chiou <cooper.chiou@intel.com>
Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
v2: Add missing mutex lock.
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 35 +++++++++++++++++++--
1 file changed, 32 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index ffa2aa2222bf..ba4b088e19a5 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -555,6 +555,35 @@ static int intel_dp_mst_get_modes(struct drm_connector *connector)
return intel_dp_mst_get_ddc_modes(connector);
}
+static int
+intel_dp_mst_downstream_max_dotclock(struct drm_connector *connector)
+{
+ struct intel_connector *intel_connector = to_intel_connector(connector);
+ struct intel_dp *intel_dp = intel_connector->mst_port;
+ struct drm_dp_mst_topology_mgr *mgr = &intel_dp->mst_mgr;
+ struct drm_dp_mst_port *port;
+ u64 clock_rate = to_i915(connector->dev)->max_dotclk_freq;
+
+ if (!mgr)
+ return (int)clock_rate;
+
+ mutex_lock(&mgr->lock);
+ if (mgr->mst_primary) {
+ list_for_each_entry(port, &intel_dp->mst_mgr.mst_primary->ports, next) {
+ if (port->connector == connector) {
+ clock_rate = ((u64)port->available_pbn * (54 * 8 * 1000 * 1000)) / (64 * 1006);
+
+ // FIXME: We should used pipe bpp to do this calculation.
+ // But can't retrieve bpp setting from drm_connector.
+ clock_rate /= 24;
+ }
+ }
+ }
+ mutex_unlock(&mgr->lock);
+
+ return (int)clock_rate;
+}
+
static enum drm_mode_status
intel_dp_mst_mode_valid(struct drm_connector *connector,
struct drm_display_mode *mode)
@@ -562,8 +591,7 @@ intel_dp_mst_mode_valid(struct drm_connector *connector,
struct drm_i915_private *dev_priv = to_i915(connector->dev);
struct intel_connector *intel_connector = to_intel_connector(connector);
struct intel_dp *intel_dp = intel_connector->mst_port;
- int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
- int max_rate, mode_rate, max_lanes, max_link_clock;
+ int max_rate, mode_rate, max_lanes, max_link_clock, max_dotclk;
if (drm_connector_is_unregistered(connector))
return MODE_ERROR;
@@ -577,7 +605,8 @@ intel_dp_mst_mode_valid(struct drm_connector *connector,
max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
mode_rate = intel_dp_link_required(mode->clock, 18);
- /* TODO - validate mode against available PBN for link */
+ max_dotclk = intel_dp_mst_downstream_max_dotclock(connector);
+
if (mode->clock < 10000)
return MODE_CLOCK_LOW;
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/dp/mst : Get clock rate from sink's available PBN (rev2)
2020-01-06 17:41 [Intel-gfx] [PATCH] drm/i915/dp/mst : Get clock rate from sink's available PBN Lee Shawn C
` (9 preceding siblings ...)
2020-02-05 13:18 ` [Intel-gfx] [PATCH v2] drm/i915/dp/mst : Get clock rate from sink's available PBN Lee Shawn C
@ 2020-02-07 11:10 ` Patchwork
2020-03-11 23:09 ` [Intel-gfx] [PATCH] drm/i915/dp/mst : Get clock rate from sink's available PBN Lyude Paul
11 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2020-02-07 11:10 UTC (permalink / raw)
To: Lee Shawn C; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/dp/mst : Get clock rate from sink's available PBN (rev2)
URL : https://patchwork.freedesktop.org/series/71647/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7867_full -> Patchwork_16425_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_16425_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_busy@busy-vcs1:
- shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#112080]) +13 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-iclb4/igt@gem_busy@busy-vcs1.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-iclb8/igt@gem_busy@busy-vcs1.html
* igt@gem_caching@read-writes:
- shard-hsw: [PASS][3] -> [FAIL][4] ([i915#694])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-hsw4/igt@gem_caching@read-writes.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-hsw6/igt@gem_caching@read-writes.html
* igt@gem_exec_schedule@pi-common-bsd:
- shard-iclb: [PASS][5] -> [SKIP][6] ([i915#677]) +1 similar issue
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-iclb5/igt@gem_exec_schedule@pi-common-bsd.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-iclb4/igt@gem_exec_schedule@pi-common-bsd.html
* igt@gem_exec_schedule@reorder-wide-bsd:
- shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#112146]) +6 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-iclb8/igt@gem_exec_schedule@reorder-wide-bsd.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-iclb1/igt@gem_exec_schedule@reorder-wide-bsd.html
* igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-skl: [PASS][9] -> [FAIL][10] ([i915#644])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-skl3/igt@gem_ppgtt@flink-and-close-vma-leak.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-skl9/igt@gem_ppgtt@flink-and-close-vma-leak.html
* igt@i915_pm_rps@waitboost:
- shard-iclb: [PASS][11] -> [FAIL][12] ([i915#413])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-iclb8/igt@i915_pm_rps@waitboost.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-iclb5/igt@i915_pm_rps@waitboost.html
* igt@i915_selftest@live_gtt:
- shard-kbl: [PASS][13] -> [TIMEOUT][14] ([fdo#112271])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-kbl3/igt@i915_selftest@live_gtt.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-kbl2/igt@i915_selftest@live_gtt.html
* igt@kms_color@pipe-b-ctm-red-to-blue:
- shard-skl: [PASS][15] -> [FAIL][16] ([i915#129])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-skl4/igt@kms_color@pipe-b-ctm-red-to-blue.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-skl5/igt@kms_color@pipe-b-ctm-red-to-blue.html
* igt@kms_cursor_crc@pipe-b-cursor-suspend:
- shard-apl: [PASS][17] -> [DMESG-WARN][18] ([i915#180])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-apl8/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-apl1/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-kbl: [PASS][19] -> [FAIL][20] ([i915#46])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-kbl7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-kbl4/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@flip-vs-suspend:
- shard-skl: [PASS][21] -> [INCOMPLETE][22] ([i915#221])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-skl9/igt@kms_flip@flip-vs-suspend.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-skl10/igt@kms_flip@flip-vs-suspend.html
* igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
- shard-skl: [PASS][23] -> [FAIL][24] ([fdo#108145])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-skl2/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-skl2/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
* igt@kms_psr@psr2_primary_mmap_gtt:
- shard-iclb: [PASS][25] -> [SKIP][26] ([fdo#109441]) +1 similar issue
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-iclb2/igt@kms_psr@psr2_primary_mmap_gtt.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-iclb5/igt@kms_psr@psr2_primary_mmap_gtt.html
* igt@kms_vblank@pipe-a-ts-continuation-suspend:
- shard-kbl: [PASS][27] -> [DMESG-WARN][28] ([i915#180])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-kbl6/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-kbl3/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
* igt@prime_vgem@fence-wait-bsd2:
- shard-iclb: [PASS][29] -> [SKIP][30] ([fdo#109276]) +17 similar issues
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-iclb4/igt@prime_vgem@fence-wait-bsd2.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-iclb8/igt@prime_vgem@fence-wait-bsd2.html
#### Possible fixes ####
* igt@gem_exec_parallel@vcs1-fds:
- shard-iclb: [SKIP][31] ([fdo#112080]) -> [PASS][32] +14 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-iclb3/igt@gem_exec_parallel@vcs1-fds.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-iclb1/igt@gem_exec_parallel@vcs1-fds.html
* igt@gem_exec_schedule@preempt-contexts-bsd2:
- shard-iclb: [SKIP][33] ([fdo#109276]) -> [PASS][34] +17 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-iclb8/igt@gem_exec_schedule@preempt-contexts-bsd2.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-iclb1/igt@gem_exec_schedule@preempt-contexts-bsd2.html
* igt@gem_exec_schedule@preemptive-hang-bsd:
- shard-iclb: [SKIP][35] ([fdo#112146]) -> [PASS][36] +5 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-iclb4/igt@gem_exec_schedule@preemptive-hang-bsd.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-iclb8/igt@gem_exec_schedule@preemptive-hang-bsd.html
* igt@gem_partial_pwrite_pread@write-snoop:
- shard-hsw: [FAIL][37] ([i915#694]) -> [PASS][38] +1 similar issue
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-hsw7/igt@gem_partial_pwrite_pread@write-snoop.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-hsw1/igt@gem_partial_pwrite_pread@write-snoop.html
* igt@gem_workarounds@suspend-resume-fd:
- shard-kbl: [DMESG-WARN][39] ([i915#180]) -> [PASS][40] +6 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-kbl2/igt@gem_workarounds@suspend-resume-fd.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-kbl7/igt@gem_workarounds@suspend-resume-fd.html
* igt@i915_pm_dc@dc5-dpms:
- shard-iclb: [FAIL][41] ([i915#447]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-iclb3/igt@i915_pm_dc@dc5-dpms.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-iclb4/igt@i915_pm_dc@dc5-dpms.html
* igt@kms_cursor_crc@pipe-b-cursor-alpha-transparent:
- shard-skl: [FAIL][43] ([i915#54]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-skl2/igt@kms_cursor_crc@pipe-b-cursor-alpha-transparent.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-skl3/igt@kms_cursor_crc@pipe-b-cursor-alpha-transparent.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-glk: [FAIL][45] ([i915#79]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-glk5/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-glk7/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-apl: [DMESG-WARN][47] ([i915#180]) -> [PASS][48] +2 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-apl1/igt@kms_flip@flip-vs-suspend-interruptible.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-apl3/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible:
- shard-apl: [FAIL][49] ([i915#34]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-apl1/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-apl2/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: [FAIL][51] ([fdo#108145]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [FAIL][53] ([fdo#108145] / [i915#265]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-skl2/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-skl3/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_plane_lowres@pipe-a-tiling-x:
- shard-glk: [FAIL][55] ([i915#899]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-glk9/igt@kms_plane_lowres@pipe-a-tiling-x.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-glk7/igt@kms_plane_lowres@pipe-a-tiling-x.html
* igt@kms_psr@psr2_sprite_plane_move:
- shard-iclb: [SKIP][57] ([fdo#109441]) -> [PASS][58] +2 similar issues
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-iclb1/igt@kms_psr@psr2_sprite_plane_move.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
* igt@kms_setmode@basic:
- shard-kbl: [FAIL][59] ([i915#31]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-kbl6/igt@kms_setmode@basic.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-kbl7/igt@kms_setmode@basic.html
#### Warnings ####
* igt@gem_ctx_isolation@vcs1-nonpriv-switch:
- shard-iclb: [FAIL][61] ([IGT#28]) -> [SKIP][62] ([fdo#112080])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-iclb2/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-iclb5/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html
* igt@gem_tiled_blits@normal:
- shard-hsw: [FAIL][63] ([i915#694]) -> [FAIL][64] ([i915#818])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-hsw4/igt@gem_tiled_blits@normal.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-hsw2/igt@gem_tiled_blits@normal.html
* igt@i915_pm_dc@dc6-dpms:
- shard-tglb: [FAIL][65] ([i915#454]) -> [SKIP][66] ([i915#468])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-tglb5/igt@i915_pm_dc@dc6-dpms.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-tglb2/igt@i915_pm_dc@dc6-dpms.html
* igt@i915_selftest@live_blt:
- shard-hsw: [DMESG-FAIL][67] ([i915#725]) -> [DMESG-FAIL][68] ([i915#770])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-hsw8/igt@i915_selftest@live_blt.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-hsw8/igt@i915_selftest@live_blt.html
* igt@kms_color@pipe-d-ctm-0-25:
- shard-iclb: [SKIP][69] ([fdo#109278] / [fdo#112010]) -> [SKIP][70] ([fdo#109278] / [fdo#112010] / [i915#1149]) +9 similar issues
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-iclb2/igt@kms_color@pipe-d-ctm-0-25.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-iclb5/igt@kms_color@pipe-d-ctm-0-25.html
- shard-tglb: [FAIL][71] ([i915#315]) -> [FAIL][72] ([i915#1149] / [i915#315])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-tglb7/igt@kms_color@pipe-d-ctm-0-25.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-tglb7/igt@kms_color@pipe-d-ctm-0-25.html
* igt@kms_dp_dsc@basic-dsc-enable-edp:
- shard-iclb: [DMESG-WARN][73] ([fdo#107724]) -> [SKIP][74] ([fdo#109349])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7867/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/shard-iclb5/igt@kms_dp_dsc@basic-dsc-enable-edp.html
[IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#112010]: https://bugs.freedesktop.org/show_bug.cgi?id=112010
[fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
[fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
[fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
[i915#1149]: https://gitlab.freedesktop.org/drm/intel/issues/1149
[i915#129]: https://gitlab.freedesktop.org/drm/intel/issues/129
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#221]: https://gitlab.freedesktop.org/drm/intel/issues/221
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
[i915#315]: https://gitlab.freedesktop.org/drm/intel/issues/315
[i915#34]: https://gitlab.freedesktop.org/drm/intel/issues/34
[i915#413]: https://gitlab.freedesktop.org/drm/intel/issues/413
[i915#447]: https://gitlab.freedesktop.org/drm/intel/issues/447
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#46]: https://gitlab.freedesktop.org/drm/intel/issues/46
[i915#468]: https://gitlab.freedesktop.org/drm/intel/issues/468
[i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
[i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
[i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
[i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
[i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
[i915#770]: https://gitlab.freedesktop.org/drm/intel/issues/770
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#818]: https://gitlab.freedesktop.org/drm/intel/issues/818
[i915#899]: https://gitlab.freedesktop.org/drm/intel/issues/899
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7867 -> Patchwork_16425
CI-20190529: 20190529
CI_DRM_7867: a4c409e48c6281538b1e375545dfb5989fa02063 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5418: 4028bd390b41925f6e26f6f11b31e05054652527 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16425: 1cb408eb7f9a1e8aea209a6fd4542c67721fa949 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16425/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/dp/mst : Get clock rate from sink's available PBN
2020-01-06 17:41 [Intel-gfx] [PATCH] drm/i915/dp/mst : Get clock rate from sink's available PBN Lee Shawn C
` (10 preceding siblings ...)
2020-02-07 11:10 ` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/dp/mst : Get clock rate from sink's available PBN (rev2) Patchwork
@ 2020-03-11 23:09 ` Lyude Paul
2020-03-16 13:56 ` Lee, Shawn C
11 siblings, 1 reply; 16+ messages in thread
From: Lyude Paul @ 2020-03-11 23:09 UTC (permalink / raw)
To: Lee Shawn C, intel-gfx; +Cc: Cooper Chiou
On Tue, 2020-01-07 at 01:41 +0800, Lee Shawn C wrote:
> Driver report physcial bandwidth for max dot clock rate.
> It would caused compatibility issue sometimes when physical
> bandwidth exceed MST hub output ability.
>
> For example, here is a MST hub with HDMI 1.4 and DP 1.2 output.
> And source have DP 1.2 output capability. Connect a HDMI 2.0
> display then source will retrieve EDID from external monitor.
> Driver got max resolution was 4k@60fps. DP 1.2 can support
> this resolution because it did not surpass max physical bandwidth.
> After modeset, source output display data but MST hub can't
> output HDMI properly due to it already over HDMI 1.4 spec.
>
> Apply this calculation, source calcualte max dot clock according
> to available PBN. Driver will remove the mode that over current
> clock rate. And external display can works normally.
>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Cc: Cooper Chiou <cooper.chiou@intel.com>
>
> Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 27 ++++++++++++++++++---
> 1 file changed, 24 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 3b066c63816d..eaa440165ad2 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -550,6 +550,27 @@ static int intel_dp_mst_get_modes(struct drm_connector
> *connector)
> return intel_dp_mst_get_ddc_modes(connector);
> }
>
> +static int
> +intel_dp_mst_downstream_max_dotclock(struct drm_connector *connector)
> +{
> + struct intel_connector *intel_connector =
> to_intel_connector(connector);
> + struct intel_dp *intel_dp = intel_connector->mst_port;
> + struct drm_dp_mst_port *port;
> + u64 clock_rate = 0;
> +
> + if (intel_dp->mst_mgr.mst_primary)
> + list_for_each_entry(port, &intel_dp->mst_mgr.mst_primary-
> >ports, next)
> + if (port->connector == connector) {
> + clock_rate = ((u64)port->available_pbn * (54 *
> 8 * 1000 * 1000)) / (64 * 1006);
> +
> + // FIXME: We should used pipe bpp to do this
> calculation.
> + // But can't retrieve bpp setting from
> drm_connector.
> + return (int)(clock_rate / 24);
> + }
> +
> + return to_i915(connector->dev)->max_dotclk_freq;
> +}
Hi! So-there's no need to loop through the ports like this, just use the
drm_dp_mst_port struct that's associated with intel_connector->port directly
(feel free to change the declaration to `struct drm_dp_mst_port *port` instead
of `void *port`, it's not illegal to dereference it anymore I promise!
Additionally - you don't want to use pipe_bpp here at all. My advice is to use
the hard-coded bpc we currently have for MST. Once you guys have retry logic
to dynamically select the bpc depending on the available bandwidth, I'd move
this check over to using the smallest possible BPC reported by the connector's
display_info. Remember we're checking if -any- variant of each mode is somehow
possible, it's ok and expected for modes to potentially fail at higher BPCs.
Anyway-this looks fine otherwise, but like Ville mentioned available_pbn isn't
the thing that we want to be using here. I've got support for using full_pbn
instead and that should be pushed sometime today or tommorrow (dealing with
some topic branch weirdness with dim right now). This is the patch series,
jfyi:
https://patchwork.freedesktop.org/series/74295/
Also-feel free to write a drm helper to do these mode_valid checks for mst, if
it's feasible and not overkill
> +
> static enum drm_mode_status
> intel_dp_mst_mode_valid(struct drm_connector *connector,
> struct drm_display_mode *mode)
> @@ -557,8 +578,7 @@ intel_dp_mst_mode_valid(struct drm_connector *connector,
> struct drm_i915_private *dev_priv = to_i915(connector->dev);
> struct intel_connector *intel_connector =
> to_intel_connector(connector);
> struct intel_dp *intel_dp = intel_connector->mst_port;
> - int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
> - int max_rate, mode_rate, max_lanes, max_link_clock;
> + int max_rate, mode_rate, max_lanes, max_link_clock, max_dotclk;
>
> if (drm_connector_is_unregistered(connector))
> return MODE_ERROR;
> @@ -572,7 +592,8 @@ intel_dp_mst_mode_valid(struct drm_connector *connector,
> max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
> mode_rate = intel_dp_link_required(mode->clock, 18);
>
> - /* TODO - validate mode against available PBN for link */
> + max_dotclk = intel_dp_mst_downstream_max_dotclock(connector);
> +
> if (mode->clock < 10000)
> return MODE_CLOCK_LOW;
>
--
Cheers,
Lyude Paul (she/her)
Associate Software Engineer at Red Hat
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/dp/mst : Get clock rate from sink's available PBN
2020-03-11 23:09 ` [Intel-gfx] [PATCH] drm/i915/dp/mst : Get clock rate from sink's available PBN Lyude Paul
@ 2020-03-16 13:56 ` Lee, Shawn C
2020-03-19 17:26 ` Lyude Paul
0 siblings, 1 reply; 16+ messages in thread
From: Lee, Shawn C @ 2020-03-16 13:56 UTC (permalink / raw)
To: intel-gfx, Lyude Paul; +Cc: Chiou, Cooper
On Wed, 2020-03-11, Lyude Paul wrote:
>On Tue, 2020-01-07 at 01:41 +0800, Lee Shawn C wrote:
>> Driver report physcial bandwidth for max dot clock rate.
>> It would caused compatibility issue sometimes when physical bandwidth
>> exceed MST hub output ability.
>>
>> For example, here is a MST hub with HDMI 1.4 and DP 1.2 output.
>> And source have DP 1.2 output capability. Connect a HDMI 2.0 display
>> then source will retrieve EDID from external monitor.
>> Driver got max resolution was 4k@60fps. DP 1.2 can support this
>> resolution because it did not surpass max physical bandwidth.
>> After modeset, source output display data but MST hub can't output
>> HDMI properly due to it already over HDMI 1.4 spec.
>>
>> Apply this calculation, source calcualte max dot clock according to
>> available PBN. Driver will remove the mode that over current clock
>> rate. And external display can works normally.
>>
>> Cc: Manasi Navare <manasi.d.navare@intel.com>
>> Cc: Jani Nikula <jani.nikula@linux.intel.com>
>> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
>> Cc: Cooper Chiou <cooper.chiou@intel.com>
>>
>> Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_dp_mst.c | 27
>> ++++++++++++++++++---
>> 1 file changed, 24 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
>> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
>> index 3b066c63816d..eaa440165ad2 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
>> @@ -550,6 +550,27 @@ static int intel_dp_mst_get_modes(struct
>> drm_connector
>> *connector)
>> return intel_dp_mst_get_ddc_modes(connector);
>> }
>>
>> +static int
>> +intel_dp_mst_downstream_max_dotclock(struct drm_connector *connector)
>> +{
>> + struct intel_connector *intel_connector =
>> to_intel_connector(connector);
>> + struct intel_dp *intel_dp = intel_connector->mst_port;
>> + struct drm_dp_mst_port *port;
>> + u64 clock_rate = 0;
>> +
>> + if (intel_dp->mst_mgr.mst_primary)
>> + list_for_each_entry(port, &intel_dp->mst_mgr.mst_primary-
>> >ports, next)
>> + if (port->connector == connector) {
>> + clock_rate = ((u64)port->available_pbn * (54 *
>> 8 * 1000 * 1000)) / (64 * 1006);
>> +
>> + // FIXME: We should used pipe bpp to do this
>> calculation.
>> + // But can't retrieve bpp setting from
>> drm_connector.
>> + return (int)(clock_rate / 24);
>> + }
>> +
>> + return to_i915(connector->dev)->max_dotclk_freq;
>> +}
>
>Hi! So-there's no need to loop through the ports like this, just use the drm_dp_mst_port struct that's associated with intel_connector->port directly (feel free to change the declaration to `struct drm_dp_mst_port *port` instead of `void *port`, it's not illegal to dereference it anymore I promise!
>
>Additionally - you don't want to use pipe_bpp here at all. My advice is to use the hard-coded bpc we currently have for MST. Once you guys have retry logic to dynamically select the bpc depending on the available bandwidth, I'd move this check over to using the smallest possible BPC reported by the connector's display_info. Remember we're checking if -any- variant of each mode is somehow possible, it's ok and expected for modes to potentially fail at higher BPCs.
>
>Anyway-this looks fine otherwise, but like Ville mentioned available_pbn isn't the thing that we want to be using here. I've got support for using full_pbn instead and that should be pushed sometime today or tommorrow (dealing with some topic branch weirdness with dim right now). This is the patch series,
>jfyi:
>
>https://patchwork.freedesktop.org/series/74295/
>
>Also-feel free to write a drm helper to do these mode_valid checks for mst, if it's feasible and not overkill
>
Thanks! I will refer the change from patch series you mentioned. Hardcode bpc to 24 and use full_pbn instead of available_pbn.
BTW, this patch series still on specific branch (topic/mst-bw-check-fixes-for-airlied) and not merge to drm branch yet.
It would be better to wait the patches merged into drm branch. After that, I can commit new patch to fix issue. Any comment?
>> +
>> static enum drm_mode_status
>> intel_dp_mst_mode_valid(struct drm_connector *connector,
>> struct drm_display_mode *mode)
>> @@ -557,8 +578,7 @@ intel_dp_mst_mode_valid(struct drm_connector *connector,
>> struct drm_i915_private *dev_priv = to_i915(connector->dev);
>> struct intel_connector *intel_connector =
>> to_intel_connector(connector);
>> struct intel_dp *intel_dp = intel_connector->mst_port;
>> - int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
>> - int max_rate, mode_rate, max_lanes, max_link_clock;
>> + int max_rate, mode_rate, max_lanes, max_link_clock, max_dotclk;
>>
>> if (drm_connector_is_unregistered(connector))
>> return MODE_ERROR;
>> @@ -572,7 +592,8 @@ intel_dp_mst_mode_valid(struct drm_connector *connector,
>> max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
>> mode_rate = intel_dp_link_required(mode->clock, 18);
>>
>> - /* TODO - validate mode against available PBN for link */
>> + max_dotclk = intel_dp_mst_downstream_max_dotclock(connector);
>> +
>> if (mode->clock < 10000)
>> return MODE_CLOCK_LOW;
>>
>--
>Cheers,
> Lyude Paul (she/her)
> Associate Software Engineer at Red Hat
>
Best regards,
Shawn
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/dp/mst : Get clock rate from sink's available PBN
2020-03-16 13:56 ` Lee, Shawn C
@ 2020-03-19 17:26 ` Lyude Paul
0 siblings, 0 replies; 16+ messages in thread
From: Lyude Paul @ 2020-03-19 17:26 UTC (permalink / raw)
To: 20200106174156.11081-1-shawn.c.lee, intel-gfx; +Cc: Chiou, Cooper
On Mon, 2020-03-16 at 13:56 +0000, Lee, Shawn C wrote:
> On Wed, 2020-03-11, Lyude Paul wrote:
> > On Tue, 2020-01-07 at 01:41 +0800, Lee Shawn C wrote:
> > > Driver report physcial bandwidth for max dot clock rate.
> > > It would caused compatibility issue sometimes when physical bandwidth
> > > exceed MST hub output ability.
> > >
> > > For example, here is a MST hub with HDMI 1.4 and DP 1.2 output.
> > > And source have DP 1.2 output capability. Connect a HDMI 2.0 display
> > > then source will retrieve EDID from external monitor.
> > > Driver got max resolution was 4k@60fps. DP 1.2 can support this
> > > resolution because it did not surpass max physical bandwidth.
> > > After modeset, source output display data but MST hub can't output
> > > HDMI properly due to it already over HDMI 1.4 spec.
> > >
> > > Apply this calculation, source calcualte max dot clock according to
> > > available PBN. Driver will remove the mode that over current clock
> > > rate. And external display can works normally.
> > >
> > > Cc: Manasi Navare <manasi.d.navare@intel.com>
> > > Cc: Jani Nikula <jani.nikula@linux.intel.com>
> > > Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> > > Cc: Cooper Chiou <cooper.chiou@intel.com>
> > >
> > > Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
> > > ---
> > > drivers/gpu/drm/i915/display/intel_dp_mst.c | 27
> > > ++++++++++++++++++---
> > > 1 file changed, 24 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > > b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > > index 3b066c63816d..eaa440165ad2 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > > @@ -550,6 +550,27 @@ static int intel_dp_mst_get_modes(struct
> > > drm_connector
> > > *connector)
> > > return intel_dp_mst_get_ddc_modes(connector);
> > > }
> > >
> > > +static int
> > > +intel_dp_mst_downstream_max_dotclock(struct drm_connector *connector)
> > > +{
> > > + struct intel_connector *intel_connector =
> > > to_intel_connector(connector);
> > > + struct intel_dp *intel_dp = intel_connector->mst_port;
> > > + struct drm_dp_mst_port *port;
> > > + u64 clock_rate = 0;
> > > +
> > > + if (intel_dp->mst_mgr.mst_primary)
> > > + list_for_each_entry(port, &intel_dp->mst_mgr.mst_primary-
> > > > ports, next)
> > > + if (port->connector == connector) {
> > > + clock_rate = ((u64)port->available_pbn * (54 *
> > > 8 * 1000 * 1000)) / (64 * 1006);
> > > +
> > > + // FIXME: We should used pipe bpp to do this
> > > calculation.
> > > + // But can't retrieve bpp setting from
> > > drm_connector.
> > > + return (int)(clock_rate / 24);
> > > + }
> > > +
> > > + return to_i915(connector->dev)->max_dotclk_freq;
> > > +}
> >
> > Hi! So-there's no need to loop through the ports like this, just use the
> > drm_dp_mst_port struct that's associated with intel_connector->port
> > directly (feel free to change the declaration to `struct drm_dp_mst_port
> > *port` instead of `void *port`, it's not illegal to dereference it anymore
> > I promise!
> >
> > Additionally - you don't want to use pipe_bpp here at all. My advice is to
> > use the hard-coded bpc we currently have for MST. Once you guys have retry
> > logic to dynamically select the bpc depending on the available bandwidth,
> > I'd move this check over to using the smallest possible BPC reported by
> > the connector's display_info. Remember we're checking if -any- variant of
> > each mode is somehow possible, it's ok and expected for modes to
> > potentially fail at higher BPCs.
> >
> > Anyway-this looks fine otherwise, but like Ville mentioned available_pbn
> > isn't the thing that we want to be using here. I've got support for using
> > full_pbn instead and that should be pushed sometime today or tommorrow
> > (dealing with some topic branch weirdness with dim right now). This is the
> > patch series,
> > jfyi:
> >
> > https://patchwork.freedesktop.org/series/74295/
> >
> > Also-feel free to write a drm helper to do these mode_valid checks for
> > mst, if it's feasible and not overkill
> >
>
> Thanks! I will refer the change from patch series you mentioned. Hardcode
> bpc to 24 and use full_pbn instead of available_pbn.
>
> BTW, this patch series still on specific branch (topic/mst-bw-check-fixes-
> for-airlied) and not merge to drm branch yet.
> It would be better to wait the patches merged into drm branch. After that, I
> can commit new patch to fix issue. Any comment?
jfyi the patch should be upstream now. So feel free to send a new patch (also
make sure to cc me so I can review it!)
>
> > > +
> > > static enum drm_mode_status
> > > intel_dp_mst_mode_valid(struct drm_connector *connector,
> > > struct drm_display_mode *mode)
> > > @@ -557,8 +578,7 @@ intel_dp_mst_mode_valid(struct drm_connector
> > > *connector,
> > > struct drm_i915_private *dev_priv = to_i915(connector->dev);
> > > struct intel_connector *intel_connector =
> > > to_intel_connector(connector);
> > > struct intel_dp *intel_dp = intel_connector->mst_port;
> > > - int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
> > > - int max_rate, mode_rate, max_lanes, max_link_clock;
> > > + int max_rate, mode_rate, max_lanes, max_link_clock, max_dotclk;
> > >
> > > if (drm_connector_is_unregistered(connector))
> > > return MODE_ERROR;
> > > @@ -572,7 +592,8 @@ intel_dp_mst_mode_valid(struct drm_connector
> > > *connector,
> > > max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
> > > mode_rate = intel_dp_link_required(mode->clock, 18);
> > >
> > > - /* TODO - validate mode against available PBN for link */
> > > + max_dotclk = intel_dp_mst_downstream_max_dotclock(connector);
> > > +
> > > if (mode->clock < 10000)
> > > return MODE_CLOCK_LOW;
> > >
> > --
> > Cheers,
> > Lyude Paul (she/her)
> > Associate Software Engineer at Red Hat
> >
>
> Best regards,
> Shawn
>
--
Cheers,
Lyude Paul (she/her)
Associate Software Engineer at Red Hat
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2020-03-19 17:26 UTC | newest]
Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-01-06 17:41 [Intel-gfx] [PATCH] drm/i915/dp/mst : Get clock rate from sink's available PBN Lee Shawn C
2020-01-06 9:54 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2020-01-06 10:22 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-01-06 10:22 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
2020-01-06 11:54 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-01-06 14:48 ` [Intel-gfx] [PATCH] " kbuild test robot
2020-01-08 15:15 ` Ville Syrjälä
2020-01-09 3:11 ` Lee, Shawn C
2020-02-05 5:56 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dp/mst : Get clock rate from sink's available PBN (rev2) Patchwork
2020-02-05 6:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-02-05 6:45 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
2020-02-05 13:18 ` [Intel-gfx] [PATCH v2] drm/i915/dp/mst : Get clock rate from sink's available PBN Lee Shawn C
2020-02-07 11:10 ` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/dp/mst : Get clock rate from sink's available PBN (rev2) Patchwork
2020-03-11 23:09 ` [Intel-gfx] [PATCH] drm/i915/dp/mst : Get clock rate from sink's available PBN Lyude Paul
2020-03-16 13:56 ` Lee, Shawn C
2020-03-19 17:26 ` Lyude Paul
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