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DIR:OUT; SFP:1102; x-ms-exchange-antispam-messagedata: =?us-ascii?Q?Obm7fjH4AurKfLVBrdeFf4SFJiICSRM0Ua0EJmwQum3WXD/nkgLpjD5U5W62?= =?us-ascii?Q?wWIN17UrOV596QyYFNovIP0NMPmUu8/QxNwGsq1aq2G7VN+6LYWiku7Q1iaW?= =?us-ascii?Q?rkLVAOC1F7rmoy2DLsQ5g8zyMVEOQDcODqm4DOJJGY60+AmHLMbqmuX+90CS?= =?us-ascii?Q?D3KRWJHy3oRorkpNVDyO6cAKS5Sdobhito+pzp9VZifE+Y6NF7msW0Dh5eQG?= =?us-ascii?Q?WpHoih6tE7nOHpk+afCVHDXfWhDX3E5xjTWA3KZAylUPfLjbNGABS0F6yzMZ?= =?us-ascii?Q?7cbuwcmVfPOLSMFsrFzWQkjXPgmWR3Mfut4tO9PmHRpBUkooNaEyHTzYAlxy?= =?us-ascii?Q?F+l72Mzf914dyRZrWwegsLo9wFlOlvaseghUQvT9H0Lg4nZxlIQTu+Tu1Tuz?= =?us-ascii?Q?HpNGUE/oMgxlH28kDUoWYtoek4+9RXwJRVzyOcFpHIrbDFKXfp8mFLQ4/Njg?= =?us-ascii?Q?lB8rMvNfnkU+lidFGxSzN+CtAfYcxqA15EqjZS+L1tI/o6ZWH/9kv25S/b8Y?= =?us-ascii?Q?nI6BpSbUll9geNOiIEb/5OlDWUEYw4cNh6CBkmJaoUPtdJlv3kpz3ibT/cMc?= =?us-ascii?Q?onZ94bH0uFPWyBba+pTwGcDafU1gDXKdSGV90jTAUxOllOKEggiZ2wK5d6OK?= =?us-ascii?Q?7y0u8um+NbZQVpxlmqYRTCLH1sTVQyfJ9N83FrMjmkYEAFm3UIzkT6M/Rrij?= =?us-ascii?Q?gMyqp0IzdsPlL+Vh+njE2NIEOjbJ8wdCP0o6GK9I4cqOA20z9m8aKbPsdQju?= =?us-ascii?Q?CYLMyR+rSGbabvF9cpVKkfBgl2LouLbhkYC8VKkQ9nFdpapH4kL5F0Fc8z/p?= =?us-ascii?Q?ICwn5m/LysVI9vX7UPSbLw2t4QM0ONddCJnuAWvNoUyhdt0dzy2/tps4xdXT?= =?us-ascii?Q?fgf3KTXtHDv/AMzZNEfe3aNbLi+5G9YIiFEGQ00dehMil7PZHtPnHciwXgpa?= =?us-ascii?Q?ZDd97b3/wgRXYLFesHZaDKPUoeuw8AR7rz5X1tYt/YxW075csnxiTiFakdtB?= =?us-ascii?Q?eqgOzwDiGkYMSgLPTj6I5NbawrwpQ/VHtPtfg5llOJNP4mFYUzTWq3qYcR4O?= =?us-ascii?Q?XyLD2ZfO4dzFGYMosyWZOO/v2YTm359guDpeAliax7OorZ2SMIoetSkxIfVT?= =?us-ascii?Q?DliIrX2/Jkt7JX3wqEEFEAbHmel5wPfSgLVUUXDw0SJmSc/kX1/TnCXoxOZE?= =?us-ascii?Q?8vQ4SWfRVs9iPHclZL+QGGVXR/vwsZySXRZ6RLdGi6JkDYQkBxjb2iDJ+UHx?= =?us-ascii?Q?MlhmwSGht58T6LEE4Lh8mlXLZssus5KteKGbgg7lgwAdisdjn6ubA9gVjxoA?= =?us-ascii?Q?Q86o0WfdUa8Xdvhc4IDnqMxd?= MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM6PR11MB3915.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8f671df2-06e8-475f-cb01-08d8ddf424e3 X-MS-Exchange-CrossTenant-originalarrivaltime: 03 Mar 2021 03:26:33.1593 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Ht1Dmu5Kd5sud1enmDksqYV42gJU5WZioHgpi/pwX6nDhYhSQphnbf/WL27bEd6HOG5N9X3Bw1SDER/10oRp9g== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR1101MB2235 X-OriginatorOrg: intel.com Subject: Re: [Intel-gfx] [PATCH 4/4] drm/i915/dg1: WA GPU hang at RCC X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Liu, Jianjun" Content-Type: multipart/mixed; boundary="===============0651934479==" Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" --===============0651934479== Content-Language: en-US Content-Type: multipart/alternative; boundary="_000_DM6PR11MB39158CC62B7D7BC5F697F8E59F989DM6PR11MB3915namp_" --_000_DM6PR11MB39158CC62B7D7BC5F697F8E59F989DM6PR11MB3915namp_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Yes, that's the case. It has RCC related silicon issues in gen12-lp. Followings are two consecutive GPU hangs we found in SG1 and DG1 linux whic= h have no media compressible render target. 1. HSD-1508524297 [SG1][DG1] GP= U hang in PIPECONTROL in running 120 ways of Android container with running= pocket story HD apk. --> The solution is disable RHWO optimization in default. 2. hsd-1508734716 [DG1][Linux] G= PU hang in PIPECONTROL(IPEHR:0x7a000004) with (PSS, RCPFE, RCC, WMFE) not d= one in running Monkey test --> The solution is keeping RHWO optimization in when Render Target Resolve= type is PARTIAL or FULL. The change will be in mesa code. SV and RCC design team have further study and give the root cause explain t= he bug-eco HSD of 1508744258 - Hang due to deadlock created by RHWO scenari= o with RHWO optimization enabled= . BTW, recently, Windows team found similar GPU hangs in custom's TGL platfor= m and need "disable RHWO" as the WA solution. So it's a general issues in = Gen12 (TGL and DG1). * 14012336472 - [HP-TDC_IEC/HarryPotter]SIO1880260 Simple Solitaire U= I show garbage when playing the game by finger. * 18014955083 - [TGL] Sporadic pixel shader hang when alpha blending = is enabled (SV sighting) Thanks Han Zhen -----Original Message----- From: De Marchi, Lucas Sent: Wednesday, March 3, 2021 9:07 AM To: intel-gfx@lists.freedesktop.org Cc: Han, Zhen ; Liu, Jianjun ; L= iu, Chuansheng ; Sripada, Radhakrishna Subject: [PATCH 4/4] drm/i915/dg1: WA GPU hang at RCC From: Zhen Han > GPU hangs at RCC. According to Wa_14012131227 we shouldn't have a hang due = to RHWO, but that is what we are observing, even without media compressible= render target. Feedback from HW engineers is to leave RHWO disabled. Cc: Jianjun Liu > Cc: Chuansheng Liu > Cc: Radhakrishna Sripada > Signed-off-by: Zhen Han > Signed-off-by: Lucas De Marchi > --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/= i915/gt/intel_workarounds.c index e678fa8d2ab9..5235fb70a69a 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -739,6 +739,17 @@ static void dg1_ctx_workarounds_init(struct intel_engi= ne_cs *engine, FF_MODE2, FF_MODE2_GS_TIMER_MASK, FF_MODE2_GS_TIMER_224, 0); + + /* + * Wa_14012131227 + * + * Although the WA is described as causing corruption when using me= dia + * compressible render target, leaving RHWO enabled is also causing + * gpu hang when using multiple concurrent render and media workloa= ds. + * Disable it completely for now. + */ + wa_masked_en(wal, GEN7_COMMON_SLICE_CHICKEN1, + GEN9_RHWO_OPTIMIZATION_DISABLE); } static void -- 2.30.1 --_000_DM6PR11MB39158CC62B7D7BC5F697F8E59F989DM6PR11MB3915namp_ Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable
Yes, that's the case.
It has RCC related silicon issues in gen12-lp.
Followings are two consecutive GPU hangs we found in SG1 and DG1 = linux which have no media compressible render target.
1. HSD-1508524297  [SG1][DG1] GPU hang in PIPE= CONTROL in running 120 ways of Android container with running pocket story HD apk. 
&a= grave; The solution is disable RHWO optimization in default. =
2. hsd-1508734716 [DG1][Linux] GPU hang in PIPE= CONTROL(IPEHR:0x7a000004) with (PSS, RCPFE, RCC, WMFE) not done in running = Monkey test
&a= grave; The solution is keeping RHWO optimization in when Rend= er Target Resolve type is PARTIAL or FULL. The change will be in mesa code.=
 
SV and RCC design team have further study and give the root cause expl= ain the bug-eco HSD of 1508744258 - Hang due to deadlock created by R= HWO scenario with RHWO optimization enabled.
 
BTW, recently, Windows team found similar GPU hangs in custom’s = TGL platform and need “disable RHWO” as the WA solution.  = So it’s a general issues in Gen12 (TGL and DG1).
 
Thanks
Han Zhen
 
-----Original Message-----
From: De Marchi, Lucas <lucas.demarchi@intel.com>
Sent: Wednesday, March 3, 2021 9:07 AM
To: intel-gfx@lists.freedesktop.org
Cc: Han, Zhen <zhen.han@intel.com>; Liu, Jianjun <jianjun.liu@inte= l.com>; Liu, Chuansheng <chuansheng.liu@intel.com>; Sripada, Radha= krishna <radhakrishna.sripada@intel.com>
Subject: [PATCH 4/4] drm/i915/dg1: WA GPU hang at RCC
 
From: Zhen Han <zhen.han@inte= l.com>
 
GPU hangs at RCC. According to Wa_14012131227 we shouldn't have a hang= due to RHWO, but that is what we are observing, even without media compres= sible render target. Feedback from HW engineers is to leave RHWO disabled.<= /div>
 
Cc: Jianjun Liu <Jianjun.l= iu@intel.com>
Cc: Chuansheng Liu <chu= ansheng.liu@intel.com>
Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: Zhen Han <zhen= .han@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 11 +++++++++++
1 file changed, 11 insertions(+)
 
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu= /drm/i915/gt/intel_workarounds.c
index e678fa8d2ab9..5235fb70a69a 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -739,6 +739,17 @@ static void dg1_ctx_workarounds_init(struct intel= _engine_cs *engine,
           &nbs= p;    FF_MODE2,
           &nbs= p;    FF_MODE2_GS_TIMER_MASK,
           &nbs= p;    FF_MODE2_GS_TIMER_224, 0);
+
+       /*
+        * Wa_14012131227
+        *
+        * Although the WA is descr= ibed as causing corruption when using media
+        * compressible render targ= et, leaving RHWO enabled is also causing
+        * gpu hang when using mult= iple concurrent render and media workloads.
+        * Disable it completely fo= r now.
+        */
+       wa_masked_en(wal, GEN7_COMMON_SL= ICE_CHICKEN1,
+           &nb= sp;        GEN9_RHWO_OPTIMIZATION_DISABL= E);
}
 
static void
--
2.30.1
 
 
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