From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66C22C4338F for ; Wed, 28 Jul 2021 16:34:02 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2163260EB9 for ; Wed, 28 Jul 2021 16:34:02 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 2163260EB9 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6FDC56E82D; Wed, 28 Jul 2021 16:34:01 +0000 (UTC) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6FC936E44F; Wed, 28 Jul 2021 16:34:00 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10059"; a="212732969" X-IronPort-AV: E=Sophos;i="5.84,276,1620716400"; d="scan'208";a="212732969" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jul 2021 09:33:59 -0700 X-IronPort-AV: E=Sophos;i="5.84,276,1620716400"; d="scan'208";a="464723181" Received: from hseyedro-mobl.amr.corp.intel.com (HELO intel.com) ([10.213.174.18]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jul 2021 09:33:56 -0700 Date: Wed, 28 Jul 2021 12:33:49 -0400 From: Rodrigo Vivi To: badal.nilawar@intel.com Message-ID: References: <20210727173338.901264-1-badal.nilawar@intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210727173338.901264-1-badal.nilawar@intel.com> Subject: Re: [Intel-gfx] [PATCH 1/1] drm/i915: dgfx cards need to wait on pcode's uncore init done X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Tue, Jul 27, 2021 at 11:03:38PM +0530, badal.nilawar@intel.com wrote: > From: Badal Nilawar > > In discrete cards, the graphics driver shouldn't proceed with the probe > or resume unless PCODE indicated everything is done, including memory > training and gt bring up. > > For this reason, the driver probe and resume paths needs to be blocked > until PCODE indicates it is done. Also, it needs to aborted if the > notification never arrives. > > In general, the few miliseconds would be enough and the regular PCODE > recommendation for the timeout was 10 seconds. However there are some > rare cases where this initialization can take up to 1 minute. So, > PCODE has increased the recommendation to 3 minutes so we don't fully > block the device utilization when something just got delayed for > whatever reason. To be on the safest side, let's accept this > recommendation, since on the regular case it won't delay or block the > driver initialization and resume flows > > Cc: Rodrigo Vivi > Signed-off-by: Badal Nilawar Reviewed-by: Rodrigo Vivi > --- > drivers/gpu/drm/i915/i915_drv.c | 8 +++++++- > drivers/gpu/drm/i915/intel_sideband.c | 13 +++++++++---- > drivers/gpu/drm/i915/intel_sideband.h | 2 +- > 3 files changed, 17 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index c43b698bf0b97..59fb4c710c8ca 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -620,7 +620,9 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv) > > intel_opregion_setup(dev_priv); > > - intel_pcode_init(dev_priv); > + ret = intel_pcode_init(dev_priv); > + if (ret) > + goto err_msi; > > /* > * Fill the dram structure to get the system dram info. This will be > @@ -1231,6 +1233,10 @@ static int i915_drm_resume(struct drm_device *dev) > > disable_rpm_wakeref_asserts(&dev_priv->runtime_pm); > > + ret = intel_pcode_init(dev_priv); > + if (ret) > + return ret; > + > sanitize_gpu(dev_priv); > > ret = i915_ggtt_enable_hw(dev_priv); > diff --git a/drivers/gpu/drm/i915/intel_sideband.c b/drivers/gpu/drm/i915/intel_sideband.c > index f0a82b37bd1ac..e304bf44e1ff8 100644 > --- a/drivers/gpu/drm/i915/intel_sideband.c > +++ b/drivers/gpu/drm/i915/intel_sideband.c > @@ -556,17 +556,22 @@ int skl_pcode_request(struct drm_i915_private *i915, u32 mbox, u32 request, > #undef COND > } > > -void intel_pcode_init(struct drm_i915_private *i915) > +int intel_pcode_init(struct drm_i915_private *i915) > { > - int ret; > + int ret = 0; > > if (!IS_DGFX(i915)) > - return; > + return ret; > > ret = skl_pcode_request(i915, DG1_PCODE_STATUS, > DG1_UNCORE_GET_INIT_STATUS, > DG1_UNCORE_INIT_STATUS_COMPLETE, > - DG1_UNCORE_INIT_STATUS_COMPLETE, 50); > + DG1_UNCORE_INIT_STATUS_COMPLETE, 180000); > + > + drm_dbg(&i915->drm, "PCODE init status %d\n", ret); > + > if (ret) > drm_err(&i915->drm, "Pcode did not report uncore initialization completion!\n"); > + > + return ret; > } > diff --git a/drivers/gpu/drm/i915/intel_sideband.h b/drivers/gpu/drm/i915/intel_sideband.h > index 094c7b19c5d42..d1d14bcb8f56e 100644 > --- a/drivers/gpu/drm/i915/intel_sideband.h > +++ b/drivers/gpu/drm/i915/intel_sideband.h > @@ -138,6 +138,6 @@ int sandybridge_pcode_write_timeout(struct drm_i915_private *i915, u32 mbox, > int skl_pcode_request(struct drm_i915_private *i915, u32 mbox, u32 request, > u32 reply_mask, u32 reply, int timeout_base_ms); > > -void intel_pcode_init(struct drm_i915_private *i915); > +int intel_pcode_init(struct drm_i915_private *i915); > > #endif /* _INTEL_SIDEBAND_H */ > -- > 2.25.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx