From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.5 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 83DF8C07E95 for ; Sat, 10 Jul 2021 17:52:39 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 42D8B61353 for ; Sat, 10 Jul 2021 17:52:39 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 42D8B61353 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E97636EB4D; Sat, 10 Jul 2021 17:52:38 +0000 (UTC) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id ED1856EB4D; Sat, 10 Jul 2021 17:52:37 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10041"; a="206824015" X-IronPort-AV: E=Sophos;i="5.84,229,1620716400"; d="scan'208";a="206824015" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jul 2021 10:52:22 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.84,229,1620716400"; d="scan'208";a="424943676" Received: from irvmail001.ir.intel.com ([10.43.11.63]) by fmsmga007.fm.intel.com with ESMTP; 10 Jul 2021 10:52:20 -0700 Received: from [10.249.151.15] (mwajdecz-MOBL.ger.corp.intel.com [10.249.151.15]) by irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id 16AHqJom003980; Sat, 10 Jul 2021 18:52:19 +0100 To: Vinay Belgaumkar , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org References: <20210710012026.19705-1-vinay.belgaumkar@intel.com> <20210710012026.19705-10-vinay.belgaumkar@intel.com> From: Michal Wajdeczko Message-ID: Date: Sat, 10 Jul 2021 19:52:18 +0200 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: <20210710012026.19705-10-vinay.belgaumkar@intel.com> Content-Language: en-US Subject: Re: [Intel-gfx] [PATCH 09/16] drm/i915/guc/slpc: Add get max/min freq hooks X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On 10.07.2021 03:20, Vinay Belgaumkar wrote: > Add helpers to read the min/max frequency being used > by SLPC. This is done by send a h2g command which forces s/h2g/H2G > SLPC to update the shared data struct which can then be > read. > > Signed-off-by: Vinay Belgaumkar > Signed-off-by: Sundaresan Sujaritha > --- > drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 58 +++++++++++++++++++++ > drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h | 2 + > 2 files changed, 60 insertions(+) > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c > index 19cb26479942..98a283d31734 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c > @@ -278,6 +278,35 @@ int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val) > return ret; > } > > +int intel_guc_slpc_get_max_freq(struct intel_guc_slpc *slpc, u32 *val) > +{ > + struct slpc_shared_data *data; > + intel_wakeref_t wakeref; > + struct drm_i915_private *i915 = guc_to_gt(slpc_to_guc(slpc))->i915; > + int ret = 0; > + > + wakeref = intel_runtime_pm_get(&i915->runtime_pm); > + > + /* Force GuC to update task data */ > + if (slpc_read_task_state(slpc)) { > + DRM_ERROR("Unable to update task data"); use drm_err missing \n maybe this message could be moved to slpc_read_task_state ? > + ret = -EIO; > + goto done; > + } > + > + GEM_BUG_ON(!slpc->vma); > + > + drm_clflush_virt_range(slpc->vaddr, sizeof(struct slpc_shared_data)); maybe this can also be part of slpc_read_task_state ? > + data = slpc->vaddr; > + > + *val = DIV_ROUND_CLOSEST(data->task_state_data.max_unslice_freq * > + GT_FREQUENCY_MULTIPLIER, GEN9_FREQ_SCALER); > + > +done: > + intel_runtime_pm_put(&i915->runtime_pm, wakeref); > + return ret; > +} > + > /** > * intel_guc_slpc_min_freq_set() - Set min frequency limit for SLPC. > * @slpc: pointer to intel_guc_slpc. > @@ -312,6 +341,35 @@ int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val) > return ret; > } > > +int intel_guc_slpc_get_min_freq(struct intel_guc_slpc *slpc, u32 *val) missing kernel-doc (above intel_guc_slpc_min_freq_set has one) > +{ > + struct slpc_shared_data *data; > + intel_wakeref_t wakeref; > + struct drm_i915_private *i915 = guc_to_gt(slpc_to_guc(slpc))->i915; > + int ret = 0; > + > + wakeref = intel_runtime_pm_get(&i915->runtime_pm); > + > + /* Force GuC to update task data */ > + if (slpc_read_task_state(slpc)) { > + DRM_ERROR("Unable to update task data"); see above > + ret = -EIO; > + goto done; > + } > + > + GEM_BUG_ON(!slpc->vma); > + > + drm_clflush_virt_range(slpc->vaddr, sizeof(struct slpc_shared_data)); see above Michal > + data = slpc->vaddr; > + > + *val = DIV_ROUND_CLOSEST(data->task_state_data.min_unslice_freq * > + GT_FREQUENCY_MULTIPLIER, GEN9_FREQ_SCALER); > + > +done: > + intel_runtime_pm_put(&i915->runtime_pm, wakeref); > + return ret; > +} > + > /* > * intel_guc_slpc_enable() - Start SLPC > * @slpc: pointer to intel_guc_slpc. > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h > index a473e1ea7c10..2cb830cdacb5 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h > @@ -36,5 +36,7 @@ int intel_guc_slpc_enable(struct intel_guc_slpc *slpc); > void intel_guc_slpc_fini(struct intel_guc_slpc *slpc); > int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val); > int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val); > +int intel_guc_slpc_get_max_freq(struct intel_guc_slpc *slpc, u32 *val); > +int intel_guc_slpc_get_min_freq(struct intel_guc_slpc *slpc, u32 *val); > > #endif > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx