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From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
To: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v5 3/3] drm/i915/perf: introduce global sseu pinning
Date: Sat, 14 Mar 2020 12:33:56 +0200	[thread overview]
Message-ID: <b0596c46-cdde-bcad-f233-27b1464363ea@intel.com> (raw)
In-Reply-To: <10ecf815-71b1-bdcf-1588-df726698c119@linux.intel.com>


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On 13/03/2020 17:26, Tvrtko Ursulin wrote:
>
> On 13/03/2020 14:34, Lionel Landwerlin wrote:
>> On Gen11 powergating half the execution units is a functional
>> requirement when using the VME samplers. Not fullfilling this
>> requirement can lead to hangs.
>>
>> This unfortunately plays fairly poorly with the NOA requirements. NOA
>> requires a stable power configuration to maintain its configuration.
>>
>> As a result using OA (and NOA feeding into it) so far has required us
>> to use a power configuration that can work for all contexts. The only
>> power configuration fullfilling this is powergating half the execution
>> units.
>>
>> This makes performance analysis for 3D workloads somewhat pointless.
>>
>> Failing to find a solution that would work for everybody, this change
>> introduces a new i915-perf stream open parameter that punts the
>> decision off to userspace. If this parameter is omitted, the existing
>> Gen11 behavior remains (half EU array powergating).
>>
>> This change takes the initiative to move all perf related sseu
>> configuration into i915_perf.c
>>
>> v2: Make parameter priviliged if different from default
>>
>> v3: Fix context modifying its sseu config while i915-perf is enabled
>>
>> v4: Always consider global sseu a privileged operation (Tvrtko)
>>      Override req_sseu point in intel_sseu_make_rpcs() (Tvrtko)
>>      Remove unrelated changes (Tvrtko)
>>
>> v5: Some typos (Tvrtko)
>>      Process sseu param in read_properties_unlocked() (Tvrtko)
>
> git add ? :)
>
> Regards,
>
> Tvrtko


Oh dear...

Sorry for that.


-Lionel


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  reply	other threads:[~2020-03-14 10:34 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-13 14:34 [Intel-gfx] [PATCH v5 1/3] drm/i915/perf: remove generated code Lionel Landwerlin
2020-03-13 14:34 ` [Intel-gfx] [PATCH v5 2/3] drm/i915/perf: remove redundant power configuration register override Lionel Landwerlin
2020-03-13 14:34 ` [Intel-gfx] [PATCH v5 3/3] drm/i915/perf: introduce global sseu pinning Lionel Landwerlin
2020-03-13 15:26   ` Tvrtko Ursulin
2020-03-14 10:33     ` Lionel Landwerlin [this message]
2020-03-16  9:16   ` Tvrtko Ursulin
2020-03-16  9:28     ` Lionel Landwerlin
2020-03-13 15:27 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v5,1/3] drm/i915/perf: remove generated code Patchwork
2020-03-13 15:51 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-03-13 21:35 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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