From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>,
intel-gfx@lists.freedesktop.org, mahesh.meena@intel.com,
DRI Development <dri-devel@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 1/1] Let userspace know if they can trust timeslicing by including it as part of the I915_PARAM_HAS_SCHEDULER::I915_SCHEDULER_CAP_TIMESLICING
Date: Tue, 25 May 2021 15:19:47 +0100 [thread overview]
Message-ID: <b9ae1daa-6add-1c67-58b4-16491f2e1431@linux.intel.com> (raw)
In-Reply-To: <20210525135508.244659-2-tejaskumarx.surendrakumar.upadhyay@intel.com>
+ dri-devel as per process
On 25/05/2021 14:55, Tejas Upadhyay wrote:
> v2: Only declare timeslicing if we can safely preempt userspace.
Commit message got butchered up somehow so you'll need to fix that at
some point.
Regards,
Tvrtko
> Fixes: 8ee36e048c98 ("drm/i915/execlists: Minimalistic timeslicing")
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_engine_user.c | 1 +
> include/uapi/drm/i915_drm.h | 1 +
> 2 files changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.c b/drivers/gpu/drm/i915/gt/intel_engine_user.c
> index 3cca7ea2d6ea..12d165566ed2 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_user.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_user.c
> @@ -98,6 +98,7 @@ static void set_scheduler_caps(struct drm_i915_private *i915)
> MAP(HAS_PREEMPTION, PREEMPTION),
> MAP(HAS_SEMAPHORES, SEMAPHORES),
> MAP(SUPPORTS_STATS, ENGINE_BUSY_STATS),
> + MAP(TIMESLICE_BIT, TIMESLICING),
> #undef MAP
> };
> struct intel_engine_cs *engine;
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index c2c7759b7d2e..af2212d6113c 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -572,6 +572,7 @@ typedef struct drm_i915_irq_wait {
> #define I915_SCHEDULER_CAP_PREEMPTION (1ul << 2)
> #define I915_SCHEDULER_CAP_SEMAPHORES (1ul << 3)
> #define I915_SCHEDULER_CAP_ENGINE_BUSY_STATS (1ul << 4)
> +#define I915_SCHEDULER_CAP_TIMESLICING (1ul << 5)
>
> #define I915_PARAM_HUC_STATUS 42
>
>
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next prev parent reply other threads:[~2021-05-25 14:19 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-25 13:55 [Intel-gfx] [PATCH 0/1] drm/i915/gt: Introduce timeslicing for userspace Tejas Upadhyay
2021-05-25 13:55 ` [Intel-gfx] [PATCH 1/1] Let userspace know if they can trust timeslicing by including it as part of the I915_PARAM_HAS_SCHEDULER::I915_SCHEDULER_CAP_TIMESLICING Tejas Upadhyay
2021-05-25 14:19 ` Tvrtko Ursulin [this message]
2021-05-25 14:47 ` Daniel Vetter
2021-05-26 10:20 ` Tvrtko Ursulin
2021-05-27 10:13 ` Daniel Vetter
2021-05-27 10:22 ` Tvrtko Ursulin
2021-05-27 10:27 ` Daniel Vetter
2021-05-27 12:13 ` Tvrtko Ursulin
2021-06-01 10:09 ` Tvrtko Ursulin
2021-06-01 14:25 ` Daniel Vetter
2021-06-04 12:53 ` Tvrtko Ursulin
2021-05-25 15:48 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gt: Introduce timeslicing for userspace Patchwork
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