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* [Intel-gfx] [PATCH i-g-t v2 01/11] lib/i915/gem_mman: add FIXED mmap mode
@ 2021-07-28 10:30 Matthew Auld
  2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 02/11] lib/i915/gem_mman: add fixed mode to mmap__device_coherent Matthew Auld
                   ` (10 more replies)
  0 siblings, 11 replies; 18+ messages in thread
From: Matthew Auld @ 2021-07-28 10:30 UTC (permalink / raw)
  To: igt-dev; +Cc: Daniel Vetter, intel-gfx

We need this for discrete.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Ramalingam C <ramalingam.c@intel.com>
---
 lib/i915/gem_mman.c | 37 +++++++++++++++++++++++++++++++++++++
 lib/i915/gem_mman.h |  4 ++++
 2 files changed, 41 insertions(+)

diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
index 4b4f2114..e2514f0c 100644
--- a/lib/i915/gem_mman.c
+++ b/lib/i915/gem_mman.c
@@ -497,6 +497,43 @@ void *gem_mmap_offset__cpu(int fd, uint32_t handle, uint64_t offset,
 	return ptr;
 }
 
+#define LOCAL_I915_MMAP_OFFSET_FIXED 4
+
+void *__gem_mmap_offset__fixed(int fd, uint32_t handle, uint64_t offset,
+			       uint64_t size, unsigned prot)
+{
+	return __gem_mmap_offset(fd, handle, offset, size, prot,
+				 LOCAL_I915_MMAP_OFFSET_FIXED);
+}
+
+/**
+ * gem_mmap_offset__fixed: Used to mmap objects on discrete platforms
+ * @fd: open i915 drm file descriptor
+ * @handle: gem buffer object handle
+ * @offset: offset in the gem buffer of the mmap arena
+ * @size: size of the mmap arena
+ * @prot: memory protection bits as used by mmap()
+ *
+ * Like __gem_mmap_offset__fixed() except we assert on failure.
+ *
+ * For discrete the caching attributes for the pages are fixed at allocation
+ * time, and can't be changed. The FIXED mode will simply use the same caching *
+ * mode of the allocated pages. This mode will always be coherent with GPU
+ * access.
+ *
+ * On non-discrete platforms this mode is not supported.
+ *
+ * Returns: A pointer to the created memory mapping
+ */
+void *gem_mmap_offset__fixed(int fd, uint32_t handle, uint64_t offset,
+			   uint64_t size, unsigned prot)
+{
+	void *ptr = __gem_mmap_offset__fixed(fd, handle, offset, size, prot);
+
+	igt_assert(ptr);
+	return ptr;
+}
+
 /**
  * __gem_mmap__cpu_coherent:
  * @fd: open i915 drm file descriptor
diff --git a/lib/i915/gem_mman.h b/lib/i915/gem_mman.h
index 5695d2ad..290c997d 100644
--- a/lib/i915/gem_mman.h
+++ b/lib/i915/gem_mman.h
@@ -37,6 +37,8 @@ bool gem_mmap_offset__has_wc(int fd);
 void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
 void *gem_mmap_offset__wc(int fd, uint32_t handle, uint64_t offset,
 			  uint64_t size, unsigned prot);
+void *gem_mmap_offset__fixed(int fd, uint32_t handle, uint64_t offset,
+			     uint64_t size, unsigned prot);
 void *gem_mmap__device_coherent(int fd, uint32_t handle, uint64_t offset,
 				uint64_t size, unsigned prot);
 void *gem_mmap__cpu_coherent(int fd, uint32_t handle, uint64_t offset,
@@ -54,6 +56,8 @@ void *__gem_mmap_offset__cpu(int fd, uint32_t handle, uint64_t offset,
 void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
 void *__gem_mmap_offset__wc(int fd, uint32_t handle, uint64_t offset,
 			    uint64_t size, unsigned prot);
+void *__gem_mmap_offset__fixed(int fd, uint32_t handle, uint64_t offset,
+			       uint64_t size, unsigned prot);
 void *__gem_mmap__device_coherent(int fd, uint32_t handle, uint64_t offset,
 				  uint64_t size, unsigned prot);
 void *__gem_mmap_offset(int fd, uint32_t handle, uint64_t offset, uint64_t size,
-- 
2.26.3

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 18+ messages in thread

* [Intel-gfx] [PATCH i-g-t v2 02/11] lib/i915/gem_mman: add fixed mode to mmap__device_coherent
  2021-07-28 10:30 [Intel-gfx] [PATCH i-g-t v2 01/11] lib/i915/gem_mman: add FIXED mmap mode Matthew Auld
@ 2021-07-28 10:30 ` Matthew Auld
  2021-07-28 22:23   ` Dixit, Ashutosh
  2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 03/11] lib/i915/gem_mman: add fixed mode to mmap__cpu_coherent Matthew Auld
                   ` (9 subsequent siblings)
  10 siblings, 1 reply; 18+ messages in thread
From: Matthew Auld @ 2021-07-28 10:30 UTC (permalink / raw)
  To: igt-dev; +Cc: Daniel Vetter, intel-gfx

On discrete we need to fallback to this mode.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Ramalingam C <ramalingam.c@intel.com>
---
 lib/i915/gem_mman.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
index e2514f0c..222e8896 100644
--- a/lib/i915/gem_mman.c
+++ b/lib/i915/gem_mman.c
@@ -383,9 +383,10 @@ void *__gem_mmap__device_coherent(int fd, uint32_t handle, uint64_t offset,
 				      I915_MMAP_OFFSET_WC);
 	if (!ptr)
 		ptr = __gem_mmap__wc(fd, handle, offset, size, prot);
-
 	if (!ptr)
 		ptr = __gem_mmap__gtt(fd, handle, size, prot);
+	if (!ptr)
+		ptr = __gem_mmap_offset__fixed(fd, handle, offset, size, prot);
 
 	return ptr;
 }
-- 
2.26.3

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 18+ messages in thread

* [Intel-gfx] [PATCH i-g-t v2 03/11] lib/i915/gem_mman: add fixed mode to mmap__cpu_coherent
  2021-07-28 10:30 [Intel-gfx] [PATCH i-g-t v2 01/11] lib/i915/gem_mman: add FIXED mmap mode Matthew Auld
  2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 02/11] lib/i915/gem_mman: add fixed mode to mmap__device_coherent Matthew Auld
@ 2021-07-28 10:30 ` Matthew Auld
  2021-07-28 22:24   ` Dixit, Ashutosh
  2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 04/11] lib/i915/gem_mman: add fixed mode to gem_mmap__cpu Matthew Auld
                   ` (8 subsequent siblings)
  10 siblings, 1 reply; 18+ messages in thread
From: Matthew Auld @ 2021-07-28 10:30 UTC (permalink / raw)
  To: igt-dev; +Cc: Daniel Vetter, intel-gfx

On discrete we only support the new fixed mode.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Ramalingam C <ramalingam.c@intel.com>
---
 lib/i915/gem_mman.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
index 222e8896..337d28fb 100644
--- a/lib/i915/gem_mman.c
+++ b/lib/i915/gem_mman.c
@@ -580,6 +580,8 @@ void *gem_mmap__cpu_coherent(int fd, uint32_t handle, uint64_t offset,
 	igt_assert(offset == 0);
 
 	ptr = __gem_mmap__cpu_coherent(fd, handle, offset, size, prot);
+	if (!ptr)
+		ptr = __gem_mmap_offset__fixed(fd, handle, offset, size, prot);
 	igt_assert(ptr);
 
 	return ptr;
-- 
2.26.3

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 18+ messages in thread

* [Intel-gfx] [PATCH i-g-t v2 04/11] lib/i915/gem_mman: add fixed mode to gem_mmap__cpu
  2021-07-28 10:30 [Intel-gfx] [PATCH i-g-t v2 01/11] lib/i915/gem_mman: add FIXED mmap mode Matthew Auld
  2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 02/11] lib/i915/gem_mman: add fixed mode to mmap__device_coherent Matthew Auld
  2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 03/11] lib/i915/gem_mman: add fixed mode to mmap__cpu_coherent Matthew Auld
@ 2021-07-28 10:30 ` Matthew Auld
  2021-07-28 23:07   ` Dixit, Ashutosh
  2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 05/11] lib/i915/gem_mman: update mmap_offset_types with FIXED Matthew Auld
                   ` (7 subsequent siblings)
  10 siblings, 1 reply; 18+ messages in thread
From: Matthew Auld @ 2021-07-28 10:30 UTC (permalink / raw)
  To: igt-dev; +Cc: Daniel Vetter, intel-gfx

On discrete we only support the new fixed mode.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Ramalingam C <ramalingam.c@intel.com>
---
 lib/i915/gem_mman.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
index 337d28fb..6f5e6d72 100644
--- a/lib/i915/gem_mman.c
+++ b/lib/i915/gem_mman.c
@@ -434,7 +434,13 @@ void *gem_mmap__device_coherent(int fd, uint32_t handle, uint64_t offset,
  */
 void *__gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
 {
-	return __gem_mmap(fd, handle, offset, size, prot, 0);
+	void *ptr;
+
+	ptr = __gem_mmap(fd, handle, offset, size, prot, 0);
+	if (!ptr)
+		ptr = __gem_mmap_offset__fixed(fd, handle, offset, size, prot);
+
+	return ptr;
 }
 
 /**
-- 
2.26.3

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 18+ messages in thread

* [Intel-gfx] [PATCH i-g-t v2 05/11] lib/i915/gem_mman: update mmap_offset_types with FIXED
  2021-07-28 10:30 [Intel-gfx] [PATCH i-g-t v2 01/11] lib/i915/gem_mman: add FIXED mmap mode Matthew Auld
                   ` (2 preceding siblings ...)
  2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 04/11] lib/i915/gem_mman: add fixed mode to gem_mmap__cpu Matthew Auld
@ 2021-07-28 10:30 ` Matthew Auld
  2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 06/11] lib/ioctl_wrappers: update mmap_{read, write} for discrete Matthew Auld
                   ` (6 subsequent siblings)
  10 siblings, 0 replies; 18+ messages in thread
From: Matthew Auld @ 2021-07-28 10:30 UTC (permalink / raw)
  To: igt-dev; +Cc: Daniel Vetter, intel-gfx

We need to also iterate the fixed mode in the tests which rely on this.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Ramalingam C <ramalingam.c@intel.com>
---
 lib/i915/gem_mman.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
index 6f5e6d72..16168a32 100644
--- a/lib/i915/gem_mman.c
+++ b/lib/i915/gem_mman.c
@@ -617,6 +617,7 @@ const struct mmap_offset mmap_offset_types[] = {
 	{ "wb", I915_MMAP_OFFSET_WB, I915_GEM_DOMAIN_CPU },
 	{ "wc", I915_MMAP_OFFSET_WC, I915_GEM_DOMAIN_WC },
 	{ "uc", I915_MMAP_OFFSET_UC, I915_GEM_DOMAIN_WC },
+	{ "fixed", LOCAL_I915_MMAP_OFFSET_FIXED, 0},
 	{},
 };
 
-- 
2.26.3

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 18+ messages in thread

* [Intel-gfx] [PATCH i-g-t v2 06/11] lib/ioctl_wrappers: update mmap_{read, write} for discrete
  2021-07-28 10:30 [Intel-gfx] [PATCH i-g-t v2 01/11] lib/i915/gem_mman: add FIXED mmap mode Matthew Auld
                   ` (3 preceding siblings ...)
  2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 05/11] lib/i915/gem_mman: update mmap_offset_types with FIXED Matthew Auld
@ 2021-07-28 10:30 ` Matthew Auld
  2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 07/11] lib/intel_bufops: " Matthew Auld
                   ` (5 subsequent siblings)
  10 siblings, 0 replies; 18+ messages in thread
From: Matthew Auld @ 2021-07-28 10:30 UTC (permalink / raw)
  To: igt-dev; +Cc: Daniel Vetter, intel-gfx

We can no longer just call get_caching or set_domain, and the mmap mode
must be FIXED. This should bring back gem_exec_basic and a few others in
CI on DG1.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Ramalingam C <ramalingam.c@intel.com>
---
 lib/ioctl_wrappers.c | 25 +++++++++++++++++++++++--
 1 file changed, 23 insertions(+), 2 deletions(-)

diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
index 25c5e495..7e27a1b3 100644
--- a/lib/ioctl_wrappers.c
+++ b/lib/ioctl_wrappers.c
@@ -339,7 +339,18 @@ static void mmap_write(int fd, uint32_t handle, uint64_t offset,
 	if (!length)
 		return;
 
-	if (is_cache_coherent(fd, handle)) {
+	if (gem_has_lmem(fd)) {
+		/*
+		 * set/get_caching and set_domain are no longer supported on
+		 * discrete, also the only mmap mode supportd is FIXED.
+		 */
+		map = gem_mmap_offset__fixed(fd, handle, 0,
+					     offset + length,
+					     PROT_READ | PROT_WRITE);
+		igt_assert_eq(gem_wait(fd, handle, 0), 0);
+	}
+
+	if (!map && is_cache_coherent(fd, handle)) {
 		/* offset arg for mmap functions must be 0 */
 		map = __gem_mmap__cpu_coherent(fd, handle, 0, offset + length,
 					       PROT_READ | PROT_WRITE);
@@ -369,7 +380,17 @@ static void mmap_read(int fd, uint32_t handle, uint64_t offset, void *buf, uint6
 	if (!length)
 		return;
 
-	if (gem_has_llc(fd) || is_cache_coherent(fd, handle)) {
+	if (gem_has_lmem(fd)) {
+		/*
+		 * set/get_caching and set_domain are no longer supported on
+		 * discrete, also the only supported mmap mode is FIXED.
+		 */
+		map = gem_mmap_offset__fixed(fd, handle, 0,
+					     offset + length, PROT_READ);
+		igt_assert_eq(gem_wait(fd, handle, 0), 0);
+	}
+
+	if (!map && (gem_has_llc(fd) || is_cache_coherent(fd, handle))) {
 		/* offset arg for mmap functions must be 0 */
 		map = __gem_mmap__cpu_coherent(fd, handle, 0,
 					       offset + length, PROT_READ);
-- 
2.26.3

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 18+ messages in thread

* [Intel-gfx] [PATCH i-g-t v2 07/11] lib/intel_bufops: update mmap_{read, write} for discrete
  2021-07-28 10:30 [Intel-gfx] [PATCH i-g-t v2 01/11] lib/i915/gem_mman: add FIXED mmap mode Matthew Auld
                   ` (4 preceding siblings ...)
  2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 06/11] lib/ioctl_wrappers: update mmap_{read, write} for discrete Matthew Auld
@ 2021-07-28 10:30 ` Matthew Auld
  2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 08/11] lib/ioctl_wrappers: update set_domain " Matthew Auld
                   ` (4 subsequent siblings)
  10 siblings, 0 replies; 18+ messages in thread
From: Matthew Auld @ 2021-07-28 10:30 UTC (permalink / raw)
  To: igt-dev; +Cc: Daniel Vetter, intel-gfx

On discrete we can no longer call get_caching or set_domain, and the
mmap mode must be FIXED.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Ramalingam C <ramalingam.c@intel.com>
---
 lib/intel_bufops.c | 25 +++++++++++++++++++++++--
 1 file changed, 23 insertions(+), 2 deletions(-)

diff --git a/lib/intel_bufops.c b/lib/intel_bufops.c
index 3ce68663..faca4406 100644
--- a/lib/intel_bufops.c
+++ b/lib/intel_bufops.c
@@ -424,7 +424,18 @@ static void *mmap_write(int fd, struct intel_buf *buf)
 {
 	void *map = NULL;
 
-	if (is_cache_coherent(fd, buf->handle)) {
+	if (gem_has_lmem(fd)) {
+		/*
+		 * set/get_caching and set_domain are no longer supported on
+		 * discrete, also the only mmap mode supportd is FIXED.
+		 */
+		map = gem_mmap_offset__fixed(fd, buf->handle, 0,
+					     buf->surface[0].size,
+					     PROT_READ | PROT_WRITE);
+		igt_assert_eq(gem_wait(fd, buf->handle, 0), 0);
+	}
+
+	if (!map && is_cache_coherent(fd, buf->handle)) {
 		map = __gem_mmap_offset__cpu(fd, buf->handle, 0, buf->surface[0].size,
 					     PROT_READ | PROT_WRITE);
 		if (!map)
@@ -455,7 +466,17 @@ static void *mmap_read(int fd, struct intel_buf *buf)
 {
 	void *map = NULL;
 
-	if (gem_has_llc(fd) || is_cache_coherent(fd, buf->handle)) {
+	if (gem_has_lmem(fd)) {
+		/*
+		 * set/get_caching and set_domain are no longer supported on
+		 * discrete, also the only supported mmap mode is FIXED.
+		 */
+		map = gem_mmap_offset__fixed(fd, buf->handle, 0,
+					     buf->surface[0].size, PROT_READ);
+		igt_assert_eq(gem_wait(fd, buf->handle, 0), 0);
+	}
+
+	if (!map && (gem_has_llc(fd) || is_cache_coherent(fd, buf->handle))) {
 		map = __gem_mmap_offset__cpu(fd, buf->handle, 0,
 					     buf->surface[0].size, PROT_READ);
 		if (!map)
-- 
2.26.3

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 18+ messages in thread

* [Intel-gfx] [PATCH i-g-t v2 08/11] lib/ioctl_wrappers: update set_domain for discrete
  2021-07-28 10:30 [Intel-gfx] [PATCH i-g-t v2 01/11] lib/i915/gem_mman: add FIXED mmap mode Matthew Auld
                   ` (5 preceding siblings ...)
  2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 07/11] lib/intel_bufops: " Matthew Auld
@ 2021-07-28 10:30 ` Matthew Auld
  2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 09/11] tests/i915/module_load: update " Matthew Auld
                   ` (3 subsequent siblings)
  10 siblings, 0 replies; 18+ messages in thread
From: Matthew Auld @ 2021-07-28 10:30 UTC (permalink / raw)
  To: igt-dev; +Cc: Daniel Vetter, intel-gfx

On discrete set_domain is now gone, instead we just need to add the
wait.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Ramalingam C <ramalingam.c@intel.com>
---
 lib/ioctl_wrappers.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
index 7e27a1b3..09eb3ce7 100644
--- a/lib/ioctl_wrappers.c
+++ b/lib/ioctl_wrappers.c
@@ -565,7 +565,12 @@ int __gem_set_domain(int fd, uint32_t handle, uint32_t read, uint32_t write)
  */
 void gem_set_domain(int fd, uint32_t handle, uint32_t read, uint32_t write)
 {
-	igt_assert_eq(__gem_set_domain(fd, handle, read, write), 0);
+	int ret = __gem_set_domain(fd, handle, read, write);
+
+	if (ret == -ENODEV && gem_has_lmem(fd))
+		igt_assert_eq(gem_wait(fd, handle, 0), 0);
+	else
+		igt_assert_eq(ret, 0);
 }
 
 /**
-- 
2.26.3

_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 18+ messages in thread

* [Intel-gfx] [PATCH i-g-t v2 09/11] tests/i915/module_load: update for discrete
  2021-07-28 10:30 [Intel-gfx] [PATCH i-g-t v2 01/11] lib/i915/gem_mman: add FIXED mmap mode Matthew Auld
                   ` (6 preceding siblings ...)
  2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 08/11] lib/ioctl_wrappers: update set_domain " Matthew Auld
@ 2021-07-28 10:30 ` Matthew Auld
  2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 10/11] lib/i915/gem_mman: add helper query for has_device_coherent Matthew Auld
                   ` (2 subsequent siblings)
  10 siblings, 0 replies; 18+ messages in thread
From: Matthew Auld @ 2021-07-28 10:30 UTC (permalink / raw)
  To: igt-dev; +Cc: Daniel Vetter, intel-gfx

The set_caching ioctl is gone for discrete, and now just returns
-ENODEV. Update the gem_sanitycheck to account for that. After this we
should be back to just having the breakage caused by missing reloc
support for the reload testcase.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/i915_module_load.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/tests/i915/i915_module_load.c b/tests/i915/i915_module_load.c
index 98ceb5d8..4b42fe3e 100644
--- a/tests/i915/i915_module_load.c
+++ b/tests/i915/i915_module_load.c
@@ -172,17 +172,22 @@ static void gem_sanitycheck(void)
 {
 	struct drm_i915_gem_caching args = {};
 	int i915 = __drm_open_driver(DRIVER_INTEL);
+	int expected;
 	int err;
 
+	expected = -ENOENT;
+	if (gem_has_lmem(i915))
+		expected = -ENODEV;
+
 	err = 0;
 	if (ioctl(i915, DRM_IOCTL_I915_GEM_SET_CACHING, &args))
 		err = -errno;
-	if (err == -ENOENT)
+	if (err == expected)
 		store_all(i915);
 	errno = 0;
 
 	close(i915);
-	igt_assert_eq(err, -ENOENT);
+	igt_assert_eq(err, expected);
 }
 
 static void
-- 
2.26.3

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^ permalink raw reply	[flat|nested] 18+ messages in thread

* [Intel-gfx] [PATCH i-g-t v2 10/11] lib/i915/gem_mman: add helper query for has_device_coherent
  2021-07-28 10:30 [Intel-gfx] [PATCH i-g-t v2 01/11] lib/i915/gem_mman: add FIXED mmap mode Matthew Auld
                   ` (7 preceding siblings ...)
  2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 09/11] tests/i915/module_load: update " Matthew Auld
@ 2021-07-28 10:30 ` Matthew Auld
  2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 11/11] tests/i915/gem_exec_fence: use device_coherent mmap Matthew Auld
  2021-07-28 22:20 ` [Intel-gfx] [PATCH i-g-t v2 01/11] lib/i915/gem_mman: add FIXED mmap mode Dixit, Ashutosh
  10 siblings, 0 replies; 18+ messages in thread
From: Matthew Auld @ 2021-07-28 10:30 UTC (permalink / raw)
  To: igt-dev; +Cc: Daniel Vetter, intel-gfx

Might be useful in some tests, where we are not explicitly testing WC
maps, but rather just require something that is "device coherent", which
should also play nice on discrete platforms.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Ramalingam C <ramalingam.c@intel.com>
---
 lib/i915/gem_mman.c | 43 +++++++++++++++++++++++++++++++++++++++++--
 lib/i915/gem_mman.h | 11 +++++++++++
 2 files changed, 52 insertions(+), 2 deletions(-)

diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
index 16168a32..27ef97cf 100644
--- a/lib/i915/gem_mman.c
+++ b/lib/i915/gem_mman.c
@@ -196,6 +196,47 @@ bool gem_mmap_offset__has_wc(int fd)
 	return has_wc > 0;
 }
 
+#define LOCAL_I915_MMAP_OFFSET_FIXED 4
+
+bool gem_mmap__has_device_coherent(int fd)
+{
+	struct drm_i915_gem_mmap_offset arg;
+	bool supported;
+
+	if (gem_mmap__has_wc(fd))
+		return true;
+
+	/* Maybe we still have GTT mmaps? */
+	memset(&arg, 0, sizeof(arg));
+	arg.handle = gem_create(fd, 4096);
+	arg.offset = 0;
+	arg.flags = I915_MMAP_OFFSET_GTT;
+	supported = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP_OFFSET,
+			      &arg) == 0;
+	gem_close(fd, arg.handle);
+
+	errno = 0;
+
+	if (supported)
+		return true;
+
+	/*
+	 * Maybe this is a discrete device, which only supports fixed mmaps?
+	 * Such mappings should also be considered device coherent.
+	 */
+	memset(&arg, 0, sizeof(arg));
+	arg.handle = gem_create(fd, 4096);
+	arg.offset = 0;
+	arg.flags = LOCAL_I915_MMAP_OFFSET_FIXED;
+	supported = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP_OFFSET,
+			      &arg) == 0;
+	gem_close(fd, arg.handle);
+
+	errno = 0;
+
+	return supported;
+}
+
 /**
  * __gem_mmap:
  * @fd: open i915 drm file descriptor
@@ -504,8 +545,6 @@ void *gem_mmap_offset__cpu(int fd, uint32_t handle, uint64_t offset,
 	return ptr;
 }
 
-#define LOCAL_I915_MMAP_OFFSET_FIXED 4
-
 void *__gem_mmap_offset__fixed(int fd, uint32_t handle, uint64_t offset,
 			       uint64_t size, unsigned prot)
 {
diff --git a/lib/i915/gem_mman.h b/lib/i915/gem_mman.h
index 290c997d..5966ddb5 100644
--- a/lib/i915/gem_mman.h
+++ b/lib/i915/gem_mman.h
@@ -41,6 +41,7 @@ void *gem_mmap_offset__fixed(int fd, uint32_t handle, uint64_t offset,
 			     uint64_t size, unsigned prot);
 void *gem_mmap__device_coherent(int fd, uint32_t handle, uint64_t offset,
 				uint64_t size, unsigned prot);
+bool gem_mmap__has_device_coherent(int fd);
 void *gem_mmap__cpu_coherent(int fd, uint32_t handle, uint64_t offset,
 			     uint64_t size, unsigned prot);
 
@@ -96,6 +97,16 @@ int gem_munmap(void *ptr, uint64_t size);
  */
 #define gem_require_mmap_offset_wc(fd) igt_require(gem_mmap_offset__has_wc(fd))
 
+/**
+ * gem_require_mmap_offset_device_coherent:
+ * @fd: open i915 drm file descriptor
+ *
+ * Feature test macro to query whether direct (i.e. cpu access path, bypassing
+ * the gtt) write-combine memory mappings are available, or fixed mapping for
+ * discrete. Automatically skips through igt_require() if not.
+ */
+#define gem_require_mmap_device_coherent(fd) igt_require(gem_mmap__has_device_coherent(fd))
+
 extern const struct mmap_offset {
 	const char *name;
 	unsigned int type;
-- 
2.26.3

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^ permalink raw reply	[flat|nested] 18+ messages in thread

* [Intel-gfx] [PATCH i-g-t v2 11/11] tests/i915/gem_exec_fence: use device_coherent mmap
  2021-07-28 10:30 [Intel-gfx] [PATCH i-g-t v2 01/11] lib/i915/gem_mman: add FIXED mmap mode Matthew Auld
                   ` (8 preceding siblings ...)
  2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 10/11] lib/i915/gem_mman: add helper query for has_device_coherent Matthew Auld
@ 2021-07-28 10:30 ` Matthew Auld
  2021-07-28 22:20 ` [Intel-gfx] [PATCH i-g-t v2 01/11] lib/i915/gem_mman: add FIXED mmap mode Dixit, Ashutosh
  10 siblings, 0 replies; 18+ messages in thread
From: Matthew Auld @ 2021-07-28 10:30 UTC (permalink / raw)
  To: igt-dev; +Cc: Daniel Vetter, intel-gfx

We lost explicit WC mmaps on discrete, where we now only support FIXED,
however such mappings should be device coherent. In gem_exec_fence it
looks like we can just use mmap__device_coherent, which should also work
on discrete platforms, while still using an explicit WC mmap on
integrated platforms.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_exec_fence.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
index ef1bb0ca..620e7ac2 100644
--- a/tests/i915/gem_exec_fence.c
+++ b/tests/i915/gem_exec_fence.c
@@ -152,7 +152,7 @@ static void test_fence_busy(int fd, const intel_ctx_t *ctx,
 	obj.relocation_count = 1;
 	memset(&reloc, 0, sizeof(reloc));
 
-	batch = gem_mmap__wc(fd, obj.handle, 0, 4096, PROT_WRITE);
+	batch = gem_mmap__device_coherent(fd, obj.handle, 0, 4096, PROT_WRITE);
 	gem_set_domain(fd, obj.handle,
 		       I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
 
@@ -244,7 +244,7 @@ static void test_fence_busy_all(int fd, const intel_ctx_t *ctx, unsigned flags)
 	obj.relocation_count = 1;
 	memset(&reloc, 0, sizeof(reloc));
 
-	batch = gem_mmap__wc(fd, obj.handle, 0, 4096, PROT_WRITE);
+	batch = gem_mmap__device_coherent(fd, obj.handle, 0, 4096, PROT_WRITE);
 	gem_set_domain(fd, obj.handle,
 		       I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
 
@@ -353,7 +353,7 @@ static void test_fence_await(int fd, const intel_ctx_t *ctx,
 	uint32_t *out;
 	int i;
 
-	out = gem_mmap__wc(fd, scratch, 0, 4096, PROT_WRITE);
+	out = gem_mmap__device_coherent(fd, scratch, 0, 4096, PROT_WRITE);
 	gem_set_domain(fd, scratch,
 			I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
 
@@ -617,7 +617,7 @@ static void test_parallel(int i915, const intel_ctx_t *ctx,
 	const struct intel_execution_engine2 *e2;
 	const unsigned int gen = intel_gen(intel_get_drm_devid(i915));
 	uint32_t scratch = gem_create(i915, 4096);
-	uint32_t *out = gem_mmap__wc(i915, scratch, 0, 4096, PROT_READ);
+	uint32_t *out = gem_mmap__device_coherent(i915, scratch, 0, 4096, PROT_READ);
 	uint32_t handle[I915_EXEC_RING_MASK];
 	IGT_CORK_FENCE(cork);
 	igt_spin_t *spin;
@@ -2813,7 +2813,7 @@ static void test_syncobj_timeline_chain_engines(int fd, const intel_ctx_cfg_t *c
 
 	gem_sync(fd, ctx.engine_counter_object.handle);
 
-	counter_output = gem_mmap__wc(fd, ctx.engine_counter_object.handle, 0, 4096, PROT_READ);
+	counter_output = gem_mmap__device_coherent(fd, ctx.engine_counter_object.handle, 0, 4096, PROT_READ);
 
 	for (uint32_t i = 0; i < ctx.engines.nengines; i++)
 		igt_debug("engine %i (%s)\t= %016"PRIx64"\n", i,
@@ -2879,7 +2879,7 @@ static void test_syncobj_stationary_timeline_chain_engines(int fd, const intel_c
 
 	gem_sync(fd, ctx.engine_counter_object.handle);
 
-	counter_output = gem_mmap__wc(fd, ctx.engine_counter_object.handle, 0, 4096, PROT_READ);
+	counter_output = gem_mmap__device_coherent(fd, ctx.engine_counter_object.handle, 0, 4096, PROT_READ);
 
 	for (uint32_t i = 0; i < ctx.engines.nengines; i++)
 		igt_debug("engine %i (%s)\t= %016"PRIx64"\n", i,
@@ -2940,7 +2940,7 @@ static void test_syncobj_backward_timeline_chain_engines(int fd, const intel_ctx
 
 	gem_sync(fd, ctx.engine_counter_object.handle);
 
-	counter_output = gem_mmap__wc(fd, ctx.engine_counter_object.handle, 0, 4096, PROT_READ);
+	counter_output = gem_mmap__device_coherent(fd, ctx.engine_counter_object.handle, 0, 4096, PROT_READ);
 
 	for (uint32_t i = 0; i < ctx.engines.nengines; i++)
 		igt_debug("engine %i (%s)\t= %016"PRIx64"\n", i,
@@ -2963,7 +2963,7 @@ igt_main
 		i915 = drm_open_driver(DRIVER_INTEL);
 		igt_require_gem(i915);
 		igt_require(gem_has_exec_fence(i915));
-		gem_require_mmap_wc(i915);
+		gem_require_mmap_device_coherent(i915);
 		ctx = intel_ctx_create_all_physical(i915);
 
 		gem_submission_print_method(i915);
-- 
2.26.3

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^ permalink raw reply	[flat|nested] 18+ messages in thread

* Re: [Intel-gfx] [PATCH i-g-t v2 01/11] lib/i915/gem_mman: add FIXED mmap mode
  2021-07-28 10:30 [Intel-gfx] [PATCH i-g-t v2 01/11] lib/i915/gem_mman: add FIXED mmap mode Matthew Auld
                   ` (9 preceding siblings ...)
  2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 11/11] tests/i915/gem_exec_fence: use device_coherent mmap Matthew Auld
@ 2021-07-28 22:20 ` Dixit, Ashutosh
  2021-07-30  2:03   ` Dixit, Ashutosh
  10 siblings, 1 reply; 18+ messages in thread
From: Dixit, Ashutosh @ 2021-07-28 22:20 UTC (permalink / raw)
  To: Matthew Auld; +Cc: igt-dev, Daniel Vetter, intel-gfx

On Wed, 28 Jul 2021 03:30:31 -0700, Matthew Auld wrote:
>
> diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
> index 4b4f2114..e2514f0c 100644
> --- a/lib/i915/gem_mman.c
> +++ b/lib/i915/gem_mman.c
> @@ -497,6 +497,43 @@ void *gem_mmap_offset__cpu(int fd, uint32_t handle, uint64_t offset,
>	return ptr;
>  }
>
> +#define LOCAL_I915_MMAP_OFFSET_FIXED 4

At the minimum for now let's get rid of the LOCAL_ prefix here. Even if
this appears in i915_drm.h later, gcc will only complain if the value
diverges.
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^ permalink raw reply	[flat|nested] 18+ messages in thread

* Re: [Intel-gfx] [PATCH i-g-t v2 02/11] lib/i915/gem_mman: add fixed mode to mmap__device_coherent
  2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 02/11] lib/i915/gem_mman: add fixed mode to mmap__device_coherent Matthew Auld
@ 2021-07-28 22:23   ` Dixit, Ashutosh
  0 siblings, 0 replies; 18+ messages in thread
From: Dixit, Ashutosh @ 2021-07-28 22:23 UTC (permalink / raw)
  To: Matthew Auld; +Cc: igt-dev, Daniel Vetter, intel-gfx

On Wed, 28 Jul 2021 03:30:32 -0700, Matthew Auld wrote:
>
> diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
> index e2514f0c..222e8896 100644
> --- a/lib/i915/gem_mman.c
> +++ b/lib/i915/gem_mman.c
> @@ -383,9 +383,10 @@ void *__gem_mmap__device_coherent(int fd, uint32_t handle, uint64_t offset,
>				      I915_MMAP_OFFSET_WC);
>	if (!ptr)
>		ptr = __gem_mmap__wc(fd, handle, offset, size, prot);
> -
>	if (!ptr)
>		ptr = __gem_mmap__gtt(fd, handle, size, prot);
> +	if (!ptr)
> +		ptr = __gem_mmap_offset__fixed(fd, handle, offset, size, prot);

Wondering if we really want 4 system calls for discrete. Maybe we can move
this up to 2nd place right after __gem_mmap_offset?
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^ permalink raw reply	[flat|nested] 18+ messages in thread

* Re: [Intel-gfx] [PATCH i-g-t v2 03/11] lib/i915/gem_mman: add fixed mode to mmap__cpu_coherent
  2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 03/11] lib/i915/gem_mman: add fixed mode to mmap__cpu_coherent Matthew Auld
@ 2021-07-28 22:24   ` Dixit, Ashutosh
  0 siblings, 0 replies; 18+ messages in thread
From: Dixit, Ashutosh @ 2021-07-28 22:24 UTC (permalink / raw)
  To: Matthew Auld; +Cc: igt-dev, Daniel Vetter, intel-gfx

On Wed, 28 Jul 2021 03:30:33 -0700, Matthew Auld wrote:
>
> diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
> index 222e8896..337d28fb 100644
> --- a/lib/i915/gem_mman.c
> +++ b/lib/i915/gem_mman.c
> @@ -580,6 +580,8 @@ void *gem_mmap__cpu_coherent(int fd, uint32_t handle, uint64_t offset,
>	igt_assert(offset == 0);
>
>	ptr = __gem_mmap__cpu_coherent(fd, handle, offset, size, prot);
> +	if (!ptr)
> +		ptr = __gem_mmap_offset__fixed(fd, handle, offset, size, prot);
>	igt_assert(ptr);

Shouldn't this go in __gem_mmap__cpu_coherent instead? Maybe right after
__gem_mmap_offset__cpu.
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^ permalink raw reply	[flat|nested] 18+ messages in thread

* Re: [Intel-gfx] [PATCH i-g-t v2 04/11] lib/i915/gem_mman: add fixed mode to gem_mmap__cpu
  2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 04/11] lib/i915/gem_mman: add fixed mode to gem_mmap__cpu Matthew Auld
@ 2021-07-28 23:07   ` Dixit, Ashutosh
  2021-07-29  8:50     ` Matthew Auld
  0 siblings, 1 reply; 18+ messages in thread
From: Dixit, Ashutosh @ 2021-07-28 23:07 UTC (permalink / raw)
  To: Matthew Auld; +Cc: igt-dev, Daniel Vetter, intel-gfx

On Wed, 28 Jul 2021 03:30:34 -0700, Matthew Auld wrote:
>
> diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
> index 337d28fb..6f5e6d72 100644
> --- a/lib/i915/gem_mman.c
> +++ b/lib/i915/gem_mman.c
> @@ -434,7 +434,13 @@ void *gem_mmap__device_coherent(int fd, uint32_t handle, uint64_t offset,
>   */
>  void *__gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
>  {
> -	return __gem_mmap(fd, handle, offset, size, prot, 0);
> +	void *ptr;
> +
> +	ptr = __gem_mmap(fd, handle, offset, size, prot, 0);
> +	if (!ptr)
> +		ptr = __gem_mmap_offset__fixed(fd, handle, offset, size, prot);
> +
> +	return ptr;

What about __gem_mmap__wc? Also shouldn't we just fix the __gem_mmap_offset
fallback in __gem_mmap and that will take care of both __gem_mmap__cpu and
__gem_mmap__wc?

(I think it will actually also fix __gem_mmap__device_coherent and
__gem_mmap__cpu_coherent but maybe we can still have those patches in this
series especially if they save a couple of system calls).
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^ permalink raw reply	[flat|nested] 18+ messages in thread

* Re: [Intel-gfx] [PATCH i-g-t v2 04/11] lib/i915/gem_mman: add fixed mode to gem_mmap__cpu
  2021-07-28 23:07   ` Dixit, Ashutosh
@ 2021-07-29  8:50     ` Matthew Auld
  2021-08-02  6:29       ` Dixit, Ashutosh
  0 siblings, 1 reply; 18+ messages in thread
From: Matthew Auld @ 2021-07-29  8:50 UTC (permalink / raw)
  To: Dixit, Ashutosh; +Cc: igt-dev, Daniel Vetter, intel-gfx

On 29/07/2021 00:07, Dixit, Ashutosh wrote:
> On Wed, 28 Jul 2021 03:30:34 -0700, Matthew Auld wrote:
>>
>> diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
>> index 337d28fb..6f5e6d72 100644
>> --- a/lib/i915/gem_mman.c
>> +++ b/lib/i915/gem_mman.c
>> @@ -434,7 +434,13 @@ void *gem_mmap__device_coherent(int fd, uint32_t handle, uint64_t offset,
>>    */
>>   void *__gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
>>   {
>> -	return __gem_mmap(fd, handle, offset, size, prot, 0);
>> +	void *ptr;
>> +
>> +	ptr = __gem_mmap(fd, handle, offset, size, prot, 0);
>> +	if (!ptr)
>> +		ptr = __gem_mmap_offset__fixed(fd, handle, offset, size, prot);
>> +
>> +	return ptr;
> 
> What about __gem_mmap__wc? Also shouldn't we just fix the __gem_mmap_offset
> fallback in __gem_mmap and that will take care of both __gem_mmap__cpu and
> __gem_mmap__wc?

For gem_mmap__wc it felt like slightly too much lying, since on discrete 
smem-only buffers are always wb, and so the __wc here is not what the 
user gets with the new FIXED mode. gem_mmap__device_coherent() I think 
matches this new behaviour well, where we don't explicitly state what 
the mapping type is, but instead just guarantee that the returned 
mapping is device coherent. My rough thinking was to convert most users 
of __wc over to __device_coherent(), at least in the tests that we care 
about for discrete?

On the other hand if we are happy with the lie, I don't think anything 
will break, and pretty much all testscases using mmap I think should 
just magically work on discrete, and it does mean a less less work vs 
converting to __device_coherent?

> 
> (I think it will actually also fix __gem_mmap__device_coherent and
> __gem_mmap__cpu_coherent but maybe we can still have those patches in this
> series especially if they save a couple of system calls).
> 
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^ permalink raw reply	[flat|nested] 18+ messages in thread

* Re: [Intel-gfx] [PATCH i-g-t v2 01/11] lib/i915/gem_mman: add FIXED mmap mode
  2021-07-28 22:20 ` [Intel-gfx] [PATCH i-g-t v2 01/11] lib/i915/gem_mman: add FIXED mmap mode Dixit, Ashutosh
@ 2021-07-30  2:03   ` Dixit, Ashutosh
  0 siblings, 0 replies; 18+ messages in thread
From: Dixit, Ashutosh @ 2021-07-30  2:03 UTC (permalink / raw)
  To: Matthew Auld; +Cc: igt-dev, Daniel Vetter, intel-gfx

On Wed, 28 Jul 2021 15:20:15 -0700, Dixit, Ashutosh wrote:
>
> On Wed, 28 Jul 2021 03:30:31 -0700, Matthew Auld wrote:
> >
> > diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
> > index 4b4f2114..e2514f0c 100644
> > --- a/lib/i915/gem_mman.c
> > +++ b/lib/i915/gem_mman.c
> > @@ -497,6 +497,43 @@ void *gem_mmap_offset__cpu(int fd, uint32_t handle, uint64_t offset,
> >	return ptr;
> >  }
> >
> > +#define LOCAL_I915_MMAP_OFFSET_FIXED 4
>
> At the minimum for now let's get rid of the LOCAL_ prefix here. Even if
> this appears in i915_drm.h later, gcc will only complain if the value
> diverges.

We just merged lib/i915/i915_drm_local.h so any declarations which we are
expecting appear to later appear in i915_drm.h should be added there,
without the LOCAL_ prefix. So they should be added just as we are expecting
them to appear later in i915_drm.h. Thanks.
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^ permalink raw reply	[flat|nested] 18+ messages in thread

* Re: [Intel-gfx] [PATCH i-g-t v2 04/11] lib/i915/gem_mman: add fixed mode to gem_mmap__cpu
  2021-07-29  8:50     ` Matthew Auld
@ 2021-08-02  6:29       ` Dixit, Ashutosh
  0 siblings, 0 replies; 18+ messages in thread
From: Dixit, Ashutosh @ 2021-08-02  6:29 UTC (permalink / raw)
  To: Matthew Auld
  Cc: igt-dev, intel-gfx, Maarten Lankhorst, Daniel Vetter, Ramalingam C

On Thu, 29 Jul 2021 01:50:45 -0700, Matthew Auld wrote:
>

Hi Matt,

> On 29/07/2021 00:07, Dixit, Ashutosh wrote:
> > On Wed, 28 Jul 2021 03:30:34 -0700, Matthew Auld wrote:
> >>
> >> diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
> >> index 337d28fb..6f5e6d72 100644
> >> --- a/lib/i915/gem_mman.c
> >> +++ b/lib/i915/gem_mman.c
> >> @@ -434,7 +434,13 @@ void *gem_mmap__device_coherent(int fd, uint32_t handle, uint64_t offset,
> >>    */
> >>   void *__gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
> >>   {
> >> -	return __gem_mmap(fd, handle, offset, size, prot, 0);
> >> +	void *ptr;
> >> +
> >> +	ptr = __gem_mmap(fd, handle, offset, size, prot, 0);
> >> +	if (!ptr)
> >> +		ptr = __gem_mmap_offset__fixed(fd, handle, offset, size, prot);
> >> +
> >> +	return ptr;
> >
> > What about __gem_mmap__wc? Also shouldn't we just fix the __gem_mmap_offset
> > fallback in __gem_mmap and that will take care of both __gem_mmap__cpu and
> > __gem_mmap__wc?
>
> For gem_mmap__wc it felt like slightly too much lying, since on discrete
> smem-only buffers are always wb, and so the __wc here is not what the user
> gets with the new FIXED mode.

Correct.

> gem_mmap__device_coherent() I think matches this new behaviour well,
> where we don't explicitly state what the mapping type is, but instead
> just guarantee that the returned mapping is device coherent. My rough
> thinking was to convert most users of __wc over to __device_coherent(),
> at least in the tests that we care about for discrete?

Correct, though note that ALL tests will run on discrete (though with
smem-only buffers with today's IGT since I don't believe we have added any
tests which create lmem buffers yet).

> On the other hand if we are happy with the lie, I don't think anything will
> break, and pretty much all testscases using mmap I think should just
> magically work on discrete, and it does mean a less less work vs converting
> to __device_coherent?

I lost you here since I really don't know what you mean by not changing to
__device_coherent because afaiu gem_mmap__wc and gem_mmap_offset__wc will
fail on discrete so we can't just not do anything.

Next, I have no idea what is working and what is not working with the
present series on DG1 (since the CI is showing all red on DG1 and I don't
believe DG1 is included in showing regressions) and whether or not we have
completed these FIXED related changes, so is this series complete or not?

Afais since this series hasn't done anything about wc (except
__device_coherent), any test which does wc will fail on discrete.

> >
> > (I think it will actually also fix __gem_mmap__device_coherent and
> > __gem_mmap__cpu_coherent but maybe we can still have those patches in this
> > series especially if they save a couple of system calls).

Last, I believe I have a very simple solution to this FIXED
conundrum. Which I believe works (you guys can tell me if it doesn't) but
what I am not sure is whether it is an acceptable programming paradigm.

Let us say, on discrete, we decide that we won't make any changes to any of
the tests (we'll change on the library), and the tests themselves will not
even be aware of the FIXED mode. The tests always ask for WC or WB but
under the hood we will convert those calls to FIXED on discrete. So the
tests ask for WC or WB but that will mean FIXED on discrete.

Then I believe all we need to do is make a single very simple change to the
function __gem_mmap_offset(). In this functions, if we see WC or WB we will
convert that to FIXED before issuing the ioctl (or alternative issue the
ioctl but if it returns error we will retry with FIXED).

This works even for __gem_mmap() because __gem_mmap() itself falls back to
__gem_mmap_offset(). So afais we don't need to make ANY changes to ANY of
the higher level functions because we have fixed it in the lowest level
function. If we do it this way we won't need most of the first 7 patches in
the series. (This is what I was saying in the previous reply too).

But like I said whether we want to do this or not we have to decide and I
want other CC'd reviewers to chime in on this. It doesn't mean that we
cannot make changes to higher level functions if it makes things more
efficient or if we want to proliferate the FIXED mode throughout IGT but I
think changing the lowest level function is sufficient to fix failing
tests.

Thanks.
--
Ashutosh

^ permalink raw reply	[flat|nested] 18+ messages in thread

end of thread, other threads:[~2021-08-02  6:29 UTC | newest]

Thread overview: 18+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-07-28 10:30 [Intel-gfx] [PATCH i-g-t v2 01/11] lib/i915/gem_mman: add FIXED mmap mode Matthew Auld
2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 02/11] lib/i915/gem_mman: add fixed mode to mmap__device_coherent Matthew Auld
2021-07-28 22:23   ` Dixit, Ashutosh
2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 03/11] lib/i915/gem_mman: add fixed mode to mmap__cpu_coherent Matthew Auld
2021-07-28 22:24   ` Dixit, Ashutosh
2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 04/11] lib/i915/gem_mman: add fixed mode to gem_mmap__cpu Matthew Auld
2021-07-28 23:07   ` Dixit, Ashutosh
2021-07-29  8:50     ` Matthew Auld
2021-08-02  6:29       ` Dixit, Ashutosh
2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 05/11] lib/i915/gem_mman: update mmap_offset_types with FIXED Matthew Auld
2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 06/11] lib/ioctl_wrappers: update mmap_{read, write} for discrete Matthew Auld
2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 07/11] lib/intel_bufops: " Matthew Auld
2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 08/11] lib/ioctl_wrappers: update set_domain " Matthew Auld
2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 09/11] tests/i915/module_load: update " Matthew Auld
2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 10/11] lib/i915/gem_mman: add helper query for has_device_coherent Matthew Auld
2021-07-28 10:30 ` [Intel-gfx] [PATCH i-g-t v2 11/11] tests/i915/gem_exec_fence: use device_coherent mmap Matthew Auld
2021-07-28 22:20 ` [Intel-gfx] [PATCH i-g-t v2 01/11] lib/i915/gem_mman: add FIXED mmap mode Dixit, Ashutosh
2021-07-30  2:03   ` Dixit, Ashutosh

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