From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 71567C433F5 for ; Wed, 8 Sep 2021 12:26:34 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D940B60E77 for ; Wed, 8 Sep 2021 12:26:33 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org D940B60E77 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7A8D389A98; Wed, 8 Sep 2021 12:26:33 +0000 (UTC) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9AFDA89A98; Wed, 8 Sep 2021 12:26:32 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10100"; a="281484239" X-IronPort-AV: E=Sophos;i="5.85,277,1624345200"; d="scan'208";a="281484239" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Sep 2021 05:26:31 -0700 X-IronPort-AV: E=Sophos;i="5.85,277,1624345200"; d="scan'208";a="547775620" Received: from scelesti-mobl.amr.corp.intel.com (HELO [10.249.254.176]) ([10.249.254.176]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Sep 2021 05:26:30 -0700 Message-ID: From: Thomas =?ISO-8859-1?Q?Hellstr=F6m?= To: Matthew Auld , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: maarten.lankhorst@linux.intel.com Date: Wed, 08 Sep 2021 14:26:27 +0200 In-Reply-To: <160c96ac-3cf2-5542-9ad0-bbc0b5ebec55@intel.com> References: <20210906165515.450541-1-thomas.hellstrom@linux.intel.com> <20210906165515.450541-6-thomas.hellstrom@linux.intel.com> <160c96ac-3cf2-5542-9ad0-bbc0b5ebec55@intel.com> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.40.4 (3.40.4-1.fc34) MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: Re: [Intel-gfx] [PATCH v2 5/6] drm/i915: Don't back up pinned LMEM context images and rings during suspend X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Wed, 2021-09-08 at 12:07 +0100, Matthew Auld wrote: > On 06/09/2021 17:55, Thomas Hellström wrote: > > Pinned context images are now reset during resume. Don't back them > > up, > > and assuming that rings can be assumed empty at suspend, don't back > > them > > up either. > > > > Introduce a new object flag, I915_BO_ALLOC_PM_VOLATILE meaning that > > an > > object is allowed to lose its content on suspend. > > > > Signed-off-by: Thomas Hellström > > --- > >   .../gpu/drm/i915/gem/i915_gem_object_types.h    | 17 ++++++++++-- > > ----- > >   drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c      |  3 +++ > >   drivers/gpu/drm/i915/gt/intel_lrc.c             |  3 ++- > >   drivers/gpu/drm/i915/gt/intel_ring.c            |  3 ++- > >   4 files changed, 17 insertions(+), 9 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h > > b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h > > index 734cc8e16481..66123ba46247 100644 > > --- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h > > +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h > > @@ -288,16 +288,19 @@ struct drm_i915_gem_object { > >         I915_SELFTEST_DECLARE(struct list_head st_link); > >   > >         unsigned long flags; > > -#define I915_BO_ALLOC_CONTIGUOUS BIT(0) > > -#define I915_BO_ALLOC_VOLATILE   BIT(1) > > -#define I915_BO_ALLOC_CPU_CLEAR  BIT(2) > > -#define I915_BO_ALLOC_USER       BIT(3) > > +#define I915_BO_ALLOC_CONTIGUOUS  BIT(0) > > +#define I915_BO_ALLOC_VOLATILE    BIT(1) > > +#define I915_BO_ALLOC_CPU_CLEAR   BIT(2) > > +#define I915_BO_ALLOC_USER        BIT(3) > > +/* Object may lose its contents on suspend / resume */ > > +#define I915_BO_ALLOC_PM_VOLATILE BIT(4) > > PM_SKIP_PINNED? Not sure if that is better. I think we could update the comment to say "object is allowed to lose..", I think we could keep PM_VOLATILE to keep it consistent with the ALLOC_VOLATILE flag? /Thomas