From: "Belgaumkar, Vinay" <vinay.belgaumkar@intel.com>
To: Michal Wajdeczko <michal.wajdeczko@intel.com>,
<intel-gfx@lists.freedesktop.org>,
<dri-devel@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 02/15] drm/i915/guc/slpc: Initial definitions for SLPC
Date: Tue, 27 Jul 2021 11:47:02 -0700 [thread overview]
Message-ID: <dd0835a6-713f-06e0-c0e1-3625e89dce19@intel.com> (raw)
In-Reply-To: <f78d8fe0-cb2a-7c66-fcac-caa185ef7de2@intel.com>
On 7/27/2021 6:43 AM, Michal Wajdeczko wrote:
>
>
> On 26.07.2021 21:07, Vinay Belgaumkar wrote:
>> Add macros to check for SLPC support. This feature is currently supported
>> for Gen12+ and enabled whenever GuC submission is enabled/selected.
>>
>> Include templates for SLPC init/fini and enable.
>>
>> v2: Move SLPC helper functions to intel_guc_slpc.c/.h. Define basic
>> template for SLPC structure in intel_guc_slpc_types.h. Fix copyright (Michal W)
>>
>> v3: Review comments (Michal W)
>>
>> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
>> Signed-off-by: Sundaresan Sujaritha <sujaritha.sundaresan@intel.com>
>> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>>
>> drm/i915/guc/slpc: Lay out slpc init/enable/fini
>>
>> Declare init/fini and enable function templates.
>>
>> v2: Rebase
>>
>> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
>> Signed-off-by: Sundaresan Sujaritha <sujaritha.sundaresan@intel.com>
>> ---
>> drivers/gpu/drm/i915/Makefile | 1 +
>> drivers/gpu/drm/i915/gt/uc/intel_guc.c | 2 +
>> drivers/gpu/drm/i915/gt/uc/intel_guc.h | 4 ++
>> drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 45 +++++++++++++++++++
>> drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h | 33 ++++++++++++++
>> .../gpu/drm/i915/gt/uc/intel_guc_slpc_types.h | 12 +++++
>> drivers/gpu/drm/i915/gt/uc/intel_uc.c | 6 ++-
>> drivers/gpu/drm/i915/gt/uc/intel_uc.h | 2 +
>> 8 files changed, 103 insertions(+), 2 deletions(-)
>> create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
>> create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
>> create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h
>>
>> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
>> index ab7679957623..d8eac4468df9 100644
>> --- a/drivers/gpu/drm/i915/Makefile
>> +++ b/drivers/gpu/drm/i915/Makefile
>> @@ -186,6 +186,7 @@ i915-y += gt/uc/intel_uc.o \
>> gt/uc/intel_guc_fw.o \
>> gt/uc/intel_guc_log.o \
>> gt/uc/intel_guc_log_debugfs.o \
>> + gt/uc/intel_guc_slpc.o \
>> gt/uc/intel_guc_submission.o \
>> gt/uc/intel_huc.o \
>> gt/uc/intel_huc_debugfs.o \
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
>> index 979128e28372..39bc3c16057b 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
>> @@ -7,6 +7,7 @@
>> #include "gt/intel_gt_irq.h"
>> #include "gt/intel_gt_pm_irq.h"
>> #include "intel_guc.h"
>> +#include "intel_guc_slpc.h"
>> #include "intel_guc_ads.h"
>> #include "intel_guc_submission.h"
>> #include "i915_drv.h"
>> @@ -157,6 +158,7 @@ void intel_guc_init_early(struct intel_guc *guc)
>> intel_guc_ct_init_early(&guc->ct);
>> intel_guc_log_init_early(&guc->log);
>> intel_guc_submission_init_early(guc);
>> + intel_guc_slpc_init_early(&guc->slpc);
>>
>> mutex_init(&guc->send_mutex);
>> spin_lock_init(&guc->irq_lock);
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
>> index a9547069ee7e..15ad2eaee473 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
>> @@ -15,6 +15,7 @@
>> #include "intel_guc_ct.h"
>> #include "intel_guc_log.h"
>> #include "intel_guc_reg.h"
>> +#include "intel_guc_slpc_types.h"
>> #include "intel_uc_fw.h"
>> #include "i915_utils.h"
>> #include "i915_vma.h"
>> @@ -30,6 +31,7 @@ struct intel_guc {
>> struct intel_uc_fw fw;
>> struct intel_guc_log log;
>> struct intel_guc_ct ct;
>> + struct intel_guc_slpc slpc;
>>
>> /* Global engine used to submit requests to GuC */
>> struct i915_sched_engine *sched_engine;
>> @@ -57,6 +59,8 @@ struct intel_guc {
>>
>> bool submission_supported;
>> bool submission_selected;
>> + bool slpc_supported;
>> + bool slpc_selected;
>
> (I know that you were following existing code, but we might do better
> and since you have to resend it anyway without patch 1/15 ...)
>
> as we have here:
>
> + struct intel_guc_slpc slpc;
>
> then maybe both supported/selected shall be moved there as:
>
> struct intel_guc_slpc {
> + bool supported;
> + bool selected;
> };
>
> so the struct wont be empty any more, with that fixed:
>
> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Ok, done,
Thanks for the review,
Vinay.
>
>>
>> struct i915_vma *ads_vma;
>> struct __guc_ads_blob *ads_blob;
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
>> new file mode 100644
>> index 000000000000..7275100ef8f8
>> --- /dev/null
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
>> @@ -0,0 +1,45 @@
>> +// SPDX-License-Identifier: MIT
>> +/*
>> + * Copyright © 2021 Intel Corporation
>> + */
>> +
>> +#include "i915_drv.h"
>> +#include "intel_guc_slpc.h"
>> +#include "gt/intel_gt.h"
>> +
>> +static inline struct intel_guc *slpc_to_guc(struct intel_guc_slpc *slpc)
>> +{
>> + return container_of(slpc, struct intel_guc, slpc);
>> +}
>> +
>> +static bool __detect_slpc_supported(struct intel_guc *guc)
>> +{
>> + /* GuC SLPC is unavailable for pre-Gen12 */
>> + return guc->submission_supported &&
>> + GRAPHICS_VER(guc_to_gt(guc)->i915) >= 12;
>> +}
>> +
>> +static bool __guc_slpc_selected(struct intel_guc *guc)
>> +{
>> + if (!intel_guc_slpc_is_supported(guc))
>> + return false;
>> +
>> + return guc->submission_selected;
>> +}
>> +
>> +void intel_guc_slpc_init_early(struct intel_guc_slpc *slpc)
>> +{
>> + struct intel_guc *guc = slpc_to_guc(slpc);
>> +
>> + guc->slpc_supported = __detect_slpc_supported(guc);
>> + guc->slpc_selected = __guc_slpc_selected(guc);
>> +}
>> +
>> +int intel_guc_slpc_init(struct intel_guc_slpc *slpc)
>> +{
>> + return 0;
>> +}
>> +
>> +void intel_guc_slpc_fini(struct intel_guc_slpc *slpc)
>> +{
>> +}
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
>> new file mode 100644
>> index 000000000000..c3b0ad7f0f93
>> --- /dev/null
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
>> @@ -0,0 +1,33 @@
>> +/* SPDX-License-Identifier: MIT */
>> +/*
>> + * Copyright © 2021 Intel Corporation
>> + */
>> +
>> +#ifndef _INTEL_GUC_SLPC_H_
>> +#define _INTEL_GUC_SLPC_H_
>> +
>> +#include "intel_guc_submission.h"
>> +#include "intel_guc_slpc_types.h"
>> +
>> +static inline bool intel_guc_slpc_is_supported(struct intel_guc *guc)
>> +{
>> + return guc->slpc_supported;
>> +}
>> +
>> +static inline bool intel_guc_slpc_is_wanted(struct intel_guc *guc)
>> +{
>> + return guc->slpc_selected;
>> +}
>> +
>> +static inline bool intel_guc_slpc_is_used(struct intel_guc *guc)
>> +{
>> + return intel_guc_submission_is_used(guc) && intel_guc_slpc_is_wanted(guc);
>> +}
>> +
>> +void intel_guc_slpc_init_early(struct intel_guc_slpc *slpc);
>> +
>> +int intel_guc_slpc_init(struct intel_guc_slpc *slpc);
>> +int intel_guc_slpc_enable(struct intel_guc_slpc *slpc);
>> +void intel_guc_slpc_fini(struct intel_guc_slpc *slpc);
>> +
>> +#endif
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h
>> new file mode 100644
>> index 000000000000..bfe4a7f9ce15
>> --- /dev/null
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h
>> @@ -0,0 +1,12 @@
>> +/* SPDX-License-Identifier: MIT */
>> +/*
>> + * Copyright © 2021 Intel Corporation
>> + */
>> +
>> +#ifndef _INTEL_GUC_SLPC_TYPES_H_
>> +#define _INTEL_GUC_SLPC_TYPES_H_
>> +
>> +struct intel_guc_slpc {
>> +};
>> +
>> +#endif
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
>> index da57d18d9f6b..e6bd9406c7b2 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
>> @@ -75,16 +75,18 @@ static void __confirm_options(struct intel_uc *uc)
>> struct drm_i915_private *i915 = uc_to_gt(uc)->i915;
>>
>> drm_dbg(&i915->drm,
>> - "enable_guc=%d (guc:%s submission:%s huc:%s)\n",
>> + "enable_guc=%d (guc:%s submission:%s huc:%s slpc:%s)\n",
>> i915->params.enable_guc,
>> yesno(intel_uc_wants_guc(uc)),
>> yesno(intel_uc_wants_guc_submission(uc)),
>> - yesno(intel_uc_wants_huc(uc)));
>> + yesno(intel_uc_wants_huc(uc)),
>> + yesno(intel_uc_wants_guc_slpc(uc)));
>>
>> if (i915->params.enable_guc == 0) {
>> GEM_BUG_ON(intel_uc_wants_guc(uc));
>> GEM_BUG_ON(intel_uc_wants_guc_submission(uc));
>> GEM_BUG_ON(intel_uc_wants_huc(uc));
>> + GEM_BUG_ON(intel_uc_wants_guc_slpc(uc));
>> return;
>> }
>>
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.h b/drivers/gpu/drm/i915/gt/uc/intel_uc.h
>> index e2da2b6e76e1..925a58ca6b94 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.h
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.h
>> @@ -8,6 +8,7 @@
>>
>> #include "intel_guc.h"
>> #include "intel_guc_submission.h"
>> +#include "intel_guc_slpc.h"
>> #include "intel_huc.h"
>> #include "i915_params.h"
>>
>> @@ -83,6 +84,7 @@ __uc_state_checker(x, func, uses, used)
>> uc_state_checkers(guc, guc);
>> uc_state_checkers(huc, huc);
>> uc_state_checkers(guc, guc_submission);
>> +uc_state_checkers(guc, guc_slpc);
>>
>> #undef uc_state_checkers
>> #undef __uc_state_checker
>>
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next prev parent reply other threads:[~2021-07-27 18:47 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-26 19:07 [Intel-gfx] [PATCH v3 00/15] drm/i915/guc/slpc: Enable GuC based power management features Vinay Belgaumkar
2021-07-26 19:07 ` [Intel-gfx] [PATCH 01/15] drm/i915/guc: SQUASHED PATCH - DO NOT REVIEW Vinay Belgaumkar
2021-07-26 19:07 ` [Intel-gfx] [PATCH 02/15] drm/i915/guc/slpc: Initial definitions for SLPC Vinay Belgaumkar
2021-07-27 13:43 ` Michal Wajdeczko
2021-07-27 18:47 ` Belgaumkar, Vinay [this message]
2021-07-26 19:07 ` [Intel-gfx] [PATCH 03/15] drm/i915/guc/slpc: Gate Host RPS when SLPC is enabled Vinay Belgaumkar
2021-07-27 22:44 ` Matthew Brost
2021-07-27 22:48 ` Belgaumkar, Vinay
2021-07-27 22:50 ` Matthew Brost
2021-07-26 19:07 ` [Intel-gfx] [PATCH 04/15] drm/i915/guc/slpc: Adding SLPC communication interfaces Vinay Belgaumkar
2021-07-27 13:59 ` Michal Wajdeczko
2021-07-27 19:03 ` Belgaumkar, Vinay
2021-07-26 19:07 ` [Intel-gfx] [PATCH 05/15] drm/i915/guc/slpc: Allocate, initialize and release SLPC Vinay Belgaumkar
2021-07-27 14:03 ` Michal Wajdeczko
2021-07-26 19:07 ` [Intel-gfx] [PATCH 06/15] drm/i915/guc/slpc: Enable SLPC and add related H2G events Vinay Belgaumkar
2021-07-27 15:12 ` Michal Wajdeczko
2021-07-27 20:00 ` Belgaumkar, Vinay
2021-07-27 20:19 ` Michal Wajdeczko
2021-07-27 20:52 ` Belgaumkar, Vinay
2021-07-26 19:07 ` [Intel-gfx] [PATCH 07/15] drm/i915/guc/slpc: Remove BUG_ON in guc_submission_disable Vinay Belgaumkar
2021-07-28 0:20 ` Matthew Brost
2021-07-28 1:01 ` Belgaumkar, Vinay
2021-07-28 1:06 ` Matthew Brost
2021-07-26 19:07 ` [Intel-gfx] [PATCH 08/15] drm/i915/guc/slpc: Add methods to set min/max frequency Vinay Belgaumkar
2021-07-27 15:24 ` Michal Wajdeczko
2021-07-27 22:35 ` Belgaumkar, Vinay
2021-07-28 4:03 ` Belgaumkar, Vinay
2021-07-26 19:07 ` [Intel-gfx] [PATCH 09/15] drm/i915/guc/slpc: Add get max/min freq hooks Vinay Belgaumkar
2021-07-27 15:32 ` Michal Wajdeczko
2021-07-27 23:10 ` Belgaumkar, Vinay
2021-07-26 19:07 ` [Intel-gfx] [PATCH 10/15] drm/i915/guc/slpc: Add debugfs for SLPC info Vinay Belgaumkar
2021-07-27 15:37 ` Michal Wajdeczko
2021-07-28 0:10 ` Belgaumkar, Vinay
2021-07-26 19:07 ` [Intel-gfx] [PATCH 11/15] drm/i915/guc/slpc: Enable ARAT timer interrupt Vinay Belgaumkar
2021-07-27 15:40 ` Matthew Brost
2021-07-28 0:15 ` Belgaumkar, Vinay
2021-07-26 19:07 ` [Intel-gfx] [PATCH 12/15] drm/i915/guc/slpc: Cache platform frequency limits Vinay Belgaumkar
2021-07-27 16:00 ` Michal Wajdeczko
2021-07-28 1:27 ` Belgaumkar, Vinay
2021-07-26 19:07 ` [Intel-gfx] [PATCH 13/15] drm/i915/guc/slpc: Sysfs hooks for SLPC Vinay Belgaumkar
2021-07-27 16:59 ` Michal Wajdeczko
2021-07-28 15:29 ` Belgaumkar, Vinay
2021-07-26 19:07 ` [Intel-gfx] [PATCH 14/15] drm/i915/guc/slpc: Add SLPC selftest Vinay Belgaumkar
2021-07-27 19:16 ` Matthew Brost
2021-07-27 22:25 ` Belgaumkar, Vinay
2021-07-26 19:08 ` [Intel-gfx] [PATCH 15/15] drm/i915/guc/rc: Setup and enable GUCRC feature Vinay Belgaumkar
2021-07-27 15:37 ` Matt Roper
2021-07-27 16:18 ` Belgaumkar, Vinay
2021-07-27 19:49 ` Matt Roper
2021-07-26 19:34 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc/slpc: Enable GuC based power management features Patchwork
2021-07-26 19:36 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-07-26 19:59 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-07-26 23:32 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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