From: "Thomas Hellström (Intel)" <thomas_os@shipmail.org>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915/selftests: Flush the active barriers before asserting
Date: Wed, 29 Jul 2020 11:39:46 +0200 [thread overview]
Message-ID: <fdf6f18e-3034-6fd4-0462-c404d23da62d@shipmail.org> (raw)
In-Reply-To: <20200728153325.28351-1-chris@chris-wilson.co.uk>
On 7/28/20 5:33 PM, Chris Wilson wrote:
> Before we peek at the barrier status for an assert, first serialise with
> its callbacks so that we see a stable value.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
> drivers/gpu/drm/i915/gt/selftest_context.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/selftest_context.c b/drivers/gpu/drm/i915/gt/selftest_context.c
> index 52af1cee9a94..1f4020e906a8 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_context.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_context.c
> @@ -68,6 +68,8 @@ static int context_sync(struct intel_context *ce)
> } while (!err);
> mutex_unlock(&tl->mutex);
>
> + /* Wait for all barriers to complete (remote CPU) before we check */
> + i915_active_unlock_wait(&ce->active);
> return err;
> }
>
Reviewed-by: Thomas Hellström <thomas.hellstrom@intel.com>
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prev parent reply other threads:[~2020-07-29 9:40 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-28 15:33 [Intel-gfx] [PATCH] drm/i915/selftests: Flush the active barriers before asserting Chris Wilson
2020-07-28 21:09 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for " Patchwork
2020-07-28 21:30 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-07-29 6:31 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-07-29 9:39 ` Thomas Hellström (Intel) [this message]
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