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From: Dave Martin <Dave.Martin@arm.com>
To: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	Kees Cook <keescook@chromium.org>, Arnd Bergmann <arnd@arndb.de>,
	Nicolas Pitre <nico@linaro.org>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Kernel Hardening <kernel-hardening@lists.openwall.com>,
	Russell King <linux@armlinux.org.uk>,
	Tony Lindgren <tony@atomide.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	Thomas Garnier <thgarnie@google.com>,
	Matt Fleming <matt@codeblueprint.co.uk>
Subject: [kernel-hardening] Re: [PATCH 17/30] arm-soc: tegra: make sleep asm code runtime relocatable
Date: Mon, 14 Aug 2017 16:29:15 +0100	[thread overview]
Message-ID: <20170814152915.GS6321@e103592.cambridge.arm.com> (raw)
In-Reply-To: <CAKv+Gu8v7yKzxgmsjwBvPP=4riJ7QKj96vvQ2KMmBaHDmHXe7Q@mail.gmail.com>

On Mon, Aug 14, 2017 at 03:49:15PM +0100, Ard Biesheuvel wrote:
> On 14 August 2017 at 15:42, Dave Martin <Dave.Martin@arm.com> wrote:
> > On Mon, Aug 14, 2017 at 01:53:58PM +0100, Ard Biesheuvel wrote:
> >> The PIE kernel build does not allow absolute references encoded in
> >> movw/movt instruction pairs, so use our mov_l macro instead (which
> >> will still use such a pair unless CONFIG_RELOCATABLE is defined)
> >>
> >> Also, avoid 32-bit absolute literals to refer to absolute symbols.
> >> Instead, use a 16 bit reference so that PIE linker cannot get
> >> confused whether the symbol reference is subject to relocation at
> >> runtime.
> >
> > This sounds like we're papering over something.
> >
> > If the linker is "confused", that sounds like we are either abusing
> > it somehow, or the linker is broken.
> >
> 
> There is some ambiguity in how SHN_ABS symbols are treated in shared
> libraries and PIE executables.
> 
> https://sourceware.org/ml/binutils/2012-05/msg00019.html
> 
> I haven't confirmed whether it actually causes problems in this
> particular case, but it is safer (and not entirely inappropriate) to
> use a 16-bit field for a quantity that can easily fit one.

OK, so, fundamental linker design flaw that cannot be fixed for
historical reasons.  Gotcha.

This "fix" feels like a bit of a hack, since it relies on the absence of
a certain relocation type that could be added later (though it seems
highly unlikely).


Cleaner options would be to expose both symbols that are subtracted,
rather than the result, or to do the subtraction at build time and
generate a header that affected files include (though that's more
invasive on the Makefile side).

May be overkill though.

> 
> >
> >> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> >> ---
> >>  arch/arm/mach-tegra/sleep-tegra20.S | 22 ++++++++++++--------
> >>  arch/arm/mach-tegra/sleep-tegra30.S |  6 +++---
> >>  arch/arm/mach-tegra/sleep.S         |  4 ++--
> >>  3 files changed, 18 insertions(+), 14 deletions(-)
> >>
> >> diff --git a/arch/arm/mach-tegra/sleep-tegra20.S b/arch/arm/mach-tegra/sleep-tegra20.S
> >> index 5c8e638ee51a..cab95de5c8f1 100644
> >> --- a/arch/arm/mach-tegra/sleep-tegra20.S
> >> +++ b/arch/arm/mach-tegra/sleep-tegra20.S
> >> @@ -99,7 +99,7 @@ ENTRY(tegra20_cpu_shutdown)
> >>       cmp     r0, #0
> >>       reteq   lr                      @ must not be called for CPU 0
> >>       mov32   r1, TEGRA_IRAM_RESET_BASE_VIRT
> >> -     ldr     r2, =__tegra20_cpu1_resettable_status_offset
> >> +     ldrh    r2, 0f
> >>       mov     r12, #CPU_RESETTABLE
> >>       strb    r12, [r1, r2]
> >>
> >> @@ -121,6 +121,7 @@ ENTRY(tegra20_cpu_shutdown)
> >>       beq     .
> >>       ret     lr
> >>  ENDPROC(tegra20_cpu_shutdown)
> >> +0:   .short  __tegra20_cpu1_resettable_status_offset
> >>  #endif
> >>
> >>  #ifdef CONFIG_PM_SLEEP
> >> @@ -181,6 +182,9 @@ ENTRY(tegra_pen_unlock)
> >>       ret     lr
> >>  ENDPROC(tegra_pen_unlock)
> >>
> >> +.L__tegra20_cpu1_resettable_status_offset:
> >> +     .short  __tegra20_cpu1_resettable_status_offset
> >> +
> >>  /*
> >>   * tegra20_cpu_clear_resettable(void)
> >>   *
> >> @@ -189,7 +193,7 @@ ENDPROC(tegra_pen_unlock)
> >>   */
> >>  ENTRY(tegra20_cpu_clear_resettable)
> >>       mov32   r1, TEGRA_IRAM_RESET_BASE_VIRT
> >
> > Can we simply port mov32 to mov_l?  Or do we hit a problem with
> > multiplatform kernels where mov_l may involve a literal pool entry
> > (and does it matter)?
> >
> 
> The only place where it matters is in code that lives in idmap.text,
> since the relative reference will point to the ID mapped alias of a
> section that is not covered by the ID ID map. I think we should be
> able to use mov_l everywhere else, and it should do the right thing
> for ordinary and PIE builds

Fair enough.

Cheers
---Dave

  reply	other threads:[~2017-08-14 15:29 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-14 12:53 [kernel-hardening] [PATCH 00/30] implement KASLR for ARM Ard Biesheuvel
2017-08-14 12:53 ` [kernel-hardening] [PATCH 01/30] asm-generic: add .data.rel.ro sections to __ro_after_init Ard Biesheuvel
2017-08-14 14:26   ` [kernel-hardening] " Arnd Bergmann
2017-08-14 12:53 ` [kernel-hardening] [PATCH 02/30] ARM: assembler: introduce adr_l, ldr_l and str_l macros Ard Biesheuvel
2017-08-14 15:29   ` [kernel-hardening] " Dave Martin
2017-08-14 15:38     ` Ard Biesheuvel
2017-08-14 15:50       ` Dave Martin
2017-08-14 16:18         ` Nicolas Pitre
2017-08-14 16:22           ` Ard Biesheuvel
2017-08-14 16:33             ` Nicolas Pitre
2017-08-14 16:42             ` Russell King - ARM Linux
2017-08-14 16:56               ` Ard Biesheuvel
2017-08-14 15:32   ` Dave Martin
2017-08-14 15:40     ` Ard Biesheuvel
2017-08-14 15:53       ` Dave Martin
2017-08-14 12:53 ` [kernel-hardening] [PATCH 03/30] ARM: head-common.S: use PC-relative insn sequence for __proc_info Ard Biesheuvel
2017-08-14 12:53 ` [kernel-hardening] [PATCH 04/30] ARM: head-common.S: use PC-relative insn sequence for idmap creation Ard Biesheuvel
2017-08-14 12:53 ` [kernel-hardening] [PATCH 05/30] ARM: head.S: use PC-relative insn sequence for secondary_data Ard Biesheuvel
2017-08-14 12:53 ` [kernel-hardening] [PATCH 06/30] ARM: kernel: use relative references for UP/SMP alternatives Ard Biesheuvel
2017-08-14 12:53 ` [kernel-hardening] [PATCH 07/30] ARM: head: use PC-relative insn sequence for __smp_alt Ard Biesheuvel
2017-08-14 12:53 ` [kernel-hardening] [PATCH 08/30] ARM: sleep.S: use PC-relative insn sequence for sleep_save_sp/mpidr_hash Ard Biesheuvel
2017-08-14 12:53 ` [kernel-hardening] [PATCH 09/30] ARM: head.S: use PC-relative insn sequences for __fixup_pv_table Ard Biesheuvel
2017-08-14 12:53 ` [kernel-hardening] [PATCH 10/30] ARM: head.S: use PC relative insn sequence to calculate PHYS_OFFSET Ard Biesheuvel
2017-08-14 12:53 ` [kernel-hardening] [PATCH 11/30] ARM: kvm: replace open coded VA->PA calculations with adr_l call Ard Biesheuvel
2017-08-14 12:53 ` [kernel-hardening] [PATCH 12/30] arm-soc: exynos: replace open coded VA->PA conversions Ard Biesheuvel
2017-08-14 12:53 ` [kernel-hardening] [PATCH 13/30] arm-soc: mvebu: replace open coded VA->PA conversion Ard Biesheuvel
2017-08-14 12:53 ` [kernel-hardening] [PATCH 14/30] arm-soc: various: replace open coded VA->PA calculation of pen_release Ard Biesheuvel
2017-08-14 12:53 ` [kernel-hardening] [PATCH 15/30] ARM: kernel: switch to relative exception tables Ard Biesheuvel
2017-08-14 12:53 ` [kernel-hardening] [PATCH 16/30] ARM: kernel: use relative phys-to-virt patch tables Ard Biesheuvel
2017-08-14 12:53 ` [kernel-hardening] [PATCH 17/30] arm-soc: tegra: make sleep asm code runtime relocatable Ard Biesheuvel
2017-08-14 14:42   ` [kernel-hardening] " Dave Martin
2017-08-14 14:49     ` Ard Biesheuvel
2017-08-14 15:29       ` Dave Martin [this message]
2017-08-14 12:53 ` [kernel-hardening] [PATCH 18/30] ARM: kernel: make vmlinux buildable as a PIE executable Ard Biesheuvel
2017-08-14 12:54 ` [kernel-hardening] [PATCH 19/30] ARM: kernel: use PC-relative symbol references in MMU switch code Ard Biesheuvel
2017-08-14 12:54 ` [kernel-hardening] [PATCH 20/30] ARM: kernel: use PC relative symbol references in suspend/resume code Ard Biesheuvel
2017-08-14 16:02   ` [kernel-hardening] " Nicolas Pitre
2017-08-14 18:14     ` Ard Biesheuvel
2017-08-14 18:37       ` Nicolas Pitre
2017-08-14 12:54 ` [kernel-hardening] [PATCH 21/30] ARM: mm: export default vmalloc base address Ard Biesheuvel
2017-08-14 12:54 ` [kernel-hardening] [PATCH 22/30] ARM: kernel: refer to swapper_pg_dir via its symbol Ard Biesheuvel
2017-08-14 12:54 ` [kernel-hardening] [PATCH 23/30] ARM: kernel: implement randomization of the kernel load address Ard Biesheuvel
2017-08-14 12:54 ` [kernel-hardening] [PATCH 24/30] ARM: decompressor: explicitly map decompressor binary cacheable Ard Biesheuvel
2017-08-14 12:54 ` [kernel-hardening] [PATCH 25/30] ARM: compressed: factor out zImage header and make it extensible Ard Biesheuvel
2017-08-14 12:54 ` [kernel-hardening] [PATCH 26/30] ARM: decompressor: add KASLR support Ard Biesheuvel
2017-08-14 12:54 ` [kernel-hardening] [PATCH 27/30] efi/libstub: add 'max' parameter to efi_random_alloc() Ard Biesheuvel
2017-08-14 12:54 ` [kernel-hardening] [PATCH 28/30] efi/libstub: check for vmalloc= command line argument Ard Biesheuvel
2017-08-14 12:54 ` [kernel-hardening] [PATCH 29/30] efi/libstub: arm: reserve bootloader supplied initrd in memory map Ard Biesheuvel
2017-08-18 11:48   ` [kernel-hardening] " Ard Biesheuvel
2017-08-21 10:37   ` Mark Rutland
2017-08-21 10:39     ` Ard Biesheuvel
2017-08-14 12:54 ` [kernel-hardening] [PATCH 30/30] efi/libstub: arm: implement KASLR Ard Biesheuvel
2017-08-14 15:30 ` [kernel-hardening] Re: [PATCH 00/30] implement KASLR for ARM Arnd Bergmann
2017-08-14 15:49   ` Ard Biesheuvel
2017-08-14 16:03     ` Arnd Bergmann
2017-08-14 16:28       ` Nicolas Pitre
2017-08-14 17:28         ` Ard Biesheuvel
2017-08-14 18:01           ` Nicolas Pitre
2017-08-14 18:08             ` Ard Biesheuvel
2017-08-14 16:16     ` Nicolas Pitre

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