From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.5 required=3.0 tests=INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA477CA9EA0 for ; Tue, 22 Oct 2019 17:54:02 +0000 (UTC) Received: from mother.openwall.net (mother.openwall.net [195.42.179.200]) by mail.kernel.org (Postfix) with SMTP id 4D3D5214E0 for ; Tue, 22 Oct 2019 17:54:02 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4D3D5214E0 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=kernel-hardening-return-17092-kernel-hardening=archiver.kernel.org@lists.openwall.com Received: (qmail 5836 invoked by uid 550); 22 Oct 2019 17:53:55 -0000 Mailing-List: contact kernel-hardening-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Received: (qmail 24098 invoked from network); 22 Oct 2019 17:22:28 -0000 Date: Tue, 22 Oct 2019 18:22:06 +0100 From: Marc Zyngier To: Sami Tolvanen Cc: Will Deacon , Catalin Marinas , Steven Rostedt , Ard Biesheuvel , Mark Rutland , Kees Cook , kernel-hardening@lists.openwall.com, Nick Desaulniers , linux-kernel@vger.kernel.org, clang-built-linux@googlegroups.com, Laura Abbott , Dave Martin , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 03/18] arm64: kvm: stop treating register x18 as caller save Message-ID: <20191022182206.0d8b2301@why> In-Reply-To: <20191018161033.261971-4-samitolvanen@google.com> References: <20191018161033.261971-1-samitolvanen@google.com> <20191018161033.261971-4-samitolvanen@google.com> Organization: Approximate X-Mailer: Claws Mail 3.17.4 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: samitolvanen@google.com, will@kernel.org, catalin.marinas@arm.com, rostedt@goodmis.org, ard.biesheuvel@linaro.org, mark.rutland@arm.com, keescook@chromium.org, kernel-hardening@lists.openwall.com, ndesaulniers@google.com, linux-kernel@vger.kernel.org, clang-built-linux@googlegroups.com, labbott@redhat.com, Dave.Martin@arm.com, linux-arm-kernel@lists.infradead.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on cheepnis.misterjones.org); SAEximRunCond expanded to false On Fri, 18 Oct 2019 09:10:18 -0700 Sami Tolvanen wrote: > From: Ard Biesheuvel > > In preparation of using x18 as a task struct pointer register when > running in the kernel, stop treating it as caller save in the KVM > guest entry/exit code. Currently, the code assumes there is no need > to preserve it for the host, given that it would have been assumed > clobbered anyway by the function call to __guest_enter(). Instead, > preserve its value and restore it upon return. > > Link: https://patchwork.kernel.org/patch/9836891/ > Signed-off-by: Ard Biesheuvel > Signed-off-by: Sami Tolvanen > --- > arch/arm64/kvm/hyp/entry.S | 12 +++++------- > 1 file changed, 5 insertions(+), 7 deletions(-) > > diff --git a/arch/arm64/kvm/hyp/entry.S b/arch/arm64/kvm/hyp/entry.S > index e5cc8d66bf53..20bd9a20ea27 100644 > --- a/arch/arm64/kvm/hyp/entry.S > +++ b/arch/arm64/kvm/hyp/entry.S > @@ -23,6 +23,7 @@ > .pushsection .hyp.text, "ax" > > .macro save_callee_saved_regs ctxt > + str x18, [\ctxt, #CPU_XREG_OFFSET(18)] > stp x19, x20, [\ctxt, #CPU_XREG_OFFSET(19)] > stp x21, x22, [\ctxt, #CPU_XREG_OFFSET(21)] > stp x23, x24, [\ctxt, #CPU_XREG_OFFSET(23)] > @@ -38,6 +39,7 @@ > ldp x25, x26, [\ctxt, #CPU_XREG_OFFSET(25)] > ldp x27, x28, [\ctxt, #CPU_XREG_OFFSET(27)] > ldp x29, lr, [\ctxt, #CPU_XREG_OFFSET(29)] > + ldr x18, [\ctxt, #CPU_XREG_OFFSET(18)] There is now an assumption that ctxt is x18 (otherwise why would it be out of order?). Please add a comment to that effect. > .endm > > /* > @@ -87,12 +89,9 @@ alternative_else_nop_endif > ldp x14, x15, [x18, #CPU_XREG_OFFSET(14)] > ldp x16, x17, [x18, #CPU_XREG_OFFSET(16)] > > - // Restore guest regs x19-x29, lr > + // Restore guest regs x18-x29, lr > restore_callee_saved_regs x18 Or you could elect another register such as x29 as the base, and keep the above in a reasonable order. > > - // Restore guest reg x18 > - ldr x18, [x18, #CPU_XREG_OFFSET(18)] > - > // Do not touch any register after this! > eret > sb > @@ -114,7 +113,7 @@ ENTRY(__guest_exit) > // Retrieve the guest regs x0-x1 from the stack > ldp x2, x3, [sp], #16 // x0, x1 > > - // Store the guest regs x0-x1 and x4-x18 > + // Store the guest regs x0-x1 and x4-x17 > stp x2, x3, [x1, #CPU_XREG_OFFSET(0)] > stp x4, x5, [x1, #CPU_XREG_OFFSET(4)] > stp x6, x7, [x1, #CPU_XREG_OFFSET(6)] > @@ -123,9 +122,8 @@ ENTRY(__guest_exit) > stp x12, x13, [x1, #CPU_XREG_OFFSET(12)] > stp x14, x15, [x1, #CPU_XREG_OFFSET(14)] > stp x16, x17, [x1, #CPU_XREG_OFFSET(16)] > - str x18, [x1, #CPU_XREG_OFFSET(18)] > > - // Store the guest regs x19-x29, lr > + // Store the guest regs x18-x29, lr > save_callee_saved_regs x1 > > get_host_ctxt x2, x3 Thanks, M. -- Jazz is not dead. It just smells funny...