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From: Thomas Garnier <thgarnie@chromium.org>
To: kernel-hardening@lists.openwall.com
Cc: kristen@linux.intel.com, keescook@chromium.org,
	Thomas Garnier <thgarnie@chromium.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	"H. Peter Anvin" <hpa@zytor.com>,
	x86@kernel.org, Jiri Slaby <jslaby@suse.cz>,
	Juergen Gross <jgross@suse.com>,
	Peter Zijlstra <peterz@infradead.org>,
	linux-kernel@vger.kernel.org
Subject: [PATCH v10 08/11] x86/boot/64: Adapt assembly for PIE support
Date: Wed,  4 Dec 2019 16:09:45 -0800
Message-ID: <20191205000957.112719-9-thgarnie@chromium.org> (raw)
In-Reply-To: <20191205000957.112719-1-thgarnie@chromium.org>

Change the assembly code to use absolute reference for transition
between address spaces and relative references when referencing global
variables in the same address space. Ensure the kernel built with PIE
references the correct addresses based on context.

Position Independent Executable (PIE) support will allow to extend the
KASLR randomization range below 0xffffffff80000000.

Signed-off-by: Thomas Garnier <thgarnie@chromium.org>
Reviewed-by: Kees Cook <keescook@chromium.org>
---
 arch/x86/kernel/head_64.S | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index 4bbc770af632..40a467f8e116 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -87,7 +87,8 @@ SYM_CODE_START_NOALIGN(startup_64)
 	popq	%rsi
 
 	/* Form the CR3 value being sure to include the CR3 modifier */
-	addq	$(early_top_pgt - __START_KERNEL_map), %rax
+	movabs  $(early_top_pgt - __START_KERNEL_map), %rcx
+	addq    %rcx, %rax
 	jmp 1f
 SYM_CODE_END(startup_64)
 
@@ -119,7 +120,8 @@ SYM_CODE_START(secondary_startup_64)
 	popq	%rsi
 
 	/* Form the CR3 value being sure to include the CR3 modifier */
-	addq	$(init_top_pgt - __START_KERNEL_map), %rax
+	movabs	$(init_top_pgt - __START_KERNEL_map), %rcx
+	addq    %rcx, %rax
 1:
 
 	/* Enable PAE mode, PGE and LA57 */
@@ -137,7 +139,7 @@ SYM_CODE_START(secondary_startup_64)
 	movq	%rax, %cr3
 
 	/* Ensure I am executing from virtual addresses */
-	movq	$1f, %rax
+	movabs  $1f, %rax
 	ANNOTATE_RETPOLINE_SAFE
 	jmp	*%rax
 1:
@@ -234,11 +236,12 @@ SYM_CODE_START(secondary_startup_64)
 	 *	REX.W + FF /5 JMP m16:64 Jump far, absolute indirect,
 	 *		address given in m16:64.
 	 */
-	pushq	$.Lafter_lret	# put return address on stack for unwinder
+	movabs  $.Lafter_lret, %rax
+	pushq	%rax		# put return address on stack for unwinder
 	xorl	%ebp, %ebp	# clear frame pointer
-	movq	initial_code(%rip), %rax
+	leaq	initial_code(%rip), %rax
 	pushq	$__KERNEL_CS	# set correct cs
-	pushq	%rax		# target address in negative space
+	pushq	(%rax)		# target address in negative space
 	lretq
 .Lafter_lret:
 SYM_CODE_END(secondary_startup_64)
-- 
2.24.0.393.g34dc348eaf-goog


  parent reply index

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-05  0:09 [PATCH v10 00/11] x86: PIE support to extend KASLR randomization Thomas Garnier
2019-12-05  0:09 ` [PATCH v10 01/11] x86/crypto: Adapt assembly for PIE support Thomas Garnier
2019-12-05  0:09 ` [PATCH v10 02/11] x86: Add macro to get symbol address " Thomas Garnier
2019-12-05  0:09 ` [PATCH v10 03/11] x86: relocate_kernel - Adapt assembly " Thomas Garnier
2019-12-05  0:09 ` [PATCH v10 04/11] x86/entry/64: " Thomas Garnier
2019-12-05  9:03   ` Peter Zijlstra
2019-12-05 17:01     ` Thomas Garnier
2019-12-05  0:09 ` [PATCH v10 05/11] x86: pm-trace - " Thomas Garnier
2019-12-05  0:09 ` [PATCH v10 06/11] x86/CPU: " Thomas Garnier
2019-12-05  0:09 ` [PATCH v10 07/11] x86/acpi: " Thomas Garnier
2019-12-05  0:09 ` Thomas Garnier [this message]
2019-12-05  0:09 ` [PATCH v10 09/11] x86/power/64: " Thomas Garnier
2019-12-05  0:09 ` [PATCH v10 10/11] x86/paravirt: " Thomas Garnier
2019-12-05  0:09 ` [PATCH v10 11/11] x86/alternatives: " Thomas Garnier

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