From: "Andersen, John" <john.s.andersen@intel.com>
To: Sean Christopherson <sean.j.christopherson@intel.com>
Cc: Andy Lutomirski <luto@kernel.org>,
Arvind Sankar <nivedita@alum.mit.edu>,
Dave Hansen <dave.hansen@intel.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Jonathan Corbet <corbet@lwn.net>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
X86 ML <x86@kernel.org>, "H. Peter Anvin" <hpa@zytor.com>,
Shuah Khan <shuah@kernel.org>, Liran Alon <liran.alon@oracle.com>,
Andrew Jones <drjones@redhat.com>,
Rick Edgecombe <rick.p.edgecombe@intel.com>,
Kristen Carlson Accardi <kristen@linux.intel.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>,
Greg KH <gregkh@linuxfoundation.org>,
"Paul E. McKenney" <paulmck@kernel.org>,
Pawan Gupta <pawan.kumar.gupta@linux.intel.com>,
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Peter Zijlstra <peterz@infradead.org>,
Fenghua Yu <fenghua.yu@intel.com>,
reinette.chatre@intel.com, vineela.tummalapalli@intel.com,
Dave Hansen <dave.hansen@linux.intel.com>,
Arjan van de Ven <arjan@linux.intel.com>,
caoj.fnst@cn.fujitsu.com, Baoquan He <bhe@redhat.com>,
Kees Cook <keescook@chromium.org>,
Dan Williams <dan.j.williams@intel.com>,
eric.auger@redhat.com, aaronlewis@google.com,
Peter Xu <peterx@redhat.com>,
makarandsonare@google.com,
"open list:DOCUMENTATION" <linux-doc@vger.kernel.org>,
LKML <linux-kernel@vger.kernel.org>,
kvm list <kvm@vger.kernel.org>,
"open list:KERNEL SELFTEST FRAMEWORK"
<linux-kselftest@vger.kernel.org>,
Kernel Hardening <kernel-hardening@lists.openwall.com>
Subject: Re: [PATCH 2/4] KVM: x86: Introduce paravirt feature CR0/CR4 pinning
Date: Wed, 15 Jul 2020 19:58:48 +0000 [thread overview]
Message-ID: <20200715195848.GE25@760745902f30> (raw)
In-Reply-To: <20200715044129.GA11248@linux.intel.com>
On Tue, Jul 14, 2020 at 09:41:29PM -0700, Sean Christopherson wrote:
> On Tue, Jul 14, 2020 at 05:39:30AM +0000, Andersen, John wrote:
> > With regards to FSGSBASE, are we open to validating and adding that to the
> > DEFAULT set as a part of a separate patchset? This patchset is focused on
> > replicating the functionality we already have natively.
>
> Kees added FSGSBASE pinning in commit a13b9d0b97211 ("x86/cpu: Use pinning
> mask for CR4 bits needing to be 0"), so I believe it's a done deal already.
Ah my bad. Thanks, I'll look into it.
next prev parent reply other threads:[~2020-07-15 20:02 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-17 19:07 [PATCH 0/4] Paravirtualized Control Register pinning John Andersen
2020-06-17 19:07 ` [PATCH 1/4] X86: Update mmu_cr4_features during feature identification John Andersen
2020-06-18 14:09 ` Dave Hansen
2020-06-17 19:07 ` [PATCH 2/4] KVM: x86: Introduce paravirt feature CR0/CR4 pinning John Andersen
2020-06-18 14:18 ` Dave Hansen
2020-06-18 14:43 ` Andersen, John
2020-06-18 14:51 ` Dave Hansen
2020-07-07 21:12 ` Sean Christopherson
2020-07-07 21:48 ` Dave Hansen
2020-07-07 21:51 ` Paolo Bonzini
2020-07-09 15:44 ` Andersen, John
2020-07-09 15:56 ` Dave Hansen
2020-07-09 16:07 ` Andy Lutomirski
2020-07-09 16:22 ` Dave Hansen
2020-07-09 16:27 ` Andy Lutomirski
2020-07-14 5:36 ` Andersen, John, Arvind Sankar
2020-07-14 5:39 ` Andersen, John
2020-07-15 4:41 ` Sean Christopherson
2020-07-15 19:58 ` Andersen, John [this message]
2020-07-09 23:37 ` Kees Cook
2020-06-17 19:07 ` [PATCH 3/4] selftests: kvm: add test for CR pinning with SMM John Andersen
2020-06-17 19:07 ` [PATCH 4/4] X86: Use KVM CR pin MSRs John Andersen
2020-06-18 14:41 ` Dave Hansen
2020-06-18 15:26 ` Andersen, John
2020-06-18 15:38 ` Dave Hansen
2020-06-18 15:49 ` Andersen, John
2020-06-20 5:13 ` Andy Lutomirski
2020-06-23 20:03 ` Andersen, John
2020-07-03 21:48 ` Andersen, John
2020-07-04 15:11 ` Arvind Sankar
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