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From: Kees Cook <keescook@chromium.org>
To: Jann Horn <jannh@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	kernel list <linux-kernel@vger.kernel.org>,
	Kernel Hardening <kernel-hardening@lists.openwall.com>,
	the arch/x86 maintainers <x86@kernel.org>
Subject: Re: [PATCH] x86/asm: Pin sensitive CR4 bits
Date: Wed, 20 Feb 2019 09:00:45 -0800	[thread overview]
Message-ID: <CAGXu5j+5rfZ17KcBwMPg6dEnBBVZVvFjv+xZhyThr2rJZ-V0WA@mail.gmail.com> (raw)
In-Reply-To: <CAG48ez3Kbt7oyH7wyw+d1vwNRD_b5Y+tiCOLofkxyqxcNWs8vw@mail.gmail.com>

On Tue, Feb 19, 2019 at 6:37 PM Jann Horn <jannh@google.com> wrote:
>
> On Wed, Feb 20, 2019 at 1:55 AM Kees Cook <keescook@chromium.org> wrote:
> > +       if (WARN_ONCE(cr4_pin && (val & cr4_pin) == 0,
>
> Don't you mean `cr4_pin && (val & cr4_pin) != cr4_pin)`?

Whoops! Yes, thanks. :)

-- 
Kees Cook

  reply	other threads:[~2019-02-20 17:00 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-20  0:54 [PATCH] x86/asm: Pin sensitive CR4 bits Kees Cook
2019-02-20  2:37 ` Jann Horn
2019-02-20 17:00   ` Kees Cook [this message]
2019-02-20  8:14 ` Dominik Brodowski
2019-02-20 17:01   ` Kees Cook

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