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From: Luca Ceresoli <luca@lucaceresoli.net>
To: Tomek Domek <tomekdomek8585@gmail.com>, kernelnewbies@kernelnewbies.org
Subject: Re: the difference between /drivers/spi and /drivers/mtd
Date: Thu, 19 Dec 2019 11:15:24 +0100	[thread overview]
Message-ID: <02429708-a00c-fdf8-bf7e-cae372891bba@lucaceresoli.net> (raw)
In-Reply-To: <CAHB2bXB_0V78Q=MD4YBBPxzz+j-ev1z1tntW_Ab0=+FmYsRjEw@mail.gmail.com>

Hi Tomek,

On 10/12/19 16:01, Tomek Domek wrote:
> Hi
> I have in device tree node:
> 
> qspi: somename@0 {
>     compatible = "nameOfDriverFrom/drivers/spi";
>     reg = <someAddr size>;
>     clocks = <reference to clock>;
>     clock-names = "some names";
>     #address-cells = <1>;
>     #size-cells = <0>;
>     status = "disabled";
> };
> 
> and then I have such thing:
> &qspi {
>     pinctrl-names="default";
>     pinctrl-0 = <&reference to some pin controller>;
>     status = "okay";
>     spi-max-frequency = <11000000>;
> 
>     flash@0 {
>         compatible = "spi-flash (this is driver from /drivers/mtd/)";
>         #address-cells = <1>;
>         #size-cells = <1>;
>         reg = <0x0>;
>         spi-max-frequency = <22000000>;
>      };
> };
> 
> Why just one node isn't enough? And what frequency driver have at all -
> 11MHz or 22MHz?
> What is the difference between drivers defined in /drivers/spi and
> /drivers/mtd?

The qspi node is the Quad SPI master (=controller), i.e. the piece of
hardware, usually in the the SoC, that drives the (Quad) SPI bus.

The flash@0 node is the flash chip, external to the SoC, it's a SPI
slave that is driven by the SPI master.

Device tree describes the hardware. It is possible that the flash chip
supports up to 22 MHz but the SPI master supports up to 11 MHz. Using
the highest possible speed, 11 MHz in this case, is up to the driver
implementation.

> Does it mean that driver in /drivers/mtd can use somehow driver or the
> code from /drivers/spi?

Yes, absolutely. MTD is a kernel layer to drive memory chips. In order
to reach the memory chip it uses a communication bus. Typical
communication busses for MTD chips include [Quad] SPI, I2C and parallel.

Layering in Linux drivers is absolutely normal. E.g. when you connect a
pendrive to your PC you probably have the mass storage driver use the
USB controller driver, because the pendrive uses USB to connect. And the
USB controller driver uses the PCIe controller driver because the USB
controller is connected to the CPU via PCI express.

-- 
Luca

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      reply	other threads:[~2019-12-19 10:16 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-10 15:01 the difference between /drivers/spi and /drivers/mtd Tomek Domek
2019-12-19 10:15 ` Luca Ceresoli [this message]

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