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* PCI / PCIe Device Memory - Rationale for Choosing MMIO Over PMIO (and Visa-Versa)
@ 2020-11-05 14:27 Jack Winch
  2020-11-05 14:47 ` Greg KH
  0 siblings, 1 reply; 3+ messages in thread
From: Jack Winch @ 2020-11-05 14:27 UTC (permalink / raw)
  To: kernelnewbies, linux-pci

Hi all,

Over the last couple of months, I've been reading the hardware
documentation and Linux device driver source code for a range of
different PCI and PCIe devices.  Those examined range from
multi-function data acquisition cards through to avionics bus
interface devices.  In doing so, I have referenced numerous resources
(including the Third Edition of LDD - what a great book - and the
documentation available for the Linux PCI Bus Subsystem on
kernel.org).

One thing I'm still a little unclear on is why vendors might opt to
map PCI / PCIe device memory into the system memory map as either
Memory-Mapped I/O (MMIO) or Port-Mapped I/O (PMIO).  That is, for what
reasons would a device manufacturer choose to make use of one address
space over the other for regions of a PCI / PCIe device's memory?
Some of the general reasons are alluded to by the aforementioned
resources (e.g., more instruction cycles are required to access data
via PMIO, MMIO can be marked as prefetchable and handled as such,
etc).

Would anyone who's been engaged in the development of a PCI / PCIe
device talk about their experience and what factors led to one address
space being chosen over the other (for specific regions of a specific
device)?

Specific examples would really help me (and probably others)
understand what factors are involved in this decision and how a
suitable choice is made.  Reading the driver source code, for specific
devices, has been great for developing an initial understanding of the
different approaches taken by device manufacturers, but source code
and hardware documentation rarely provide any information on the
rationale for a chosen implementation.

Any specific technical accounts on this matter, etc, would be much appreciated.

Jack

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* Re: PCI / PCIe Device Memory - Rationale for Choosing MMIO Over PMIO (and Visa-Versa)
  2020-11-05 14:27 PCI / PCIe Device Memory - Rationale for Choosing MMIO Over PMIO (and Visa-Versa) Jack Winch
@ 2020-11-05 14:47 ` Greg KH
  2020-11-05 15:07   ` Jack Winch
  0 siblings, 1 reply; 3+ messages in thread
From: Greg KH @ 2020-11-05 14:47 UTC (permalink / raw)
  To: Jack Winch; +Cc: linux-pci, kernelnewbies

On Thu, Nov 05, 2020 at 02:27:58PM +0000, Jack Winch wrote:
> Hi all,
> 
> Over the last couple of months, I've been reading the hardware
> documentation and Linux device driver source code for a range of
> different PCI and PCIe devices.  Those examined range from
> multi-function data acquisition cards through to avionics bus
> interface devices.  In doing so, I have referenced numerous resources
> (including the Third Edition of LDD - what a great book - and the
> documentation available for the Linux PCI Bus Subsystem on
> kernel.org).
> 
> One thing I'm still a little unclear on is why vendors might opt to
> map PCI / PCIe device memory into the system memory map as either
> Memory-Mapped I/O (MMIO) or Port-Mapped I/O (PMIO).  That is, for what
> reasons would a device manufacturer choose to make use of one address
> space over the other for regions of a PCI / PCIe device's memory?
> Some of the general reasons are alluded to by the aforementioned
> resources (e.g., more instruction cycles are required to access data
> via PMIO, MMIO can be marked as prefetchable and handled as such,
> etc).

I think you should be talking to hardware people about this, as this is
almost always due to hardware limitations/issues/design decisions.  The
PCI-SIG should have a bunch of resources about this, have you looked
into that?

good luck!

greg k-h

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^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: PCI / PCIe Device Memory - Rationale for Choosing MMIO Over PMIO (and Visa-Versa)
  2020-11-05 14:47 ` Greg KH
@ 2020-11-05 15:07   ` Jack Winch
  0 siblings, 0 replies; 3+ messages in thread
From: Jack Winch @ 2020-11-05 15:07 UTC (permalink / raw)
  To: Greg KH; +Cc: linux-pci, kernelnewbies

Hey Greg,

> I think you should be talking to hardware people about this, as this is
> almost always due to hardware limitations/issues/design decisions.


To be honest, I anticipated a response along these lines (after
briefly speaking to another individual on this matter).  They
commented on how this decision was usually made and asserted by the
hardware engineer(s).

> The PCI-SIG should have a bunch of resources about this, have you looked
> into that?


I haven't as of yet, but I'll shift focus onto their resources next.
Do any specific resources of theirs spring to mind offhand?  No
worries if not - I'm not afraid to spend time searching them out.

Thanks for the quick response and your time. :)

Jack

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end of thread, other threads:[~2020-11-05 15:06 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2020-11-05 14:27 PCI / PCIe Device Memory - Rationale for Choosing MMIO Over PMIO (and Visa-Versa) Jack Winch
2020-11-05 14:47 ` Greg KH
2020-11-05 15:07   ` Jack Winch

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