From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1D311C35247 for ; Fri, 7 Feb 2020 03:20:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E5BF021D7D for ; Fri, 7 Feb 2020 03:20:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726838AbgBGDUu (ORCPT ); Thu, 6 Feb 2020 22:20:50 -0500 Received: from szxga05-in.huawei.com ([45.249.212.191]:9707 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726628AbgBGDUt (ORCPT ); Thu, 6 Feb 2020 22:20:49 -0500 Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 4FC83DEDBF9E915389DD; Fri, 7 Feb 2020 11:20:46 +0800 (CST) Received: from [127.0.0.1] (10.173.222.27) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.439.0; Fri, 7 Feb 2020 11:20:39 +0800 Subject: Re: [kvm-unit-tests PATCH v3 08/14] arm/arm64: ITS: its_enable_defaults To: Eric Auger , , , , , , CC: , , , , References: <20200128103459.19413-1-eric.auger@redhat.com> <20200128103459.19413-9-eric.auger@redhat.com> From: Zenghui Yu Message-ID: <10d0630f-1464-b12a-5ad5-ee617eaa5cca@huawei.com> Date: Fri, 7 Feb 2020 11:20:38 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.2.0 MIME-Version: 1.0 In-Reply-To: <20200128103459.19413-9-eric.auger@redhat.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.173.222.27] X-CFilter-Loop: Reflected Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Hi Eric, On 2020/1/28 18:34, Eric Auger wrote: > its_enable_defaults() is the top init function that allocates the > command queue and all the requested tables (device, collection, > lpi config and pending tables), enable LPIs at distributor level > and ITS level. > > gicv3_enable_defaults must be called before. > > Signed-off-by: Eric Auger > > --- > > v2 -> v3: > - introduce its_setup_baser in this patch > - squash "arm/arm64: ITS: Init the command queue" in this patch. > --- > lib/arm/asm/gic-v3-its.h | 8 ++++ > lib/arm/gic-v3-its.c | 89 ++++++++++++++++++++++++++++++++++++++++ > 2 files changed, 97 insertions(+) > > diff --git a/lib/arm/asm/gic-v3-its.h b/lib/arm/asm/gic-v3-its.h > index 815c515..fe73c04 100644 > --- a/lib/arm/asm/gic-v3-its.h > +++ b/lib/arm/asm/gic-v3-its.h > @@ -36,6 +36,8 @@ struct its_data { > void *base; > struct its_typer typer; > struct its_baser baser[GITS_BASER_NR_REGS]; > + struct its_cmd_block *cmd_base; > + struct its_cmd_block *cmd_write; > }; > > extern struct its_data its_data; > @@ -88,10 +90,16 @@ extern struct its_data its_data; > #define GITS_BASER_TYPE_DEVICE 1 > #define GITS_BASER_TYPE_COLLECTION 4 > > + > +struct its_cmd_block { > + u64 raw_cmd[4]; > +}; > + > extern void its_parse_typer(void); > extern void its_init(void); > extern int its_parse_baser(int i, struct its_baser *baser); > extern struct its_baser *its_lookup_baser(int type); > +extern void its_enable_defaults(void); > > #else /* __arm__ */ > > diff --git a/lib/arm/gic-v3-its.c b/lib/arm/gic-v3-its.c > index 2c0ce13..d1e7e52 100644 > --- a/lib/arm/gic-v3-its.c > +++ b/lib/arm/gic-v3-its.c > @@ -86,3 +86,92 @@ void its_init(void) > its_parse_baser(i, &its_data.baser[i]); > } > > +static void its_setup_baser(int i, struct its_baser *baser) > +{ > + unsigned long n = (baser->nr_pages * baser->psz) >> PAGE_SHIFT; > + unsigned long order = is_power_of_2(n) ? fls(n) : fls(n) + 1; > + u64 val; > + > + baser->table_addr = (u64)virt_to_phys(alloc_pages(order)); > + > + val = ((u64)baser->table_addr | > + ((u64)baser->type << GITS_BASER_TYPE_SHIFT) | > + ((u64)(baser->esz - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | > + ((baser->nr_pages - 1) << GITS_BASER_PAGES_SHIFT) | > + (u64)baser->indirect << 62 | I haven't seen the 'nr_pages' and 'indirect' are programmed anywhere except in its_parse_baser(). It looks like they're treated as RO (but they shouldn't) and I now don't think it makes sense to parse them in its_parse_baser(), in patch#5. > + (u64)baser->valid << 63); > + > + switch (baser->psz) { > + case SZ_4K: > + val |= GITS_BASER_PAGE_SIZE_4K; > + break; > + case SZ_16K: > + val |= GITS_BASER_PAGE_SIZE_16K; > + break; > + case SZ_64K: > + val |= GITS_BASER_PAGE_SIZE_64K; > + break; > + } > + > + writeq(val, gicv3_its_base() + GITS_BASER + i * 8); > +} > + > +/** > + * init_cmd_queue: Allocate the command queue and initialize > + * CBASER, CREADR, CWRITER no 'CREADR'. Thanks, Zenghui