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([2001:b07:6468:f312:c8dd:75d4:99ab:290a]) by smtp.gmail.com with ESMTPSA id m11sm7585194wrz.28.2021.09.06.04.20.15 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 06 Sep 2021 04:20:19 -0700 (PDT) Subject: Re: [PATCH v3 6/6] KVM: selftests: test KVM_GUESTDBG_BLOCKIRQ To: Maxim Levitsky , kvm@vger.kernel.org Cc: Kieran Bingham , Jan Kiszka , Andrew Jones , Jonathan Corbet , Vitaly Kuznetsov , Sean Christopherson , Ingo Molnar , Thomas Gleixner , "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" , Johannes Berg , Wanpeng Li , "H. Peter Anvin" , Jessica Yu , Jim Mattson , Joerg Roedel , Yang Weijiang , linux-kernel@vger.kernel.org, Borislav Petkov , "open list:KERNEL SELFTEST FRAMEWORK" , "open list:DOCUMENTATION" , Shuah Khan , Andrew Morton References: <20210811122927.900604-1-mlevitsk@redhat.com> <20210811122927.900604-7-mlevitsk@redhat.com> From: Paolo Bonzini Message-ID: <137f2dcc-75d2-9d71-e259-dd66d43ad377@redhat.com> Date: Mon, 6 Sep 2021 13:20:14 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: <20210811122927.900604-7-mlevitsk@redhat.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On 11/08/21 14:29, Maxim Levitsky wrote: > Modify debug_regs test to create a pending interrupt > and see that it is blocked when single stepping is done > with KVM_GUESTDBG_BLOCKIRQ > > Signed-off-by: Maxim Levitsky > --- > .../testing/selftests/kvm/x86_64/debug_regs.c | 24 ++++++++++++++++--- > 1 file changed, 21 insertions(+), 3 deletions(-) I haven't looked very much at this, but the test fails. Paolo > diff --git a/tools/testing/selftests/kvm/x86_64/debug_regs.c b/tools/testing/selftests/kvm/x86_64/debug_regs.c > index 6097a8283377..5f078db1bcba 100644 > --- a/tools/testing/selftests/kvm/x86_64/debug_regs.c > +++ b/tools/testing/selftests/kvm/x86_64/debug_regs.c > @@ -8,12 +8,15 @@ > #include > #include "kvm_util.h" > #include "processor.h" > +#include "apic.h" > > #define VCPU_ID 0 > > #define DR6_BD (1 << 13) > #define DR7_GD (1 << 13) > > +#define IRQ_VECTOR 0xAA > + > /* For testing data access debug BP */ > uint32_t guest_value; > > @@ -21,6 +24,11 @@ extern unsigned char sw_bp, hw_bp, write_data, ss_start, bd_start; > > static void guest_code(void) > { > + /* Create a pending interrupt on current vCPU */ > + x2apic_enable(); > + x2apic_write_reg(APIC_ICR, APIC_DEST_SELF | APIC_INT_ASSERT | > + APIC_DM_FIXED | IRQ_VECTOR); > + > /* > * Software BP tests. > * > @@ -38,12 +46,19 @@ static void guest_code(void) > "mov %%rax,%0;\n\t write_data:" > : "=m" (guest_value) : : "rax"); > > - /* Single step test, covers 2 basic instructions and 2 emulated */ > + /* > + * Single step test, covers 2 basic instructions and 2 emulated > + * > + * Enable interrupts during the single stepping to see that > + * pending interrupt we raised is not handled due to KVM_GUESTDBG_BLOCKIRQ > + */ > asm volatile("ss_start: " > + "sti\n\t" > "xor %%eax,%%eax\n\t" > "cpuid\n\t" > "movl $0x1a0,%%ecx\n\t" > "rdmsr\n\t" > + "cli\n\t" > : : : "eax", "ebx", "ecx", "edx"); > > /* DR6.BD test */ > @@ -72,11 +87,13 @@ int main(void) > uint64_t cmd; > int i; > /* Instruction lengths starting at ss_start */ > - int ss_size[4] = { > + int ss_size[6] = { > + 1, /* sti*/ > 2, /* xor */ > 2, /* cpuid */ > 5, /* mov */ > 2, /* rdmsr */ > + 1, /* cli */ > }; > > if (!kvm_check_cap(KVM_CAP_SET_GUEST_DEBUG)) { > @@ -154,7 +171,8 @@ int main(void) > for (i = 0; i < (sizeof(ss_size) / sizeof(ss_size[0])); i++) { > target_rip += ss_size[i]; > CLEAR_DEBUG(); > - debug.control = KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_SINGLESTEP; > + debug.control = KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_SINGLESTEP | > + KVM_GUESTDBG_BLOCKIRQ; > debug.arch.debugreg[7] = 0x00000400; > APPLY_DEBUG(); > vcpu_run(vm, VCPU_ID); >