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Thu, 15 Aug 2019 16:25:12 +0000 From: "Suthikulpanit, Suravee" To: "linux-kernel@vger.kernel.org" , "kvm@vger.kernel.org" CC: "pbonzini@redhat.com" , "rkrcmar@redhat.com" , "joro@8bytes.org" , "graf@amazon.com" , "jschoenh@amazon.de" , "karahmed@amazon.de" , "rimasluk@amazon.com" , "Grimm, Jon" , "Suthikulpanit, Suravee" Subject: [PATCH v2 08/15] svm: Add support for setup/destroy virutal APIC backing page for AVIC Thread-Topic: [PATCH v2 08/15] svm: Add support for setup/destroy virutal APIC backing page for AVIC Thread-Index: AQHVU4YDWF82b235sEatrd+nfFcRLg== Date: Thu, 15 Aug 2019 16:25:12 +0000 Message-ID: <1565886293-115836-9-git-send-email-suravee.suthikulpanit@amd.com> References: <1565886293-115836-1-git-send-email-suravee.suthikulpanit@amd.com> In-Reply-To: <1565886293-115836-1-git-send-email-suravee.suthikulpanit@amd.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [165.204.78.1] x-clientproxiedby: SN6PR04CA0084.namprd04.prod.outlook.com (2603:10b6:805:f2::25) To DM6PR12MB2844.namprd12.prod.outlook.com (2603:10b6:5:45::32) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Suravee.Suthikulpanit@amd.com; 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received-spf: None (protection.outlook.com: amd.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: J+a4uuNWoajI6LKZrHo4fJN4C92Q5xwwH+gCq8EUMZ9MSxvyJf/CZUHQ8UE87Uri5/wzfO66O3dZkcMSquJ3UbYZCLUv1HvAln/uu4Z53BZpfmH1tu7UCJiPy8TRtKLURvwlcxwkx6mfMbMADx2CLWsWNpmpRREjv/NszHNjT/LR/3QOmlGfqknfIDlJa0068D6UQTGK/NpiH4yebz3hAyhcmU50zDMtbUYTwmDQHwcFUJRdXIH4LQsLXcF4EnmxoIApesz1B/ik51yj56016lB/OmotxtumQawLPTNIpT2kZ75lQxfd49Jobol5efNWvSjnIAMoEiPsmIwn23iMyQtyLFM/2ki9Q1QmgGeanlme0VK3k9cuN8pw5jIPS+P+un5okagJ9GYIXK/ShP+NH2IjTLPFnRBm73vmrDeHtZ0= Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1cd7f15e-d8ca-4ea8-ce80-08d7219d25d8 X-MS-Exchange-CrossTenant-originalarrivaltime: 15 Aug 2019 16:25:12.7200 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: ER4iKxLbYmFJiFbD8fMFm36N+7+v7coSNTWXXRbE5k5gctwX53VYDo9kE1R/N9zL2HJvvVo2p/DuDZiVCE9SeQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB3897 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Archived-At: List-Archive: List-Post: Activate/deactivate AVIC requires setting/unsetting the memory region used for virtual APIC backing page (APIC_ACCESS_PAGE_PRIVATE_MEMSLOT). So, re-factor avic_init_access_page() to avic_setup_access_page() and add srcu_read_lock/unlock, which are needed to allow this function to be called during run-time. Also, introduce avic_destroy_access_page() to unset the page when deactivate AVIC. Signed-off-by: Suravee Suthikulpanit --- arch/x86/kvm/svm.c | 48 +++++++++++++++++++++++++++++++++++++++++++----- 1 file changed, 43 insertions(+), 5 deletions(-) diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c index b674cd0..47f2439 100644 --- a/arch/x86/kvm/svm.c +++ b/arch/x86/kvm/svm.c @@ -1468,7 +1468,9 @@ static u64 svm_write_l1_tsc_offset(struct kvm_vcpu *v= cpu, u64 offset) static void avic_init_vmcb(struct vcpu_svm *svm) { struct vmcb *vmcb =3D svm->vmcb; - struct kvm_svm *kvm_svm =3D to_kvm_svm(svm->vcpu.kvm); + struct kvm *kvm =3D svm->vcpu.kvm; + struct kvm_svm *kvm_svm =3D to_kvm_svm(kvm); + phys_addr_t bpa =3D __sme_set(page_to_phys(svm->avic_backing_page)); phys_addr_t lpa =3D __sme_set(page_to_phys(kvm_svm->avic_logical_id_table= _page)); phys_addr_t ppa =3D __sme_set(page_to_phys(kvm_svm->avic_physical_id_tabl= e_page)); @@ -1477,7 +1479,13 @@ static void avic_init_vmcb(struct vcpu_svm *svm) vmcb->control.avic_logical_id =3D lpa & AVIC_HPA_MASK; vmcb->control.avic_physical_id =3D ppa & AVIC_HPA_MASK; vmcb->control.avic_physical_id |=3D AVIC_MAX_PHYSICAL_ID_COUNT; - vmcb->control.int_ctl |=3D AVIC_ENABLE_MASK; + + mutex_lock(&kvm->arch.apicv_lock); + if (kvm->arch.apicv_state =3D=3D APICV_ACTIVATED) + vmcb->control.int_ctl |=3D AVIC_ENABLE_MASK; + else + vmcb->control.int_ctl &=3D ~AVIC_ENABLE_MASK; + mutex_unlock(&kvm->arch.apicv_lock); } =20 static void init_vmcb(struct vcpu_svm *svm) @@ -1660,19 +1668,24 @@ static u64 *avic_get_physical_id_entry(struct kvm_v= cpu *vcpu, * field of the VMCB. Therefore, we set up the * APIC_ACCESS_PAGE_PRIVATE_MEMSLOT (4KB) here. */ -static int avic_init_access_page(struct kvm_vcpu *vcpu) +static int avic_setup_access_page(struct kvm_vcpu *vcpu, bool init) { struct kvm *kvm =3D vcpu->kvm; int ret =3D 0; =20 mutex_lock(&kvm->slots_lock); + if (kvm->arch.apic_access_page_done) goto out; =20 + if (!init) + srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx); ret =3D __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, APIC_DEFAULT_PHYS_BASE, PAGE_SIZE); + if (!init) + vcpu->srcu_idx =3D srcu_read_lock(&kvm->srcu); if (ret) goto out; =20 @@ -1682,14 +1695,39 @@ static int avic_init_access_page(struct kvm_vcpu *v= cpu) return ret; } =20 +static void avic_destroy_access_page(struct kvm_vcpu *vcpu) +{ + struct kvm *kvm =3D vcpu->kvm; + + mutex_lock(&kvm->slots_lock); + + if (!kvm->arch.apic_access_page_done) + goto out; + + srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx); + __x86_set_memory_region(kvm, + APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, + APIC_DEFAULT_PHYS_BASE, + 0); + vcpu->srcu_idx =3D srcu_read_lock(&kvm->srcu); + kvm->arch.apic_access_page_done =3D false; +out: + mutex_unlock(&kvm->slots_lock); +} + static int avic_init_backing_page(struct kvm_vcpu *vcpu) { - int ret; + int ret =3D 0; u64 *entry, new_entry; int id =3D vcpu->vcpu_id; + struct kvm *kvm =3D vcpu->kvm; struct vcpu_svm *svm =3D to_svm(vcpu); =20 - ret =3D avic_init_access_page(vcpu); + mutex_lock(&kvm->arch.apicv_lock); + if (kvm->arch.apicv_state =3D=3D APICV_ACTIVATED) + ret =3D avic_setup_access_page(vcpu, true); + mutex_unlock(&kvm->arch.apicv_lock); + if (ret) return ret; =20 --=20 1.8.3.1