From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Cc: pbonzini@redhat.com, rkrcmar@redhat.com, joro@8bytes.org,
vkuznets@redhat.com, rkagan@virtuozzo.com, graf@amazon.com,
jschoenh@amazon.de, karahmed@amazon.de, rimasluk@amazon.com,
jon.grimm@amd.com,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Subject: [PATCH v5 03/18] kvm: x86: Introduce APICv inhibit reason bits
Date: Thu, 14 Nov 2019 14:15:05 -0600 [thread overview]
Message-ID: <1573762520-80328-4-git-send-email-suravee.suthikulpanit@amd.com> (raw)
In-Reply-To: <1573762520-80328-1-git-send-email-suravee.suthikulpanit@amd.com>
There are several reasons in which a VM needs to deactivate APICv
e.g. disable APICv via parameter during module loading, or when
enable Hyper-V SynIC support. Additional inhibit reasons will be
introduced later on when dynamic APICv is supported,
Introduce KVM APICv inhibit reason bits along with a new variable,
apicv_inhibit_reasons, to help keep track of APICv state for each VM,
Initially, the APICV_INHIBIT_REASON_DISABLE bit is used to indicate
the case where APICv is disabled during KVM module load.
(e.g. insmod kvm_amd avic=0 or insmod kvm_intel enable_apicv=0).
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
arch/x86/include/asm/kvm_host.h | 5 +++++
arch/x86/kvm/svm.c | 13 ++++++++++++-
arch/x86/kvm/vmx/vmx.c | 1 +
arch/x86/kvm/x86.c | 20 +++++++++++++++++++-
4 files changed, 37 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 632589a..c60786a 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -847,6 +847,8 @@ enum kvm_irqchip_mode {
KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */
};
+#define APICV_INHIBIT_REASON_DISABLE 0
+
struct kvm_arch {
unsigned long n_used_mmu_pages;
unsigned long n_requested_mmu_pages;
@@ -877,6 +879,7 @@ struct kvm_arch {
struct kvm_apic_map *apic_map;
bool apic_access_page_done;
+ unsigned long apicv_inhibit_reasons;
gpa_t wall_clock;
@@ -1441,6 +1444,8 @@ gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
struct x86_exception *exception);
void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu);
+bool kvm_apicv_activated(struct kvm *kvm);
+void kvm_apicv_init(struct kvm *kvm, bool enable);
int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index d53ffb8..3395e4c 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -1997,6 +1997,17 @@ static int avic_vm_init(struct kvm *kvm)
return err;
}
+static int svm_vm_init(struct kvm *kvm)
+{
+ int ret = 0;
+
+ if (avic)
+ ret = avic_vm_init(kvm);
+
+ kvm_apicv_init(kvm, (avic && !ret));
+ return ret;
+}
+
static inline int
avic_update_iommu_vcpu_affinity(struct kvm_vcpu *vcpu, int cpu, bool r)
{
@@ -7195,7 +7206,7 @@ static bool svm_apic_init_signal_blocked(struct kvm_vcpu *vcpu)
.vm_alloc = svm_vm_alloc,
.vm_free = svm_vm_free,
- .vm_init = avic_vm_init,
+ .vm_init = svm_vm_init,
.vm_destroy = svm_vm_destroy,
.prepare_guest_switch = svm_prepare_guest_switch,
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 2aa14d5..d6d1c862 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -6848,6 +6848,7 @@ static int vmx_vm_init(struct kvm *kvm)
break;
}
}
+ kvm_apicv_init(kvm, vmx_get_enable_apicv(kvm));
return 0;
}
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 4cbb948..4d19566 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -7329,6 +7329,23 @@ void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
}
+bool kvm_apicv_activated(struct kvm *kvm)
+{
+ return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
+}
+EXPORT_SYMBOL_GPL(kvm_apicv_activated);
+
+void kvm_apicv_init(struct kvm *kvm, bool enable)
+{
+ if (enable)
+ clear_bit(APICV_INHIBIT_REASON_DISABLE,
+ &kvm->arch.apicv_inhibit_reasons);
+ else
+ set_bit(APICV_INHIBIT_REASON_DISABLE,
+ &kvm->arch.apicv_inhibit_reasons);
+}
+EXPORT_SYMBOL_GPL(kvm_apicv_init);
+
static void kvm_sched_yield(struct kvm *kvm, unsigned long dest_id)
{
struct kvm_vcpu *target = NULL;
@@ -9347,10 +9364,11 @@ int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
goto fail_free_pio_data;
if (irqchip_in_kernel(vcpu->kvm)) {
- vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu->kvm);
r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
if (r < 0)
goto fail_mmu_destroy;
+ if (kvm_apicv_activated(vcpu->kvm))
+ vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu->kvm);
} else
static_key_slow_inc(&kvm_no_apic_vcpu);
--
1.8.3.1
next prev parent reply other threads:[~2019-11-14 20:17 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-14 20:15 [PATCH v5 00/18] kvm: x86: Support AMD SVM AVIC w/ in-kernel irqchip mode Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 01/18] kvm: x86: Modify kvm_x86_ops.get_enable_apicv() to use struct kvm parameter Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 02/18] kvm: lapic: Introduce APICv update helper function Suravee Suthikulpanit
2019-11-14 20:15 ` Suravee Suthikulpanit [this message]
2020-01-22 15:51 ` [PATCH v5 03/18] kvm: x86: Introduce APICv inhibit reason bits Paolo Bonzini
2019-11-14 20:15 ` [PATCH v5 04/18] kvm: x86: Add support for dynamic APICv Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 05/18] kvm: x86: Add APICv (de)activate request trace points Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 06/18] kvm: x86: svm: Add support to (de)activate posted interrupts Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 07/18] svm: Add support for setup/destroy virutal APIC backing page for AVIC Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 08/18] kvm: x86: Introduce APICv x86 ops for checking APIC inhibit reasons Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 09/18] kvm: x86: Introduce x86 ops hook for pre-update APICv Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 10/18] svm: Add support for dynamic APICv Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 11/18] kvm: x86: hyperv: Use APICv update request interface Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 12/18] svm: Deactivate AVIC when launching guest with nested SVM support Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 13/18] svm: Temporary deactivate AVIC during ExtINT handling Suravee Suthikulpanit
2020-01-22 16:32 ` Paolo Bonzini
2019-11-14 20:15 ` [PATCH v5 14/18] kvm: i8254: Deactivate APICv when using in-kernel PIT re-injection mode Suravee Suthikulpanit
2020-02-18 18:51 ` Alex Williamson
2020-02-21 2:27 ` Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 15/18] kvm: lapic: Clean up APIC predefined macros Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 16/18] kvm: ioapic: Refactor kvm_ioapic_update_eoi() Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 17/18] kvm: ioapic: Lazy update IOAPIC EOI Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 18/18] svm: Allow AVIC with in-kernel irqchip mode Suravee Suthikulpanit
2020-01-22 16:06 ` Paolo Bonzini
2020-01-02 10:17 ` [PATCH v5 00/18] kvm: x86: Support AMD SVM AVIC w/ " Suravee Suthikulpanit
2020-01-20 6:16 ` Suravee Suthikulpanit
2020-01-22 16:08 ` Paolo Bonzini
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