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([2001:b07:6468:f312:c8dd:75d4:99ab:290a]) by smtp.gmail.com with ESMTPSA id z24sm11040996edr.9.2021.01.18.09.57.01 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 18 Jan 2021 09:57:02 -0800 (PST) Subject: Re: [PATCH] KVM: x86/pmu: Fix HW_REF_CPU_CYCLES event pseudo-encoding in intel_arch_events[] To: Like Xu , Stephane Eranian Cc: Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , kvm@vger.kernel.org, linux-kernel@vger.kernel.org References: <20201230081916.63417-1-like.xu@linux.intel.com> From: Paolo Bonzini Message-ID: <166bdae7-529a-cd17-a164-6e86ef7f6124@redhat.com> Date: Mon, 18 Jan 2021 18:57:01 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.6.0 MIME-Version: 1.0 In-Reply-To: <20201230081916.63417-1-like.xu@linux.intel.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On 30/12/20 09:19, Like Xu wrote: > The HW_REF_CPU_CYCLES event on the fixed counter 2 is pseudo-encoded as > 0x0300 in the intel_perfmon_event_map[]. Correct its usage. > > Fixes: 62079d8a4312 ("KVM: PMU: add proper support for fixed counter 2") > Signed-off-by: Like Xu > --- > arch/x86/kvm/vmx/pmu_intel.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c > index a886a47daebd..013e8d253dfa 100644 > --- a/arch/x86/kvm/vmx/pmu_intel.c > +++ b/arch/x86/kvm/vmx/pmu_intel.c > @@ -29,7 +29,7 @@ static struct kvm_event_hw_type_mapping intel_arch_events[] = { > [4] = { 0x2e, 0x41, PERF_COUNT_HW_CACHE_MISSES }, > [5] = { 0xc4, 0x00, PERF_COUNT_HW_BRANCH_INSTRUCTIONS }, > [6] = { 0xc5, 0x00, PERF_COUNT_HW_BRANCH_MISSES }, > - [7] = { 0x00, 0x30, PERF_COUNT_HW_REF_CPU_CYCLES }, > + [7] = { 0x00, 0x03, PERF_COUNT_HW_REF_CPU_CYCLES }, > }; > > /* mapping between fixed pmc index and intel_arch_events array */ > Queued, thanks. Paolo