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[87.145.213.151]) by smtp.gmail.com with ESMTPSA id o7sm31442351wrv.72.2021.07.21.06.26.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 21 Jul 2021 06:26:54 -0700 (PDT) To: Janis Schoetterl-Glausch , David Hildenbrand , Janosch Frank Cc: Cornelia Huck , Claudio Imbrenda , kvm@vger.kernel.org, linux-s390@vger.kernel.org References: <20210706115459.372749-1-scgl@linux.ibm.com> From: Thomas Huth Subject: Re: [kvm-unit-tests PATCH] s390x: Add specification exception test Message-ID: <18803632-6a9c-5999-2a8a-d4501a0a77d8@redhat.com> Date: Wed, 21 Jul 2021 15:26:53 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.12.0 MIME-Version: 1.0 In-Reply-To: <20210706115459.372749-1-scgl@linux.ibm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On 06/07/2021 13.54, Janis Schoetterl-Glausch wrote: > Generate specification exceptions and check that they occur. > Also generate specification exceptions during a transaction, > which results in another interruption code. > With the iterations argument one can check if specification > exception interpretation occurs, e.g. by using a high value and > checking that the debugfs counters are substantially lower. > The argument is also useful for estimating the performance benefit > of interpretation. > > Signed-off-by: Janis Schoetterl-Glausch > --- > s390x/Makefile | 1 + > lib/s390x/asm/arch_def.h | 1 + > s390x/spec_ex.c | 344 +++++++++++++++++++++++++++++++++++++++ > s390x/unittests.cfg | 3 + > 4 files changed, 349 insertions(+) > create mode 100644 s390x/spec_ex.c > > diff --git a/s390x/Makefile b/s390x/Makefile > index 8820e99..be100d3 100644 > --- a/s390x/Makefile > +++ b/s390x/Makefile > @@ -23,6 +23,7 @@ tests += $(TEST_DIR)/sie.elf > tests += $(TEST_DIR)/mvpg.elf > tests += $(TEST_DIR)/uv-host.elf > tests += $(TEST_DIR)/edat.elf > +tests += $(TEST_DIR)/spec_ex.elf > > tests_binary = $(patsubst %.elf,%.bin,$(tests)) > ifneq ($(HOST_KEY_DOCUMENT),) > diff --git a/lib/s390x/asm/arch_def.h b/lib/s390x/asm/arch_def.h > index 15cf7d4..7cb0b92 100644 > --- a/lib/s390x/asm/arch_def.h > +++ b/lib/s390x/asm/arch_def.h > @@ -229,6 +229,7 @@ static inline uint64_t stctg(int cr) > return value; > } > > +#define CTL0_TRANSACT_EX_CTL (63 - 8) > #define CTL0_LOW_ADDR_PROT (63 - 35) > #define CTL0_EDAT (63 - 40) > #define CTL0_IEP (63 - 43) > diff --git a/s390x/spec_ex.c b/s390x/spec_ex.c > new file mode 100644 > index 0000000..2e05bfb > --- /dev/null > +++ b/s390x/spec_ex.c > @@ -0,0 +1,344 @@ Please add a short comment header at the top of the file with some information on what it is all about, and license information (e.g. a SPDX-License-Identifier) > +#include > +#include > +#include > +#include > +#include > +#include > + > +struct lowcore *lc = (struct lowcore *) 0; > + > +static bool expect_early; > +static struct psw expected_early_pgm_psw; > +static struct psw fixup_early_pgm_psw; > + > +static void fixup_early_pgm_ex(void) Could you please add a comment in front of this function with a description why this is required / good for? > +{ > + if (expect_early) { > + report(expected_early_pgm_psw.mask == lc->pgm_old_psw.mask > + && expected_early_pgm_psw.addr == lc->pgm_old_psw.addr, > + "Early program new PSW as expected"); > + expect_early = false; > + } > + lc->pgm_old_psw = fixup_early_pgm_psw; > +} > + > +static void lpsw(uint64_t psw) > +{ > + uint32_t *high, *low; > + uint64_t r0 = 0, r1 = 0; > + > + high = (uint32_t *) &fixup_early_pgm_psw.mask; > + low = high + 1; > + > + asm volatile ( > + " epsw %0,%1\n" > + " st %0,%[high]\n" > + " st %1,%[low]\n" What's all this magic with high and low good for? Looks like high and low are not used afterwards anymore? > + " larl %0,nop%=\n" > + " stg %0,%[addr]\n" > + " lpsw %[psw]\n" > + "nop%=: nop\n" > + : "+&r"(r0), "+&a"(r1), [high] "=&R"(*high), [low] "=&R"(*low) ... also not sure why you need the "&" modifiers here? > + , [addr] "=&R"(fixup_early_pgm_psw.addr) > + : [psw] "Q"(psw) > + : "cc", "memory" > + ); > +} > + > +static void psw_bit_31_32_are_1_0(void) > +{ > + uint64_t bad_psw = 0x000800015eadbeef; > + > + //bit 12 gets inverted when extending to 128-bit PSW I'd prefer a space after the "//" > + expected_early_pgm_psw.mask = 0x0000000100000000; > + expected_early_pgm_psw.addr = 0x000000005eadbeef; > + expect_early = true; > + lpsw(bad_psw); > +} > + > +static void bad_alignment(void) > +{ > + uint32_t words[5] = {0, 0, 0}; > + uint32_t (*bad_aligned)[4]; > + > + register uint64_t r1 asm("6"); > + register uint64_t r2 asm("7"); > + if (((uintptr_t)&words[0]) & 0xf) { > + bad_aligned = (uint32_t (*)[4])&words[0]; > + } else { > + bad_aligned = (uint32_t (*)[4])&words[1]; > + } > + asm volatile ("lpq %0,%2" > + : "=r"(r1), "=r"(r2) > + : "T"(*bad_aligned) > + ); > +} > + > +static void not_even(void) > +{ > + uint64_t quad[2]; > + > + register uint64_t r1 asm("7"); > + register uint64_t r2 asm("8"); > + asm volatile (".insn rxy,0xe3000000008f,%0,%2" //lpq %0,%2 > + : "=r"(r1), "=r"(r2) > + : "T"(quad) > + ); > +} > + > +struct spec_ex_trigger { > + const char *name; > + void (*func)(void); > + bool transactable; > + void (*fixup)(void); > +}; > + > +static const struct spec_ex_trigger spec_ex_triggers[] = { > + { "psw_bit_31_32_are_1_0", &psw_bit_31_32_are_1_0, false, &fixup_early_pgm_ex}, > + { "bad_alignment", &bad_alignment, true, NULL}, > + { "not_even", ¬_even, true, NULL}, > + { NULL, NULL, true, NULL}, > +}; > + > +struct args { > + uint64_t iterations; > + uint64_t max_retries; > + uint64_t suppress_info; > + uint64_t max_failures; > + bool diagnose; > +}; > + > +static void test_spec_ex(struct args *args, > + const struct spec_ex_trigger *trigger) > +{ > + uint16_t expected_pgm = PGM_INT_CODE_SPECIFICATION; > + uint16_t pgm; > + unsigned int i; > + > + register_pgm_cleanup_func(trigger->fixup); > + for (i = 0; i < args->iterations; i++) { > + expect_pgm_int(); > + trigger->func(); > + pgm = clear_pgm_int(); > + if (pgm != expected_pgm) { > + report(0, > + "Program interrupt: expected(%d) == received(%d)", > + expected_pgm, > + pgm); > + return; > + } > + } Maybe it would be nice to "unregister" the cleanup function at the end with register_pgm_cleanup_func(NULL) ? > + report(1, > + "Program interrupt: always expected(%d) == received(%d)", > + expected_pgm, > + expected_pgm); > +} > + > +#define TRANSACTION_COMPLETED 4 > +#define TRANSACTION_MAX_RETRIES 5 > + > +static int __attribute__((nonnull)) Not sure whether that attribute makes much sense with a static function? ... the compiler has information about the implementation details here, so it should be able to see that e.g. trigger must be non-NULL anyway? > +with_transaction(void (*trigger)(void), struct __htm_tdb *diagnose) > +{ > + int cc; > + > + cc = __builtin_tbegin(diagnose); > + if (cc == _HTM_TBEGIN_STARTED) { > + trigger(); > + __builtin_tend(); > + return -TRANSACTION_COMPLETED; > + } else { > + return -cc; > + } > +} [...] Thomas