From: Tao Xu <tao3.xu@intel.com>
To: Xiaoyao Li <xiaoyao.li@linux.intel.com>,
pbonzini@redhat.com, rth@twiddle.net, ehabkost@redhat.com
Cc: cohuck@redhat.com, mst@redhat.com, mtosatti@redhat.com,
qemu-devel@nongnu.org, kvm@vger.kernel.org, jingqi.liu@intel.com
Subject: Re: [PATCH v3 2/2] target/i386: Add support for save/load IA32_UMWAIT_CONTROL MSR
Date: Wed, 19 Jun 2019 09:11:48 +0800 [thread overview]
Message-ID: <1bbe0308-6479-2a76-ba4e-f38203c975f7@intel.com> (raw)
In-Reply-To: <94f9e831-38a0-3cc3-f566-6c8e5909d0fd@linux.intel.com>
On 6/17/2019 11:39 AM, Xiaoyao Li wrote:
>
>
> On 6/16/2019 11:35 PM, Tao Xu wrote:
>> UMWAIT and TPAUSE instructions use IA32_UMWAIT_CONTROL at MSR index
>> E1H to determines the maximum time in TSC-quanta that the processor
>> can reside in either C0.1 or C0.2.
>>
>> This patch is to Add support for save/load IA32_UMWAIT_CONTROL MSR in
>> guest.
>>
>> Co-developed-by: Jingqi Liu <jingqi.liu@intel.com>
>> Signed-off-by: Jingqi Liu <jingqi.liu@intel.com>
>> Signed-off-by: Tao Xu <tao3.xu@intel.com>
>> ---
>>
>> no changes in v3:
>> ---
>> target/i386/cpu.h | 2 ++
>> target/i386/kvm.c | 13 +++++++++++++
>> target/i386/machine.c | 20 ++++++++++++++++++++
>> 3 files changed, 35 insertions(+)
>>
>> diff --git a/target/i386/cpu.h b/target/i386/cpu.h
>> index 2f7c57a3c2..eb98b2e54a 100644
>> --- a/target/i386/cpu.h
>> +++ b/target/i386/cpu.h
>> @@ -450,6 +450,7 @@ typedef enum X86Seg {
>> #define MSR_IA32_BNDCFGS 0x00000d90
>> #define MSR_IA32_XSS 0x00000da0
>> +#define MSR_IA32_UMWAIT_CONTROL 0xe1
>> #define XSTATE_FP_BIT 0
>> #define XSTATE_SSE_BIT 1
>> @@ -1348,6 +1349,7 @@ typedef struct CPUX86State {
>> uint16_t fpregs_format_vmstate;
>> uint64_t xss;
>> + uint64_t umwait;
>> TPRAccess tpr_access_type;
>> } CPUX86State;
>> diff --git a/target/i386/kvm.c b/target/i386/kvm.c
>> index 3efdb90f11..506c7cd038 100644
>> --- a/target/i386/kvm.c
>> +++ b/target/i386/kvm.c
>> @@ -91,6 +91,7 @@ static bool has_msr_hv_stimer;
>> static bool has_msr_hv_frequencies;
>> static bool has_msr_hv_reenlightenment;
>> static bool has_msr_xss;
>> +static bool has_msr_umwait;
>> static bool has_msr_spec_ctrl;
>> static bool has_msr_virt_ssbd;
>> static bool has_msr_smi_count;
>> @@ -1486,6 +1487,9 @@ static int kvm_get_supported_msrs(KVMState *s)
>> case MSR_IA32_XSS:
>> has_msr_xss = true;
>> break;
>> + case MSR_IA32_UMWAIT_CONTROL:
>> + has_msr_umwait = true;
>> + break;
>
> Need to add MSR_IA32_UMWAIT_CONTROL into msrs_to_save[] in your kvm
> patches, otherwise qemu never goes into this case.
>
OK, thank you for your suggestion. I will add it in the next version.
prev parent reply other threads:[~2019-06-19 1:11 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-16 15:35 [PATCH v3 0/2] x86: Enable user wait instructions Tao Xu
2019-06-16 15:35 ` [PATCH v3 1/2] x86/cpu: Add support for UMONITOR/UMWAIT/TPAUSE Tao Xu
2019-06-16 15:35 ` [PATCH v3 2/2] target/i386: Add support for save/load IA32_UMWAIT_CONTROL MSR Tao Xu
2019-06-17 3:39 ` Xiaoyao Li
2019-06-19 1:11 ` Tao Xu [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1bbe0308-6479-2a76-ba4e-f38203c975f7@intel.com \
--to=tao3.xu@intel.com \
--cc=cohuck@redhat.com \
--cc=ehabkost@redhat.com \
--cc=jingqi.liu@intel.com \
--cc=kvm@vger.kernel.org \
--cc=mst@redhat.com \
--cc=mtosatti@redhat.com \
--cc=pbonzini@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=rth@twiddle.net \
--cc=xiaoyao.li@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).