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From: Christoffer Dall <cdall@linaro.org>
To: Jintack Lim <jintack.lim@linaro.org>
Cc: kvm@vger.kernel.org, david.daney@cavium.com,
	catalin.marinas@arm.com, will.deacon@arm.com,
	kvmarm@lists.cs.columbia.edu, stefan@hello-penguin.com,
	corbet@lwn.net, daniel.lezcano@linaro.org, linux@armlinux.org.uk,
	linux-arm-kernel@lists.infradead.org, andy.gross@linaro.org,
	marc.zyngier@arm.com, cov@codeaurora.org, wcohen@redhat.com,
	mchehab@kernel.org, ard.biesheuvel@linaro.org,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	pbonzini@redhat.com, akpm@linux-foundation.org
Subject: Re: [RFC PATCH v2 08/38] KVM: arm64: Add EL2 special registers to vcpu context
Date: Sun, 30 Jul 2017 21:59:55 +0200	[thread overview]
Message-ID: <20170730195955.GG5176@cbox> (raw)
In-Reply-To: <1500397144-16232-9-git-send-email-jintack.lim@linaro.org>

On Tue, Jul 18, 2017 at 11:58:34AM -0500, Jintack Lim wrote:
> To support the virtual EL2 execution, we need to maintain the EL2
> special registers such as SPSR_EL2, ELR_EL2 and SP_EL2 in vcpu context.
> 
> Note that SP_EL2 is not accessible in EL2, so we don't need a trap
> handler for this register.

Actually, it's not accessible *in the MRS/MSR instruction* but it is of
course accessible as the current stack pointer (which is why you need
the state, but not the trap handler).

Otherwise, the patch looks good.

Thanks,
-Christoffer

> 
> Signed-off-by: Jintack Lim <jintack.lim@linaro.org>
> ---
>  arch/arm64/include/asm/kvm_host.h | 12 ++++++++++++
>  arch/arm64/include/asm/sysreg.h   |  4 ++++
>  arch/arm64/kvm/sys_regs.c         | 38 +++++++++++++++++++++++++++++++++-----
>  arch/arm64/kvm/sys_regs.h         |  8 ++++++++
>  4 files changed, 57 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
> index 1dc4ed6..57dccde 100644
> --- a/arch/arm64/include/asm/kvm_host.h
> +++ b/arch/arm64/include/asm/kvm_host.h
> @@ -171,6 +171,15 @@ enum vcpu_sysreg {
>  	NR_SYS_REGS	/* Nothing after this line! */
>  };
>  
> +enum el2_special_regs {
> +	__INVALID_EL2_SPECIAL_REG__,
> +	SPSR_EL2,	/* Saved Program Status Register (EL2) */
> +	ELR_EL2,	/* Exception Link Register (EL2) */
> +	SP_EL2,		/* Stack Pointer (EL2) */
> +
> +	NR_EL2_SPECIAL_REGS
> +};
> +
>  /* 32bit mapping */
>  #define c0_MPIDR	(MPIDR_EL1 * 2)	/* MultiProcessor ID Register */
>  #define c0_CSSELR	(CSSELR_EL1 * 2)/* Cache Size Selection Register */
> @@ -218,6 +227,8 @@ struct kvm_cpu_context {
>  		u64 sys_regs[NR_SYS_REGS];
>  		u32 copro[NR_COPRO_REGS];
>  	};
> +
> +	u64 el2_special_regs[NR_EL2_SPECIAL_REGS];
>  };
>  
>  typedef struct kvm_cpu_context kvm_cpu_context_t;
> @@ -307,6 +318,7 @@ struct kvm_vcpu_arch {
>  
>  #define vcpu_gp_regs(v)		(&(v)->arch.ctxt.gp_regs)
>  #define vcpu_sys_reg(v,r)	((v)->arch.ctxt.sys_regs[(r)])
> +#define vcpu_el2_sreg(v,r)	((v)->arch.ctxt.el2_special_regs[(r)])
>  /*
>   * CP14 and CP15 live in the same array, as they are backed by the
>   * same system registers.
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 9277c4a..98c32ef 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -268,6 +268,8 @@
>  
>  #define SYS_DACR32_EL2			sys_reg(3, 4, 3, 0, 0)
>  
> +#define SYS_SPSR_EL2			sys_reg(3, 4, 4, 0, 0)
> +#define SYS_ELR_EL2			sys_reg(3, 4, 4, 0, 1)
>  #define SYS_SP_EL1			sys_reg(3, 4, 4, 1, 0)
>  
>  #define SYS_IFSR32_EL2			sys_reg(3, 4, 5, 0, 1)
> @@ -332,6 +334,8 @@
>  #define SYS_CNTVOFF_EL2			sys_reg(3, 4, 14, 0, 3)
>  #define SYS_CNTHCTL_EL2			sys_reg(3, 4, 14, 1, 0)
>  
> +#define SYS_SP_EL2			sys_reg(3, 6, 4, 1, 0)
> +
>  /* Common SCTLR_ELx flags. */
>  #define SCTLR_ELx_EE    (1 << 25)
>  #define SCTLR_ELx_I	(1 << 12)
> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> index 1568f8b..2b3ed70 100644
> --- a/arch/arm64/kvm/sys_regs.c
> +++ b/arch/arm64/kvm/sys_regs.c
> @@ -900,15 +900,33 @@ static inline void access_rw(struct sys_reg_params *p, u64 *sysreg)
>  		*sysreg = p->regval;
>  }
>  
> +static u64 *get_special_reg(struct kvm_vcpu *vcpu, struct sys_reg_params *p)
> +{
> +	u64 reg = sys_reg(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2);
> +
> +	switch (reg) {
> +	case SYS_SP_EL1:
> +		return &vcpu->arch.ctxt.gp_regs.sp_el1;
> +	case SYS_ELR_EL2:
> +		return &vcpu_el2_sreg(vcpu, ELR_EL2);
> +	case SYS_SPSR_EL2:
> +		return &vcpu_el2_sreg(vcpu, SPSR_EL2);
> +	default:
> +		return NULL;
> +	};
> +}
> +
>  static bool trap_el2_regs(struct kvm_vcpu *vcpu,
>  			 struct sys_reg_params *p,
>  			 const struct sys_reg_desc *r)
>  {
> -	/* SP_EL1 is NOT maintained in sys_regs array */
> -	if (sys_reg(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2) == SYS_SP_EL1)
> -		access_rw(p, &vcpu->arch.ctxt.gp_regs.sp_el1);
> -	else
> -		access_rw(p, &vcpu_sys_reg(vcpu, r->reg));
> +	u64 *sys_reg;
> +
> +	sys_reg = get_special_reg(vcpu, p);
> +	if (!sys_reg)
> +		sys_reg = &vcpu_sys_reg(vcpu, r->reg);
> +
> +	access_rw(p, sys_reg);
>  
>  	return true;
>  }
> @@ -1116,6 +1134,8 @@ static bool trap_el2_regs(struct kvm_vcpu *vcpu,
>  
>  	{ SYS_DESC(SYS_DACR32_EL2), NULL, reset_unknown, DACR32_EL2 },
>  
> +	{ SYS_DESC(SYS_SPSR_EL2), trap_el2_regs, reset_special, SPSR_EL2, 0 },
> +	{ SYS_DESC(SYS_ELR_EL2), trap_el2_regs, reset_special, ELR_EL2, 0 },
>  	{ SYS_DESC(SYS_SP_EL1), trap_el2_regs },
>  
>  	{ SYS_DESC(SYS_IFSR32_EL2), NULL, reset_unknown, IFSR32_EL2 },
> @@ -1138,6 +1158,8 @@ static bool trap_el2_regs(struct kvm_vcpu *vcpu,
>  
>  	{ SYS_DESC(SYS_CNTVOFF_EL2), trap_el2_regs, reset_val, CNTVOFF_EL2, 0 },
>  	{ SYS_DESC(SYS_CNTHCTL_EL2), trap_el2_regs, reset_val, CNTHCTL_EL2, 0 },
> +
> +	{ SYS_DESC(SYS_SP_EL2), NULL, reset_special, SP_EL2, 0},
>  };
>  
>  static bool trap_dbgidr(struct kvm_vcpu *vcpu,
> @@ -2271,6 +2293,8 @@ void kvm_reset_sys_regs(struct kvm_vcpu *vcpu)
>  
>  	/* Catch someone adding a register without putting in reset entry. */
>  	memset(&vcpu->arch.ctxt.sys_regs, 0x42, sizeof(vcpu->arch.ctxt.sys_regs));
> +	memset(&vcpu->arch.ctxt.el2_special_regs, 0x42,
> +	       sizeof(vcpu->arch.ctxt.el2_special_regs));
>  
>  	/* Generic chip reset first (so target could override). */
>  	reset_sys_reg_descs(vcpu, sys_reg_descs, ARRAY_SIZE(sys_reg_descs));
> @@ -2281,4 +2305,8 @@ void kvm_reset_sys_regs(struct kvm_vcpu *vcpu)
>  	for (num = 1; num < NR_SYS_REGS; num++)
>  		if (vcpu_sys_reg(vcpu, num) == 0x4242424242424242)
>  			panic("Didn't reset vcpu_sys_reg(%zi)", num);
> +
> +	for (num = 1; num < NR_EL2_SPECIAL_REGS; num++)
> +		if (vcpu_el2_sreg(vcpu, num) == 0x4242424242424242)
> +			panic("Didn't reset vcpu_el2_sreg(%zi)", num);
>  }
> diff --git a/arch/arm64/kvm/sys_regs.h b/arch/arm64/kvm/sys_regs.h
> index 060f534..827717b 100644
> --- a/arch/arm64/kvm/sys_regs.h
> +++ b/arch/arm64/kvm/sys_regs.h
> @@ -99,6 +99,14 @@ static inline void reset_val(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r
>  	vcpu_sys_reg(vcpu, r->reg) = r->val;
>  }
>  
> +static inline void reset_special(struct kvm_vcpu *vcpu,
> +				 const struct sys_reg_desc *r)
> +{
> +	BUG_ON(!r->reg);
> +	BUG_ON(r->reg >= NR_EL2_SPECIAL_REGS);
> +	vcpu_el2_sreg(vcpu, r->reg) = r->val;
> +}
> +
>  static inline int cmp_sys_reg(const struct sys_reg_desc *i1,
>  			      const struct sys_reg_desc *i2)
>  {
> -- 
> 1.9.1
> 

  reply	other threads:[~2017-07-30 19:59 UTC|newest]

Thread overview: 77+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-18 16:58 [RFC PATCH v2 00/38] Nested Virtualization on KVM/ARM Jintack Lim
2017-07-18 16:58 ` [RFC PATCH v2 01/38] arm64: Add ARM64_HAS_NESTED_VIRT feature Jintack Lim
2017-07-18 16:58 ` [RFC PATCH v2 02/38] KVM: arm/arm64: Enable nested virtualization via command-line Jintack Lim
2017-07-30 19:59   ` Christoffer Dall
2017-08-01 13:56     ` Jintack Lim
2017-07-18 16:58 ` [RFC PATCH v2 03/38] KVM: arm64: Add KVM nesting feature Jintack Lim
2017-07-18 16:58 ` [RFC PATCH v2 04/38] KVM: arm/arm64: Check if nested virtualization is in use Jintack Lim
2017-07-30 19:59   ` Christoffer Dall
2017-08-01 13:59     ` Jintack Lim
2017-07-30 19:59   ` Christoffer Dall
2017-08-01 14:07     ` Jintack Lim
2017-08-01 14:58       ` Christoffer Dall
2017-07-18 16:58 ` [RFC PATCH v2 05/38] KVM: arm64: Allow userspace to set PSR_MODE_EL2x Jintack Lim
2017-07-18 16:58 ` [RFC PATCH v2 06/38] KVM: arm64: Add vcpu_mode_el2 primitive to support nesting Jintack Lim
2017-07-18 16:58 ` [RFC PATCH v2 07/38] KVM: arm64: Add EL2 system registers to vcpu context Jintack Lim
2017-07-18 16:58 ` [RFC PATCH v2 08/38] KVM: arm64: Add EL2 special " Jintack Lim
2017-07-30 19:59   ` Christoffer Dall [this message]
2017-08-01 14:08     ` Jintack Lim
2017-07-18 16:58 ` [RFC PATCH v2 09/38] KVM: arm64: Add the shadow context for virtual EL2 execution Jintack Lim
2017-07-18 16:58 ` [RFC PATCH v2 10/38] KVM: arm/arm64: Add a framework to prepare " Jintack Lim
2017-07-30 12:02   ` Christoffer Dall
2017-07-18 16:58 ` [RFC PATCH v2 11/38] KVM: arm64: Set vcpu context depending on the guest exception level Jintack Lim
2017-07-18 16:58 ` [RFC PATCH v2 12/38] arm64: Add missing TCR hw defines Jintack Lim
2017-07-18 16:58 ` [RFC PATCH v2 13/38] KVM: arm64: Create shadow EL1 registers Jintack Lim
2017-07-18 16:58 ` [RFC PATCH v2 14/38] KVM: arm64: Synchronize EL1 system registers on virtual EL2 entry and exit Jintack Lim
2017-07-30 20:00   ` Christoffer Dall
2017-07-18 16:58 ` [RFC PATCH v2 15/38] KVM: arm64: Move exception macros and enums to a common file Jintack Lim
2017-07-18 16:58 ` [RFC PATCH v2 16/38] KVM: arm64: Support to inject exceptions to the virtual EL2 Jintack Lim
2017-07-30 20:00   ` Christoffer Dall
2017-07-18 16:58 ` [RFC PATCH v2 17/38] KVM: arm64: Trap EL1 VM register accesses in " Jintack Lim
2017-07-18 16:58 ` [RFC PATCH v2 18/38] KVM: arm64: Trap SPSR_EL1, ELR_EL1 and VBAR_EL1 from " Jintack Lim
2017-07-18 16:58 ` [RFC PATCH v2 19/38] KVM: arm64: Trap CPACR_EL1 access in " Jintack Lim
2017-07-18 16:58 ` [RFC PATCH v2 20/38] KVM: arm64: Handle eret instruction traps Jintack Lim
2017-07-30 20:00   ` Christoffer Dall
2017-08-01 14:11     ` Jintack Lim
2017-07-18 16:58 ` [RFC PATCH v2 21/38] KVM: arm64: Set a handler for the system " Jintack Lim
2017-07-30 20:00   ` Christoffer Dall
2017-07-18 16:58 ` [RFC PATCH v2 22/38] KVM: arm64: Handle PSCI call via smc from the guest Jintack Lim
2017-07-30 20:00   ` Christoffer Dall
2017-07-18 16:58 ` [RFC PATCH v2 23/38] KVM: arm64: Inject HVC exceptions to the virtual EL2 Jintack Lim
2017-07-18 16:58 ` [RFC PATCH v2 24/38] KVM: arm64: Respect virtual HCR_EL2.TWX setting Jintack Lim
2017-07-30 20:00   ` Christoffer Dall
2017-07-18 16:58 ` [RFC PATCH v2 25/38] KVM: arm64: Respect virtual CPTR_EL2.TFP setting Jintack Lim
2017-07-30 20:00   ` Christoffer Dall
2017-07-18 16:58 ` [RFC PATCH v2 26/38] KVM: arm64: Add macros to support the virtual EL2 with VHE Jintack Lim
2017-07-18 16:58 ` [RFC PATCH v2 27/38] KVM: arm64: Add EL2 registers defined in ARMv8.1 to vcpu context Jintack Lim
2017-07-18 16:58 ` [RFC PATCH v2 28/38] KVM: arm64: Emulate EL12 register accesses from the virtual EL2 Jintack Lim
2017-07-31  8:44   ` Christoffer Dall
2017-07-18 16:58 ` [RFC PATCH v2 29/38] KVM: arm64: Support a VM with VHE considering EL0 of the VHE host Jintack Lim
2017-07-31  9:01   ` Christoffer Dall
2017-07-18 16:58 ` [RFC PATCH v2 30/38] KVM: arm64: Allow the virtual EL2 to access EL2 states without trap Jintack Lim
2017-07-31  9:37   ` Christoffer Dall
2017-07-18 16:58 ` [RFC PATCH v2 31/38] KVM: arm64: Manage the shadow states when virtual E2H bit enabled Jintack Lim
2017-07-31  9:57   ` Christoffer Dall
2017-07-18 16:58 ` [RFC PATCH v2 32/38] KVM: arm64: Trap and emulate CPTR_EL2 accesses via CPACR_EL1 from the virtual EL2 with VHE Jintack Lim
2017-07-31 12:04   ` Christoffer Dall
2017-07-18 16:58 ` [RFC PATCH v2 33/38] KVM: arm64: Emulate appropriate VM control system registers Jintack Lim
2017-07-31 12:09   ` Christoffer Dall
2017-07-18 16:59 ` [RFC PATCH v2 34/38] KVM: arm64: Respect the virtual HCR_EL2.NV bit setting Jintack Lim
2017-07-18 16:59 ` [RFC PATCH v2 35/38] KVM: arm64: Respect the virtual HCR_EL2.NV bit setting for EL12 register traps Jintack Lim
2017-07-31 12:39   ` Christoffer Dall
2017-07-18 16:59 ` [RFC PATCH v2 36/38] KVM: arm64: Respect virtual HCR_EL2.TVM and TRVM settings Jintack Lim
2017-07-31 12:42   ` Christoffer Dall
2017-07-18 16:59 ` [RFC PATCH v2 37/38] KVM: arm64: Respect the virtual HCR_EL2.NV1 bit setting Jintack Lim
2017-07-19  2:24   ` Jintack Lim
2017-07-31 12:53   ` Christoffer Dall
2017-07-18 16:59 ` [RFC PATCH v2 38/38] KVM: arm64: Respect the virtual CPTR_EL2.TCPAC setting Jintack Lim
2017-07-31 12:59   ` Christoffer Dall
2017-08-01 11:03     ` Jintack Lim
2017-08-01 11:20       ` Christoffer Dall
2017-07-19  2:23 ` [RFC PATCH v2 00/38] Nested Virtualization on KVM/ARM Jintack Lim
2017-07-19  8:49   ` Christoffer Dall
2017-07-19 14:35     ` Jintack Lim
2017-07-28 20:13   ` Bandan Das
2017-07-28 21:45     ` Jintack Lim
2017-07-31 13:00 ` Christoffer Dall
2017-08-01 10:48   ` Jintack Lim

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